Fixed errors during compilation of OpenWRT kernel modules

Disable eifs_trigger_by_last_tx_fail by default:
Standard does not ask so

Refactor initial all open slice setup in xpu.c

Remove unnecessary code in xpu.c

Though the SIFS definition in 2.4GHz is 10us, the actual gap is still 16us:
1. Confirmed by CMW270 in OFDM mode (10us is for 11b where viterbi decoder is not needed)
2. See Signal Extension in 18.3.2

Though the SIFS definition in 2.4GHz is 10us, the actual gap is still 16us:
1. Confirmed by CMW270 in OFDM mode (10us is for 11b where viterbi decoder is not needed)
2. See Signal Extension in 18.3.2.4 ERP-OFDM PPDU format of 802.11-2020

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Open the 4 queue gates all the time during xpu initialization

Relax the ACK waiting condition for non block ACK case:
If the packet type/sub-type is ACK and the length field is 14, we believe it is ACK. No matter the fcs is valid or not

fine tuning of ack tx wait time for new design

gpio gain delay and rssi:

Fine tune the rssi calculation sync with gpio gain (add the same gpio gain smoothing like iq_rssi in FPGA)

Driver changes for FPGA SPI Tx LO control
- Manually issue Tx Quadrature calibration if frequency change is more than 100MHz
- Disable FPGA SPI module before calibration
- Add xpu reg 13 to disable c

Driver changes for FPGA SPI Tx LO control
- Manually issue Tx Quadrature calibration if frequency change is more than 100MHz
- Disable FPGA SPI module before calibration
- Add xpu reg 13 to disable control manually

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openofdm_rx initialization with the help of macro definition in hw_def.h:

Now changing the macro in hw_def.h will change the related initialization part in all related drivers (rx_intf/xpu/openofdm_

openofdm_rx initialization with the help of macro definition in hw_def.h:

Now changing the macro in hw_def.h will change the related initialization part in all related drivers (rx_intf/xpu/openofdm_rx)

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A-MPDU rx aggregation support

add ack disable register in xpu in case ack needs to be disabled in monitor mode

in xpu.v slv_reg19 and slv_reg8 are not twistted anymore. slv_reg6 is added to assist the register map in xpu more clear. separate registers for different purpose. separate registers for dynamic and

in xpu.v slv_reg19 and slv_reg8 are not twistted anymore. slv_reg6 is added to assist the register map in xpu more clear. separate registers for different purpose. separate registers for dynamic and static configurations in driver (sdr.c).

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Merge pull request #54 from lnceballosz/master

NGI0 - Updating licensing aspects according REUSE

Update xpu.c

improve csma state machine, force ch_idle high after decode, log cw and num_slot_random in the last attempt

adding license and copyright headers

enable dynamic cw

sync internal

update source coed of: 4 fpga queues and better driver/fpga flow control to avoid crash. improved slice cfg and printing

prepare upgrade

fix the potential memory access over boundary issue of openwifi_rx_interrupt and make necessary configuration for new FPGA that tx sending out I/Q immediately after tx_start which achieves 10us SIFS

fix the potential memory access over boundary issue of openwifi_rx_interrupt and make necessary configuration for new FPGA that tx sending out I/Q immediately after tx_start which achieves 10us SIFS in 2.4GHz

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initial commit