1 //Author: Xianjun Jiao. [email protected]; [email protected] 2 3 #include <linux/bitops.h> 4 #include <linux/dmapool.h> 5 #include <linux/io.h> 6 #include <linux/iopoll.h> 7 #include <linux/of_address.h> 8 #include <linux/of_platform.h> 9 #include <linux/of_irq.h> 10 #include <linux/slab.h> 11 #include <linux/clk.h> 12 #include <linux/io-64-nonatomic-lo-hi.h> 13 14 #include <linux/delay.h> 15 #include <linux/interrupt.h> 16 17 #include <linux/dmaengine.h> 18 #include <linux/slab.h> 19 #include <linux/delay.h> 20 #include <linux/etherdevice.h> 21 22 #include <linux/init.h> 23 #include <linux/kthread.h> 24 #include <linux/module.h> 25 #include <linux/of_dma.h> 26 #include <linux/platform_device.h> 27 #include <linux/random.h> 28 #include <linux/slab.h> 29 #include <linux/wait.h> 30 #include <linux/sched/task.h> 31 #include <linux/dma/xilinx_dma.h> 32 #include <linux/spi/spi.h> 33 #include <net/mac80211.h> 34 35 #include <linux/clk.h> 36 #include <linux/clkdev.h> 37 #include <linux/clk-provider.h> 38 39 #include <linux/iio/iio.h> 40 #include <linux/iio/sysfs.h> 41 42 #include <linux/gpio.h> 43 #include <linux/leds.h> 44 45 #define IIO_AD9361_USE_PRIVATE_H_ 46 #include "ad9361/ad9361_regs.h" 47 #include "ad9361/ad9361.h" 48 #include "ad9361/ad9361_private.h" 49 50 #include <../../drivers/iio/frequency/cf_axi_dds.h> 51 52 #include "../user_space/sdrctl_src/nl80211_testmode_def.h" 53 #include "hw_def.h" 54 #include "sdr.h" 55 #include "git_rev.h" 56 57 // driver API of component driver 58 extern struct tx_intf_driver_api *tx_intf_api; 59 extern struct rx_intf_driver_api *rx_intf_api; 60 extern struct openofdm_tx_driver_api *openofdm_tx_api; 61 extern struct openofdm_rx_driver_api *openofdm_rx_api; 62 extern struct xpu_driver_api *xpu_api; 63 64 static int test_mode = 0; // 0 normal; 1 rx test 65 66 MODULE_AUTHOR("Xianjun Jiao"); 67 MODULE_DESCRIPTION("SDR driver"); 68 MODULE_LICENSE("GPL v2"); 69 70 module_param(test_mode, int, 0); 71 MODULE_PARM_DESC(myint, "test_mode. 0 normal; 1 rx test"); 72 73 // ---------------rfkill--------------------------------------- 74 static bool openwifi_is_radio_enabled(struct openwifi_priv *priv) 75 { 76 int reg; 77 78 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) 79 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 80 else 81 reg = ad9361_get_tx_atten(priv->ad9361_phy, 1); 82 83 if (reg == AD9361_RADIO_ON_TX_ATT) 84 return true;// 0 off, 1 on 85 return false; 86 } 87 88 void openwifi_rfkill_init(struct ieee80211_hw *hw) 89 { 90 struct openwifi_priv *priv = hw->priv; 91 92 priv->rfkill_off = openwifi_is_radio_enabled(priv); 93 printk("%s openwifi_rfkill_init: wireless switch is %s\n", sdr_compatible_str, priv->rfkill_off ? "on" : "off"); 94 wiphy_rfkill_set_hw_state(hw->wiphy, !priv->rfkill_off); 95 wiphy_rfkill_start_polling(hw->wiphy); 96 } 97 98 void openwifi_rfkill_poll(struct ieee80211_hw *hw) 99 { 100 bool enabled; 101 struct openwifi_priv *priv = hw->priv; 102 103 enabled = openwifi_is_radio_enabled(priv); 104 // printk("%s openwifi_rfkill_poll: wireless radio switch turned %s\n", sdr_compatible_str, enabled ? "on" : "off"); 105 if (unlikely(enabled != priv->rfkill_off)) { 106 priv->rfkill_off = enabled; 107 printk("%s openwifi_rfkill_poll: WARNING wireless radio switch turned %s\n", sdr_compatible_str, enabled ? "on" : "off"); 108 wiphy_rfkill_set_hw_state(hw->wiphy, !enabled); 109 } 110 } 111 112 void openwifi_rfkill_exit(struct ieee80211_hw *hw) 113 { 114 printk("%s openwifi_rfkill_exit\n", sdr_compatible_str); 115 wiphy_rfkill_stop_polling(hw->wiphy); 116 } 117 //----------------rfkill end----------------------------------- 118 119 //static void ad9361_rf_init(void); 120 //static void ad9361_rf_stop(void); 121 //static void ad9361_rf_calc_rssi(void); 122 static void ad9361_rf_set_channel(struct ieee80211_hw *dev, 123 struct ieee80211_conf *conf) 124 { 125 struct openwifi_priv *priv = dev->priv; 126 u32 actual_rx_lo = conf->chandef.chan->center_freq - priv->rx_freq_offset_to_lo_MHz + priv->drv_rx_reg_val[DRV_RX_REG_IDX_EXTRA_FO]; 127 u32 actual_tx_lo; 128 bool change_flag = (actual_rx_lo != priv->actual_rx_lo); 129 130 if (change_flag) { 131 priv->actual_rx_lo = actual_rx_lo; 132 133 actual_tx_lo = conf->chandef.chan->center_freq - priv->tx_freq_offset_to_lo_MHz; 134 135 ad9361_clk_set_rate(priv->ad9361_phy->clks[RX_RFPLL], ( ((u64)1000000ull)*((u64)actual_rx_lo )>>1) ); 136 ad9361_clk_set_rate(priv->ad9361_phy->clks[TX_RFPLL], ( ((u64)1000000ull)*((u64)actual_tx_lo )>>1) ); 137 138 if (actual_rx_lo<2412) { 139 priv->rssi_correction = 153; 140 } else if (actual_rx_lo<=2484) { 141 priv->rssi_correction = 153; 142 } else if (actual_rx_lo<5160) { 143 priv->rssi_correction = 153; 144 } else if (actual_rx_lo<=5240) { 145 priv->rssi_correction = 145; 146 } else if (actual_rx_lo<=5320) { 147 priv->rssi_correction = 148; 148 } else { 149 priv->rssi_correction = 148; 150 } 151 152 // xpu_api->XPU_REG_LBT_TH_write((priv->rssi_correction-62)<<1); // -62dBm 153 xpu_api->XPU_REG_LBT_TH_write((priv->rssi_correction-62-16)<<1); // wei's magic value is 135, here is 134 @ ch 44 154 155 if (actual_rx_lo < 2500) { 156 //priv->slot_time = 20; //20 is default slot time in ERP(OFDM)/11g 2.4G; short one is 9. 157 //xpu_api->XPU_REG_BAND_CHANNEL_write(BAND_2_4GHZ<<16); 158 if (priv->band != BAND_2_4GHZ) { 159 priv->band = BAND_2_4GHZ; 160 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 161 } 162 // //xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((45+2)*10)<<16) | 10 ); // high 16 bits to cover sig valid of ACK packet, low 16 bits is adjustment of fcs valid waiting time. let's add 2us for those device that is really "slow"! 163 // xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((45+2+2)*10)<<16) | 10 );//add 2us for longer fir. BUT corrding to FPGA probing test, we do not need this 164 // xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 0 ); 165 // tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write(((10)*10)<<16); 166 } 167 else { 168 //priv->slot_time = 9; //default slot time of OFDM PHY (OFDM by default means 5GHz) 169 // xpu_api->XPU_REG_BAND_CHANNEL_write(BAND_5_8GHZ<<16); 170 if (priv->band != BAND_5_8GHZ) { 171 priv->band = BAND_5_8GHZ; 172 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 173 } 174 // //xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((51+2)*10)<<16) | 10 ); // because 5GHz needs longer SIFS (16 instead of 10), we need 58 instead of 48 for XPU low mac setting. let's add 2us for those device that is really "slow"! 175 // xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((51+2+2)*10)<<16) | 10 );//add 2us for longer fir. BUT corrding to FPGA probing test, we do not need this 176 // //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 60*10 ); 177 // xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 50*10 );// for longer fir we need this delay 1us shorter 178 // tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write(((16)*10)<<16); 179 } 180 //printk("%s ad9361_rf_set_channel %dM rssi_correction %d\n", sdr_compatible_str,conf->chandef.chan->center_freq,priv->rssi_correction); 181 // //-- use less 182 //clk_prepare_enable(priv->ad9361_phy->clks[RX_RFPLL]); 183 //printk("%s ad9361_rf_set_channel tune to %d read back %llu\n", sdr_compatible_str,conf->chandef.chan->center_freq,2*priv->ad9361_phy->state->current_rx_lo_freq); 184 //ad9361_set_trx_clock_chain_default(priv->ad9361_phy); 185 //printk("%s ad9361_rf_set_channel tune to %d read back %llu\n", sdr_compatible_str,conf->chandef.chan->center_freq,2*priv->ad9361_phy->state->current_rx_lo_freq); 186 } 187 printk("%s ad9361_rf_set_channel %dM rssi_correction %d (change flag %d)\n", sdr_compatible_str,conf->chandef.chan->center_freq,priv->rssi_correction,change_flag); 188 } 189 190 const struct openwifi_rf_ops ad9361_rf_ops = { 191 .name = "ad9361", 192 // .init = ad9361_rf_init, 193 // .stop = ad9361_rf_stop, 194 .set_chan = ad9361_rf_set_channel, 195 // .calc_rssi = ad9361_rf_calc_rssi, 196 }; 197 198 u16 reverse16(u16 d) { 199 union u16_byte2 tmp0, tmp1; 200 tmp0.a = d; 201 tmp1.c[0] = tmp0.c[1]; 202 tmp1.c[1] = tmp0.c[0]; 203 return(tmp1.a); 204 } 205 206 u32 reverse32(u32 d) { 207 union u32_byte4 tmp0, tmp1; 208 tmp0.a = d; 209 tmp1.c[0] = tmp0.c[3]; 210 tmp1.c[1] = tmp0.c[2]; 211 tmp1.c[2] = tmp0.c[1]; 212 tmp1.c[3] = tmp0.c[0]; 213 return(tmp1.a); 214 } 215 216 static int openwifi_init_tx_ring(struct openwifi_priv *priv, int ring_idx) 217 { 218 struct openwifi_ring *ring = &(priv->tx_ring[ring_idx]); 219 int i; 220 221 ring->stop_flag = 0; 222 ring->bd_wr_idx = 0; 223 ring->bd_rd_idx = 0; 224 ring->bds = kmalloc(sizeof(struct openwifi_buffer_descriptor)*NUM_TX_BD,GFP_KERNEL); 225 if (ring->bds==NULL) { 226 printk("%s openwifi_init_tx_ring: WARNING Cannot allocate TX ring\n",sdr_compatible_str); 227 return -ENOMEM; 228 } 229 230 for (i = 0; i < NUM_TX_BD; i++) { 231 ring->bds[i].skb_linked=0; // for tx, skb is from upper layer 232 //at frist right after skb allocated, head, data, tail are the same. 233 ring->bds[i].dma_mapping_addr = 0; // for tx, mapping is done after skb is received from uppler layer in tx routine 234 } 235 236 return 0; 237 } 238 239 static void openwifi_free_tx_ring(struct openwifi_priv *priv, int ring_idx) 240 { 241 struct openwifi_ring *ring = &(priv->tx_ring[ring_idx]); 242 int i; 243 244 ring->stop_flag = 0; 245 ring->bd_wr_idx = 0; 246 ring->bd_rd_idx = 0; 247 for (i = 0; i < NUM_TX_BD; i++) { 248 if (ring->bds[i].skb_linked == 0 && ring->bds[i].dma_mapping_addr == 0) 249 continue; 250 if (ring->bds[i].dma_mapping_addr != 0) 251 dma_unmap_single(priv->tx_chan->device->dev, ring->bds[i].dma_mapping_addr,ring->bds[i].skb_linked->len, DMA_MEM_TO_DEV); 252 // if (ring->bds[i].skb_linked!=NULL) 253 // dev_kfree_skb(ring->bds[i].skb_linked); // only use dev_kfree_skb when there is exception 254 if ( (ring->bds[i].dma_mapping_addr != 0 && ring->bds[i].skb_linked == 0) || 255 (ring->bds[i].dma_mapping_addr == 0 && ring->bds[i].skb_linked != 0)) 256 printk("%s openwifi_free_tx_ring: WARNING ring %d i %d skb_linked %p dma_mapping_addr %08llx\n", sdr_compatible_str, 257 ring_idx, i, (void*)(ring->bds[i].skb_linked), ring->bds[i].dma_mapping_addr); 258 259 ring->bds[i].skb_linked=0; 260 ring->bds[i].dma_mapping_addr = 0; 261 } 262 if (ring->bds) 263 kfree(ring->bds); 264 ring->bds = NULL; 265 } 266 267 static int openwifi_init_rx_ring(struct openwifi_priv *priv) 268 { 269 priv->rx_cyclic_buf = dma_alloc_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,&priv->rx_cyclic_buf_dma_mapping_addr,GFP_KERNEL); 270 if (!priv->rx_cyclic_buf) { 271 printk("%s openwifi_init_rx_ring: WARNING dma_alloc_coherent failed!\n", sdr_compatible_str); 272 dma_free_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,priv->rx_cyclic_buf,priv->rx_cyclic_buf_dma_mapping_addr); 273 return(-1); 274 } 275 return 0; 276 } 277 278 static void openwifi_free_rx_ring(struct openwifi_priv *priv) 279 { 280 if (priv->rx_cyclic_buf) 281 dma_free_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,priv->rx_cyclic_buf,priv->rx_cyclic_buf_dma_mapping_addr); 282 283 priv->rx_cyclic_buf_dma_mapping_addr = 0; 284 priv->rx_cyclic_buf = 0; 285 } 286 287 static int rx_dma_setup(struct ieee80211_hw *dev){ 288 struct openwifi_priv *priv = dev->priv; 289 struct dma_device *rx_dev = priv->rx_chan->device; 290 291 priv->rxd = rx_dev->device_prep_dma_cyclic(priv->rx_chan,priv->rx_cyclic_buf_dma_mapping_addr,RX_BD_BUF_SIZE*NUM_RX_BD,RX_BD_BUF_SIZE,DMA_DEV_TO_MEM,DMA_CTRL_ACK|DMA_PREP_INTERRUPT); 292 if (!(priv->rxd)) { 293 openwifi_free_rx_ring(priv); 294 printk("%s rx_dma_setup: WARNING rx_dev->device_prep_dma_cyclic %p\n", sdr_compatible_str, (void*)(priv->rxd)); 295 return(-1); 296 } 297 priv->rxd->callback = 0; 298 priv->rxd->callback_param = 0; 299 300 priv->rx_cookie = priv->rxd->tx_submit(priv->rxd); 301 302 if (dma_submit_error(priv->rx_cookie)) { 303 printk("%s rx_dma_setup: WARNING dma_submit_error(rx_cookie) %d\n", sdr_compatible_str, (u32)(priv->rx_cookie)); 304 return(-1); 305 } 306 307 dma_async_issue_pending(priv->rx_chan); 308 return(0); 309 } 310 311 static irqreturn_t openwifi_rx_interrupt(int irq, void *dev_id) 312 { 313 struct ieee80211_hw *dev = dev_id; 314 struct openwifi_priv *priv = dev->priv; 315 struct ieee80211_rx_status rx_status = {0}; 316 struct sk_buff *skb; 317 struct ieee80211_hdr *hdr; 318 u32 addr1_low32=0, addr2_low32=0, addr3_low32=0, len, rate_idx, tsft_low, tsft_high, loop_count=0, ht_flag, short_gi;//, fc_di; 319 // u32 dma_driver_buf_idx_mod; 320 u8 *pdata_tmp, fcs_ok, target_buf_idx;//, phy_rx_sn_hw; 321 s8 signal; 322 u16 rssi_val, addr1_high16=0, addr2_high16=0, addr3_high16=0, sc=0; 323 bool content_ok = false, len_overflow = false; 324 struct dma_tx_state state; 325 static u8 target_buf_idx_old = 0xFF; 326 327 spin_lock(&priv->lock); 328 priv->rx_chan->device->device_tx_status(priv->rx_chan,priv->rx_cookie,&state); 329 target_buf_idx = ((state.residue-1)&(NUM_RX_BD-1)); 330 331 while( target_buf_idx_old!=target_buf_idx ) { // loop all rx buffers that have new rx packets 332 target_buf_idx_old=((target_buf_idx_old+1)&(NUM_RX_BD-1)); 333 pdata_tmp = priv->rx_cyclic_buf + target_buf_idx_old*RX_BD_BUF_SIZE; // our header insertion is at the beginning 334 tsft_low = (*((u32*)(pdata_tmp+0 ))); 335 tsft_high = (*((u32*)(pdata_tmp+4 ))); 336 rssi_val = (*((u16*)(pdata_tmp+8 ))); 337 len = (*((u16*)(pdata_tmp+12))); 338 339 len_overflow = (len>(RX_BD_BUF_SIZE-16)?true:false); 340 341 rate_idx = (*((u16*)(pdata_tmp+14))); 342 short_gi = ((rate_idx&0x20)!=0); 343 rate_idx = (rate_idx&0xDF); 344 345 fcs_ok = ( len_overflow?0:(*(( u8*)(pdata_tmp+16+len-1))) ); 346 347 //phy_rx_sn_hw = (fcs_ok&(NUM_RX_BD-1)); 348 // phy_rx_sn_hw = (fcs_ok&0x7f);//0x7f is FPGA limitation 349 // dma_driver_buf_idx_mod = (state.residue&0x7f); 350 fcs_ok = ((fcs_ok&0x80)!=0); 351 ht_flag = ((rate_idx&0x10)!=0); 352 353 if ( (len>=14 && (!len_overflow)) && (rate_idx>=8 && rate_idx<=23)) { 354 // if ( phy_rx_sn_hw!=dma_driver_buf_idx_mod) { 355 // printk("%s openwifi_rx_interrupt: WARNING sn %d next buf_idx %d!\n", sdr_compatible_str,phy_rx_sn_hw,dma_driver_buf_idx_mod); 356 // } 357 content_ok = true; 358 } else { 359 printk("%s openwifi_rx_interrupt: WARNING content!\n", sdr_compatible_str); 360 content_ok = false; 361 } 362 363 rssi_val = (rssi_val>>1); 364 if ( (rssi_val+128)<priv->rssi_correction ) 365 signal = -128; 366 else 367 signal = rssi_val - priv->rssi_correction; 368 369 // fc_di = (*((u32*)(pdata_tmp+16))); 370 // addr1_high16 = (*((u16*)(pdata_tmp+16+4))); 371 // addr1_low32 = (*((u32*)(pdata_tmp+16+4+2))); 372 // addr2_high16 = (*((u16*)(pdata_tmp+16+6+4))); 373 // addr2_low32 = (*((u32*)(pdata_tmp+16+6+4+2))); 374 // addr3_high16 = (*((u16*)(pdata_tmp+16+12+4))); 375 // addr3_low32 = (*((u32*)(pdata_tmp+16+12+4+2))); 376 if ( (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&2) || ( (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&1) && fcs_ok==0 ) ) { 377 hdr = (struct ieee80211_hdr *)(pdata_tmp+16); 378 addr1_low32 = *((u32*)(hdr->addr1+2)); 379 addr1_high16 = *((u16*)(hdr->addr1)); 380 if (len>=20) { 381 addr2_low32 = *((u32*)(hdr->addr2+2)); 382 addr2_high16 = *((u16*)(hdr->addr2)); 383 } 384 if (len>=26) { 385 addr3_low32 = *((u32*)(hdr->addr3+2)); 386 addr3_high16 = *((u16*)(hdr->addr3)); 387 } 388 if (len>=28) 389 sc = hdr->seq_ctrl; 390 391 if ( addr1_low32!=0xffffffff || addr1_high16!=0xffff ) 392 printk("%s openwifi_rx_interrupt:%4dbytes ht%d %3dM FC%04x DI%04x addr1/2/3:%04x%08x/%04x%08x/%04x%08x SC%04x fcs%d buf_idx%d %ddBm\n", sdr_compatible_str, 393 len, ht_flag, wifi_rate_table[rate_idx], hdr->frame_control, hdr->duration_id, 394 reverse16(addr1_high16), reverse32(addr1_low32), reverse16(addr2_high16), reverse32(addr2_low32), reverse16(addr3_high16), reverse32(addr3_low32), 395 sc, fcs_ok, target_buf_idx_old, signal); 396 } 397 398 // priv->phy_rx_sn_hw_old = phy_rx_sn_hw; 399 if (content_ok) { 400 skb = dev_alloc_skb(len); 401 if (skb) { 402 skb_put_data(skb,pdata_tmp+16,len); 403 404 rx_status.antenna = 0; 405 // def in ieee80211_rate openwifi_rates 0~11. 0~3 11b(1M~11M), 4~11 11a/g(6M~54M) 406 rx_status.rate_idx = wifi_rate_table_mapping[rate_idx]; 407 rx_status.signal = signal; 408 rx_status.freq = dev->conf.chandef.chan->center_freq; 409 rx_status.band = dev->conf.chandef.chan->band; 410 rx_status.mactime = ( ( (u64)tsft_low ) | ( ((u64)tsft_high)<<32 ) ); 411 rx_status.flag |= RX_FLAG_MACTIME_START; 412 if (!fcs_ok) 413 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC; 414 if (rate_idx <= 15) 415 rx_status.encoding = RX_ENC_LEGACY; 416 else 417 rx_status.encoding = RX_ENC_HT; 418 rx_status.bw = RATE_INFO_BW_20; 419 if (short_gi) 420 rx_status.enc_flags |= RX_ENC_FLAG_SHORT_GI; 421 422 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status)); // put rx_status into skb->cb, from now on skb->cb is not dma_dsts any more. 423 ieee80211_rx_irqsafe(dev, skb); // call mac80211 function 424 } else 425 printk("%s openwifi_rx_interrupt: WARNING dev_alloc_skb failed!\n", sdr_compatible_str); 426 } 427 loop_count++; 428 } 429 430 if ( loop_count!=1 && (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&1) ) 431 printk("%s openwifi_rx_interrupt: WARNING loop_count %d\n", sdr_compatible_str,loop_count); 432 433 // openwifi_rx_interrupt_out: 434 spin_unlock(&priv->lock); 435 return IRQ_HANDLED; 436 } 437 438 static irqreturn_t openwifi_tx_interrupt(int irq, void *dev_id) 439 { 440 struct ieee80211_hw *dev = dev_id; 441 struct openwifi_priv *priv = dev->priv; 442 struct openwifi_ring *ring; 443 struct sk_buff *skb; 444 struct ieee80211_tx_info *info; 445 u32 reg_val, hw_queue_len, prio, queue_idx, dma_fifo_no_room_flag, cw, loop_count=0;//, i; 446 u8 tx_result_report; 447 // u16 prio_rd_idx_store[64]={0}; 448 449 spin_lock(&priv->lock); 450 451 while(1) { // loop all packets that have been sent by FPGA 452 reg_val = tx_intf_api->TX_INTF_REG_PKT_INFO_read(); 453 if (reg_val!=0x7FFFFF) { 454 prio = ((0x7FFFF & reg_val)>>(5+NUM_BIT_MAX_PHY_TX_SN+NUM_BIT_MAX_NUM_HW_QUEUE)); 455 cw = (reg_val>>(2+5+NUM_BIT_MAX_PHY_TX_SN+NUM_BIT_MAX_NUM_HW_QUEUE)); 456 ring = &(priv->tx_ring[prio]); 457 ring->bd_rd_idx = ((reg_val>>5)&MAX_PHY_TX_SN); 458 skb = ring->bds[ring->bd_rd_idx].skb_linked; 459 460 dma_unmap_single(priv->tx_chan->device->dev,ring->bds[ring->bd_rd_idx].dma_mapping_addr, 461 skb->len, DMA_MEM_TO_DEV); 462 463 if ( ring->stop_flag == 1) { 464 // Wake up Linux queue if FPGA and driver ring have room 465 queue_idx = ((reg_val>>(5+NUM_BIT_MAX_PHY_TX_SN))&(MAX_NUM_HW_QUEUE-1)); 466 dma_fifo_no_room_flag = tx_intf_api->TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read(); 467 hw_queue_len = tx_intf_api->TX_INTF_REG_QUEUE_FIFO_DATA_COUNT_read(); 468 469 // printk("%s openwifi_tx_interrupt: WARNING loop %d prio %d queue %d no room flag %x hw queue len %08x wr %d rd %d call %d\n", sdr_compatible_str, 470 // loop_count, prio, queue_idx, dma_fifo_no_room_flag, hw_queue_len, ring->bd_wr_idx, ring->bd_rd_idx, priv->call_counter); 471 472 if ( ((dma_fifo_no_room_flag>>queue_idx)&1)==0 && (NUM_TX_BD-((hw_queue_len>>(queue_idx*8))&0xFF))>=RING_ROOM_THRESHOLD ) { 473 // printk("%s openwifi_tx_interrupt: WARNING ieee80211_wake_queue loop %d call %d\n", sdr_compatible_str, loop_count, priv->call_counter); 474 printk("%s openwifi_tx_interrupt: WARNING ieee80211_wake_queue prio %d queue %d no room flag %x hw queue len %08x wr %d rd %d\n", sdr_compatible_str, 475 prio, queue_idx, dma_fifo_no_room_flag, hw_queue_len, ring->bd_wr_idx, ring->bd_rd_idx); 476 ieee80211_wake_queue(dev, prio); 477 ring->stop_flag = 0; 478 } 479 } 480 481 if ( (*(u32*)(&(skb->data[4]))) || ((*(u32*)(&(skb->data[12])))&0xFFFF0000) ) { 482 printk("%s openwifi_tx_interrupt: WARNING %08x %08x %08x %08x\n", sdr_compatible_str, *(u32*)(&(skb->data[12])), *(u32*)(&(skb->data[8])), *(u32*)(&(skb->data[4])), *(u32*)(&(skb->data[0]))); 483 continue; 484 } 485 486 skb_pull(skb, LEN_PHY_HEADER); 487 //skb_trim(skb, num_byte_pad_skb); 488 info = IEEE80211_SKB_CB(skb); 489 ieee80211_tx_info_clear_status(info); 490 491 tx_result_report = (reg_val&0x1F); 492 if ( !(info->flags & IEEE80211_TX_CTL_NO_ACK) ) { 493 if ((tx_result_report&0x10)==0) 494 info->flags |= IEEE80211_TX_STAT_ACK; 495 496 // printk("%s openwifi_tx_interrupt: rate&try: %d %d %03x; %d %d %03x; %d %d %03x; %d %d %03x\n", sdr_compatible_str, 497 // info->status.rates[0].idx,info->status.rates[0].count,info->status.rates[0].flags, 498 // info->status.rates[1].idx,info->status.rates[1].count,info->status.rates[1].flags, 499 // info->status.rates[2].idx,info->status.rates[2].count,info->status.rates[2].flags, 500 // info->status.rates[3].idx,info->status.rates[3].count,info->status.rates[3].flags); 501 } 502 503 info->status.rates[0].count = (tx_result_report&0xF) + 1; //according to our test, the 1st rate is the most important. we only do retry on the 1st rate 504 info->status.rates[1].idx = -1; 505 info->status.rates[2].idx = -1; 506 info->status.rates[3].idx = -1;//in mac80211.h: #define IEEE80211_TX_MAX_RATES 4 507 508 if ( (tx_result_report&0x10) && ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&1) ) 509 printk("%s openwifi_tx_interrupt: WARNING tx_result %02x prio%d wr%d rd%d\n", sdr_compatible_str, tx_result_report, prio, ring->bd_wr_idx, ring->bd_rd_idx); 510 if ( ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&2) ) 511 printk("%s openwifi_tx_interrupt: tx_result %02x prio%d wr%d rd%d cw %d\n", sdr_compatible_str, tx_result_report, prio, ring->bd_wr_idx, ring->bd_rd_idx, cw); 512 513 ieee80211_tx_status_irqsafe(dev, skb); 514 515 loop_count++; 516 517 // printk("%s openwifi_tx_interrupt: loop %d prio %d rd %d\n", sdr_compatible_str, loop_count, prio, ring->bd_rd_idx); 518 519 } else 520 break; 521 } 522 if ( loop_count!=1 && ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&1) ) 523 printk("%s openwifi_tx_interrupt: WARNING loop_count %d\n", sdr_compatible_str, loop_count); 524 525 spin_unlock(&priv->lock); 526 return IRQ_HANDLED; 527 } 528 529 u32 gen_parity(u32 v){ 530 v ^= v >> 1; 531 v ^= v >> 2; 532 v = (v & 0x11111111U) * 0x11111111U; 533 return (v >> 28) & 1; 534 } 535 536 u8 gen_ht_sig_crc(u64 m) 537 { 538 u8 i, temp, c[8] = {1, 1, 1, 1, 1, 1, 1, 1}, ht_sig_crc; 539 540 for (i = 0; i < 34; i++) 541 { 542 temp = c[7] ^ ((m >> i) & 0x01); 543 544 c[7] = c[6]; 545 c[6] = c[5]; 546 c[5] = c[4]; 547 c[4] = c[3]; 548 c[3] = c[2]; 549 c[2] = c[1] ^ temp; 550 c[1] = c[0] ^ temp; 551 c[0] = temp; 552 } 553 ht_sig_crc = ((~c[7] & 0x01) << 0) | ((~c[6] & 0x01) << 1) | ((~c[5] & 0x01) << 2) | ((~c[4] & 0x01) << 3) | ((~c[3] & 0x01) << 4) | ((~c[2] & 0x01) << 5) | ((~c[1] & 0x01) << 6) | ((~c[0] & 0x01) << 7); 554 555 return ht_sig_crc; 556 } 557 558 u32 calc_phy_header(u8 rate_hw_value, bool use_ht_rate, bool use_short_gi, u32 len, u8 *bytes){ 559 //u32 signal_word = 0 ; 560 u8 SIG_RATE = 0, HT_SIG_RATE; 561 u8 len_2to0, len_10to3, len_msb,b0,b1,b2, header_parity ; 562 u32 l_len, ht_len, ht_sig1, ht_sig2; 563 564 // printk("rate_hw_value=%u\tuse_ht_rate=%u\tuse_short_gi=%u\tlen=%u\n", rate_hw_value, use_ht_rate, use_short_gi, len); 565 566 // HT-mixed mode ht signal 567 568 if(use_ht_rate) 569 { 570 SIG_RATE = wifi_mcs_table_11b_force_up[4]; 571 HT_SIG_RATE = rate_hw_value; 572 l_len = 24 * len / wifi_n_dbps_ht_table[rate_hw_value]; 573 ht_len = len; 574 } 575 else 576 { 577 // rate_hw_value = (rate_hw_value<=4?0:(rate_hw_value-4)); 578 // SIG_RATE = wifi_mcs_table_phy_tx[rate_hw_value]; 579 SIG_RATE = wifi_mcs_table_11b_force_up[rate_hw_value]; 580 l_len = len; 581 } 582 583 len_2to0 = l_len & 0x07 ; 584 len_10to3 = (l_len >> 3 ) & 0xFF ; 585 len_msb = (l_len >> 11) & 0x01 ; 586 587 b0=SIG_RATE | (len_2to0 << 5) ; 588 b1 = len_10to3 ; 589 header_parity = gen_parity((len_msb << 16)| (b1<<8) | b0) ; 590 b2 = ( len_msb | (header_parity << 1) ) ; 591 592 memset(bytes,0,16); 593 bytes[0] = b0 ; 594 bytes[1] = b1 ; 595 bytes[2] = b2; 596 597 // HT-mixed mode signal 598 if(use_ht_rate) 599 { 600 ht_sig1 = (HT_SIG_RATE & 0x7F) | ((ht_len << 8) & 0xFFFF00); 601 ht_sig2 = 0x04 | (use_short_gi << 7); 602 ht_sig2 = ht_sig2 | (gen_ht_sig_crc(ht_sig1 | ht_sig2 << 24) << 10); 603 604 bytes[3] = 1; 605 bytes[8] = (ht_sig1 & 0xFF); 606 bytes[9] = (ht_sig1 >> 8) & 0xFF; 607 bytes[10] = (ht_sig1 >> 16) & 0xFF; 608 bytes[11] = (ht_sig2 & 0xFF); 609 bytes[12] = (ht_sig2 >> 8) & 0xFF; 610 bytes[13] = (ht_sig2 >> 16) & 0xFF; 611 612 return(HT_SIG_RATE); 613 } 614 else 615 { 616 //signal_word = b0+(b1<<8)+(b2<<16) ; 617 //return signal_word; 618 return(SIG_RATE); 619 } 620 } 621 622 static inline struct gpio_led_data * //please align with the implementation in leds-gpio.c 623 cdev_to_gpio_led_data(struct led_classdev *led_cdev) 624 { 625 return container_of(led_cdev, struct gpio_led_data, cdev); 626 } 627 628 static void openwifi_tx(struct ieee80211_hw *dev, 629 struct ieee80211_tx_control *control, 630 struct sk_buff *skb) 631 { 632 struct openwifi_priv *priv = dev->priv; 633 unsigned long flags; 634 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 635 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 636 struct openwifi_ring *ring; 637 dma_addr_t dma_mapping_addr; 638 unsigned int prio, i; 639 u32 num_dma_symbol, len_mac_pdu, num_dma_byte, len_phy_packet, num_byte_pad; 640 u32 rate_signal_value,rate_hw_value,ack_flag; 641 u32 pkt_need_ack, addr1_low32=0, addr2_low32=0, addr3_low32=0, queue_idx=2, dma_reg, cts_reg;//, openofdm_state_history; 642 u16 addr1_high16=0, addr2_high16=0, addr3_high16=0, sc=0, cts_duration=0, cts_rate_hw_value = 0, cts_rate_signal_value=0, sifs, ack_duration=0, traffic_pkt_duration; 643 u8 fc_flag,fc_type,fc_subtype,retry_limit_raw,*dma_buf,retry_limit_hw_value,rc_flags; 644 bool use_rts_cts, use_cts_protect, use_ht_rate=false, use_short_gi, addr_flag, cts_use_traffic_rate=false, force_use_cts_protect=false; 645 __le16 frame_control,duration_id; 646 u32 dma_fifo_no_room_flag, hw_queue_len; 647 enum dma_status status; 648 // static bool led_status=0; 649 // struct gpio_led_data *led_dat = cdev_to_gpio_led_data(priv->led[3]); 650 651 // if ( (priv->phy_tx_sn&7) ==0 ) { 652 // openofdm_state_history = openofdm_rx_api->OPENOFDM_RX_REG_STATE_HISTORY_read(); 653 // if (openofdm_state_history!=openofdm_state_history_old){ 654 // led_status = (~led_status); 655 // openofdm_state_history_old = openofdm_state_history; 656 // gpiod_set_value(led_dat->gpiod, led_status); 657 // } 658 // } 659 660 if (test_mode==1){ 661 printk("%s openwifi_tx: WARNING test_mode==1\n", sdr_compatible_str); 662 goto openwifi_tx_early_out; 663 } 664 665 if (skb->data_len>0) {// more data are not in linear data area skb->data 666 printk("%s openwifi_tx: WARNING skb->data_len>0\n", sdr_compatible_str); 667 goto openwifi_tx_early_out; 668 } 669 670 len_mac_pdu = skb->len; 671 len_phy_packet = len_mac_pdu + LEN_PHY_HEADER; 672 num_dma_symbol = (len_phy_packet>>TX_INTF_NUM_BYTE_PER_DMA_SYMBOL_IN_BITS) + ((len_phy_packet&(TX_INTF_NUM_BYTE_PER_DMA_SYMBOL-1))!=0); 673 674 // get Linux priority/queue setting info and target mac address 675 prio = skb_get_queue_mapping(skb); 676 addr1_low32 = *((u32*)(hdr->addr1+2)); 677 ring = &(priv->tx_ring[prio]); 678 679 // -------------- DO your idea here! Map Linux/SW "prio" to hardware "queue_idx" ----------- 680 if (priv->slice_idx == 0xFFFFFFFF) {// use Linux default prio setting, if there isn't any slice config 681 queue_idx = prio; 682 } else {// customized prio to queue_idx mapping 683 //if (fc_type==2 && fc_subtype==0 && (!addr_flag)) { // for unicast data packet only 684 // check current packet belonging to which slice/hw-queue 685 for (i=0; i<MAX_NUM_HW_QUEUE; i++) { 686 if ( priv->dest_mac_addr_queue_map[i] == addr1_low32 ) { 687 break; 688 } 689 } 690 //} 691 queue_idx = (i>=MAX_NUM_HW_QUEUE?2:i); // if no address is hit, use FPGA queue 2. becuase the queue 2 is the longest. 692 } 693 // -------------------- end of Map Linux/SW "prio" to hardware "queue_idx" ------------------ 694 695 // check whether the packet is bigger than DMA buffer size 696 num_dma_byte = (num_dma_symbol<<TX_INTF_NUM_BYTE_PER_DMA_SYMBOL_IN_BITS); 697 if (num_dma_byte > TX_BD_BUF_SIZE) { 698 // dev_err(priv->tx_chan->device->dev, "sdr,sdr openwifi_tx: WARNING num_dma_byte > TX_BD_BUF_SIZE\n"); 699 printk("%s openwifi_tx: WARNING sn %d num_dma_byte > TX_BD_BUF_SIZE\n", sdr_compatible_str, ring->bd_wr_idx); 700 goto openwifi_tx_early_out; 701 } 702 num_byte_pad = num_dma_byte-len_phy_packet; 703 704 // get other info from packet header 705 addr1_high16 = *((u16*)(hdr->addr1)); 706 if (len_mac_pdu>=20) { 707 addr2_low32 = *((u32*)(hdr->addr2+2)); 708 addr2_high16 = *((u16*)(hdr->addr2)); 709 } 710 if (len_mac_pdu>=26) { 711 addr3_low32 = *((u32*)(hdr->addr3+2)); 712 addr3_high16 = *((u16*)(hdr->addr3)); 713 } 714 715 duration_id = hdr->duration_id; 716 frame_control=hdr->frame_control; 717 ack_flag = (info->flags&IEEE80211_TX_CTL_NO_ACK); 718 fc_type = ((frame_control)>>2)&3; 719 fc_subtype = ((frame_control)>>4)&0xf; 720 fc_flag = ( fc_type==2 || fc_type==0 || (fc_type==1 && (fc_subtype==8 || fc_subtype==9 || fc_subtype==10) ) ); 721 //if it is broadcasting or multicasting addr 722 addr_flag = ( (addr1_low32==0 && addr1_high16==0) || 723 (addr1_low32==0xFFFFFFFF && addr1_high16==0xFFFF) || 724 (addr1_high16==0x3333) || 725 (addr1_high16==0x0001 && hdr->addr1[2]==0x5E) ); 726 if ( fc_flag && ( !addr_flag ) && (!ack_flag) ) { // unicast data frame 727 pkt_need_ack = 1; //FPGA need to wait ACK after this pkt sent 728 } else { 729 pkt_need_ack = 0; 730 } 731 732 // get Linux rate (MCS) setting 733 rate_hw_value = ieee80211_get_tx_rate(dev, info)->hw_value; 734 //rate_hw_value = 10; //4:6M, 5:9M, 6:12M, 7:18M, 8:24M, 9:36M, 10:48M, 11:54M 735 if (priv->drv_tx_reg_val[DRV_TX_REG_IDX_RATE]>0 && fc_type==2 && (!addr_flag)) //rate override command 736 rate_hw_value = priv->drv_tx_reg_val[DRV_TX_REG_IDX_RATE]; 737 738 retry_limit_raw = info->control.rates[0].count; 739 740 rc_flags = info->control.rates[0].flags; 741 use_rts_cts = ((rc_flags&IEEE80211_TX_RC_USE_RTS_CTS)!=0); 742 use_cts_protect = ((rc_flags&IEEE80211_TX_RC_USE_CTS_PROTECT)!=0); 743 use_ht_rate = ((rc_flags&IEEE80211_TX_RC_MCS)!=0); 744 use_short_gi = ((rc_flags&IEEE80211_TX_RC_SHORT_GI)!=0); 745 746 if (use_rts_cts) 747 printk("%s openwifi_tx: WARNING sn %d use_rts_cts is not supported!\n", sdr_compatible_str, ring->bd_wr_idx); 748 749 if (use_cts_protect) { 750 cts_rate_hw_value = ieee80211_get_rts_cts_rate(dev, info)->hw_value; 751 cts_duration = le16_to_cpu(ieee80211_ctstoself_duration(dev,info->control.vif,len_mac_pdu,info)); 752 } else if (force_use_cts_protect) { // could override mac80211 setting here. 753 cts_rate_hw_value = 4; //wifi_mcs_table_11b_force_up[] translate it to 1011(6M) 754 sifs = (priv->actual_rx_lo<2500?10:16); 755 if (pkt_need_ack) 756 ack_duration = 44;//assume the ack we wait use 6Mbps: 4*ceil((22+14*8)/24) + 20(preamble+SIGNAL) 757 traffic_pkt_duration = 20 + 4*(((22+len_mac_pdu*8)/wifi_n_dbps_table[rate_hw_value])+1); 758 cts_duration = traffic_pkt_duration + sifs + pkt_need_ack*(sifs+ack_duration); 759 } 760 761 // this is 11b stuff 762 // if (info->flags&IEEE80211_TX_RC_USE_SHORT_PREAMBLE) 763 // printk("%s openwifi_tx: WARNING IEEE80211_TX_RC_USE_SHORT_PREAMBLE\n", sdr_compatible_str); 764 765 if (len_mac_pdu>=28) { 766 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { 767 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) 768 priv->seqno += 0x10; 769 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); 770 hdr->seq_ctrl |= cpu_to_le16(priv->seqno); 771 } 772 sc = hdr->seq_ctrl; 773 } 774 775 if ( (!addr_flag) && (priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG]&2) ) 776 printk("%s openwifi_tx: %4dbytes ht%d %3dM FC%04x DI%04x addr1/2/3:%04x%08x/%04x%08x/%04x%08x SC%04x flag%08x retr%d ack%d prio%d q%d wr%d rd%d\n", sdr_compatible_str, 777 len_mac_pdu, (use_ht_rate == false ? 0 : 1), (use_ht_rate == false ? wifi_rate_all[rate_hw_value] : wifi_rate_all[rate_hw_value + 12]),frame_control,duration_id, 778 reverse16(addr1_high16), reverse32(addr1_low32), reverse16(addr2_high16), reverse32(addr2_low32), reverse16(addr3_high16), reverse32(addr3_low32), 779 sc, info->flags, retry_limit_raw, pkt_need_ack, prio, queue_idx, 780 // use_rts_cts,use_cts_protect|force_use_cts_protect,wifi_rate_all[cts_rate_hw_value],cts_duration, 781 ring->bd_wr_idx,ring->bd_rd_idx); 782 783 // printk("%s openwifi_tx: rate&try: %d %d %03x; %d %d %03x; %d %d %03x; %d %d %03x\n", sdr_compatible_str, 784 // info->status.rates[0].idx,info->status.rates[0].count,info->status.rates[0].flags, 785 // info->status.rates[1].idx,info->status.rates[1].count,info->status.rates[1].flags, 786 // info->status.rates[2].idx,info->status.rates[2].count,info->status.rates[2].flags, 787 // info->status.rates[3].idx,info->status.rates[3].count,info->status.rates[3].flags); 788 789 // -----------end of preprocess some info from header and skb---------------- 790 791 // /* HW will perform RTS-CTS when only RTS flags is set. 792 // * HW will perform CTS-to-self when both RTS and CTS flags are set. 793 // * RTS rate and RTS duration will be used also for CTS-to-self. 794 // */ 795 // if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) { 796 // tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; 797 // rts_duration = ieee80211_rts_duration(dev, priv->vif[0], // assume all vif have the same config 798 // len_mac_pdu, info); 799 // printk("%s openwifi_tx: rc_flags & IEEE80211_TX_RC_USE_RTS_CTS\n", sdr_compatible_str); 800 // } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { 801 // tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; 802 // rts_duration = ieee80211_ctstoself_duration(dev, priv->vif[0], // assume all vif have the same config 803 // len_mac_pdu, info); 804 // printk("%s openwifi_tx: rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT\n", sdr_compatible_str); 805 // } 806 807 // when skb does not have enough headroom, skb_push will cause kernel panic. headroom needs to be extended if necessary 808 if (skb_headroom(skb)<LEN_PHY_HEADER) { 809 struct sk_buff *skb_new; // in case original skb headroom is not enough to host phy header needed by FPGA IP core 810 printk("%s openwifi_tx: WARNING sn %d skb_headroom(skb)<LEN_PHY_HEADER\n", sdr_compatible_str, ring->bd_wr_idx); 811 if ((skb_new = skb_realloc_headroom(skb, LEN_PHY_HEADER)) == NULL) { 812 printk("%s openwifi_tx: WARNING sn %d skb_realloc_headroom failed!\n", sdr_compatible_str, ring->bd_wr_idx); 813 goto openwifi_tx_early_out; 814 } 815 if (skb->sk != NULL) 816 skb_set_owner_w(skb_new, skb->sk); 817 dev_kfree_skb(skb); 818 skb = skb_new; 819 } 820 821 skb_push( skb, LEN_PHY_HEADER ); 822 rate_signal_value = calc_phy_header(rate_hw_value, use_ht_rate, use_short_gi, len_mac_pdu+LEN_PHY_CRC, skb->data); //fill the phy header 823 824 825 //make sure dma length is integer times of DDC_NUM_BYTE_PER_DMA_SYMBOL 826 if (skb_tailroom(skb)<num_byte_pad) { 827 printk("%s openwifi_tx: WARNING sn %d skb_tailroom(skb)<num_byte_pad!\n", sdr_compatible_str, ring->bd_wr_idx); 828 // skb_pull(skb, LEN_PHY_HEADER); 829 goto openwifi_tx_early_out; 830 } 831 skb_put( skb, num_byte_pad ); 832 833 retry_limit_hw_value = (retry_limit_raw - 1)&0xF; 834 dma_buf = skb->data; 835 836 cts_rate_signal_value = wifi_mcs_table_11b_force_up[cts_rate_hw_value]; 837 cts_reg = (((use_cts_protect|force_use_cts_protect)<<31)|(cts_use_traffic_rate<<30)|(cts_duration<<8)|(cts_rate_signal_value<<4)|rate_signal_value); 838 dma_reg = ( (( ((prio<<(NUM_BIT_MAX_NUM_HW_QUEUE+NUM_BIT_MAX_PHY_TX_SN))|(ring->bd_wr_idx<<NUM_BIT_MAX_NUM_HW_QUEUE)|queue_idx) )<<18)|(retry_limit_hw_value<<14)|(pkt_need_ack<<13)|num_dma_symbol ); 839 840 /* We must be sure that tx_flags is written last because the HW 841 * looks at it to check if the rest of data is valid or not 842 */ 843 //wmb(); 844 // entry->flags = cpu_to_le32(tx_flags); 845 /* We must be sure this has been written before followings HW 846 * register write, because this write will made the HW attempts 847 * to DMA the just-written data 848 */ 849 //wmb(); 850 851 spin_lock_irqsave(&priv->lock, flags); // from now on, we'd better avoid interrupt because ring->stop_flag is shared with interrupt 852 853 // -------------check whether FPGA dma fifo and queue (queue_idx) has enough room------------- 854 dma_fifo_no_room_flag = tx_intf_api->TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read(); 855 hw_queue_len = tx_intf_api->TX_INTF_REG_QUEUE_FIFO_DATA_COUNT_read(); 856 if ( ((dma_fifo_no_room_flag>>queue_idx)&1) || ((NUM_TX_BD-((hw_queue_len>>(queue_idx*8))&0xFF))<RING_ROOM_THRESHOLD) || ring->stop_flag==1 ) { 857 ieee80211_stop_queue(dev, prio); // here we should stop those prio related to the queue idx flag set in TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read 858 printk("%s openwifi_tx: WARNING ieee80211_stop_queue prio %d queue %d no room flag %x hw queue len %08x request %d wr %d rd %d\n", sdr_compatible_str, 859 prio, queue_idx, dma_fifo_no_room_flag, hw_queue_len, num_dma_symbol, ring->bd_wr_idx, ring->bd_rd_idx); 860 ring->stop_flag = 1; 861 goto openwifi_tx_early_out_after_lock; 862 } 863 // --------end of check whether FPGA fifo (queue_idx) has enough room------------ 864 865 status = dma_async_is_tx_complete(priv->tx_chan, priv->tx_cookie, NULL, NULL); 866 if (status!=DMA_COMPLETE) { 867 printk("%s openwifi_tx: WARNING status!=DMA_COMPLETE\n", sdr_compatible_str); 868 goto openwifi_tx_early_out_after_lock; 869 } 870 871 if ( (*(u32*)(&(skb->data[4]))) || ((*(u32*)(&(skb->data[12])))&0xFFFF0000) ) { 872 printk("%s openwifi_tx: WARNING 1 %d %08x %08x %08x %08x\n", sdr_compatible_str, num_byte_pad, *(u32*)(&(skb->data[12])), *(u32*)(&(skb->data[8])), *(u32*)(&(skb->data[4])), *(u32*)(&(skb->data[0]))); 873 goto openwifi_tx_early_out_after_lock; 874 } 875 876 //-------------------------fire skb DMA to hardware---------------------------------- 877 dma_mapping_addr = dma_map_single(priv->tx_chan->device->dev, dma_buf, 878 num_dma_byte, DMA_MEM_TO_DEV); 879 880 if (dma_mapping_error(priv->tx_chan->device->dev,dma_mapping_addr)) { 881 // dev_err(priv->tx_chan->device->dev, "sdr,sdr openwifi_tx: WARNING TX DMA mapping error\n"); 882 printk("%s openwifi_tx: WARNING sn %d TX DMA mapping error\n", sdr_compatible_str, ring->bd_wr_idx); 883 goto openwifi_tx_early_out_after_lock; 884 } 885 886 sg_init_table(&(priv->tx_sg), 1); // only need to be initialized once in openwifi_start 887 sg_dma_address( &(priv->tx_sg) ) = dma_mapping_addr; 888 sg_dma_len( &(priv->tx_sg) ) = num_dma_byte; 889 890 tx_intf_api->TX_INTF_REG_CTS_TOSELF_CONFIG_write(cts_reg); 891 tx_intf_api->TX_INTF_REG_NUM_DMA_SYMBOL_TO_PL_write(dma_reg); 892 priv->txd = priv->tx_chan->device->device_prep_slave_sg(priv->tx_chan, &(priv->tx_sg),1,DMA_MEM_TO_DEV, DMA_CTRL_ACK | DMA_PREP_INTERRUPT, NULL); 893 if (!(priv->txd)) { 894 printk("%s openwifi_tx: WARNING sn %d device_prep_slave_sg %p\n", sdr_compatible_str, ring->bd_wr_idx, (void*)(priv->txd)); 895 goto openwifi_tx_after_dma_mapping; 896 } 897 898 priv->tx_cookie = priv->txd->tx_submit(priv->txd); 899 900 if (dma_submit_error(priv->tx_cookie)) { 901 printk("%s openwifi_tx: WARNING sn %d dma_submit_error(tx_cookie) %d\n", sdr_compatible_str, ring->bd_wr_idx, (u32)(priv->tx_cookie)); 902 goto openwifi_tx_after_dma_mapping; 903 } 904 905 // seems everything ok. let's mark this pkt in bd descriptor ring 906 ring->bds[ring->bd_wr_idx].skb_linked = skb; 907 ring->bds[ring->bd_wr_idx].dma_mapping_addr = dma_mapping_addr; 908 909 ring->bd_wr_idx = ((ring->bd_wr_idx+1)&(NUM_TX_BD-1)); 910 911 dma_async_issue_pending(priv->tx_chan); 912 913 if ( (*(u32*)(&(skb->data[4]))) || ((*(u32*)(&(skb->data[12])))&0xFFFF0000) ) 914 printk("%s openwifi_tx: WARNING 2 %08x %08x %08x %08x\n", sdr_compatible_str, *(u32*)(&(skb->data[12])), *(u32*)(&(skb->data[8])), *(u32*)(&(skb->data[4])), *(u32*)(&(skb->data[0]))); 915 916 spin_unlock_irqrestore(&priv->lock, flags); 917 918 return; 919 920 openwifi_tx_after_dma_mapping: 921 dma_unmap_single(priv->tx_chan->device->dev, dma_mapping_addr, num_dma_byte, DMA_MEM_TO_DEV); 922 923 openwifi_tx_early_out_after_lock: 924 // skb_pull(skb, LEN_PHY_HEADER); 925 dev_kfree_skb(skb); 926 spin_unlock_irqrestore(&priv->lock, flags); 927 // printk("%s openwifi_tx: WARNING openwifi_tx_after_dma_mapping phy_tx_sn %d queue %d\n", sdr_compatible_str,priv->phy_tx_sn,queue_idx); 928 return; 929 930 openwifi_tx_early_out: 931 dev_kfree_skb(skb); 932 // printk("%s openwifi_tx: WARNING openwifi_tx_early_out phy_tx_sn %d queue %d\n", sdr_compatible_str,priv->phy_tx_sn,queue_idx); 933 } 934 935 static int openwifi_start(struct ieee80211_hw *dev) 936 { 937 struct openwifi_priv *priv = dev->priv; 938 int ret, i, rssi_half_db_offset, agc_gain_delay;//rssi_half_db_th, 939 u32 reg; 940 941 for (i=0; i<MAX_NUM_VIF; i++) { 942 priv->vif[i] = NULL; 943 } 944 945 memset(priv->drv_tx_reg_val, 0, sizeof(priv->drv_tx_reg_val)); 946 memset(priv->drv_rx_reg_val, 0, sizeof(priv->drv_rx_reg_val)); 947 memset(priv->drv_xpu_reg_val, 0, sizeof(priv->drv_xpu_reg_val)); 948 priv->drv_xpu_reg_val[DRV_XPU_REG_IDX_GIT_REV] = GIT_REV; 949 950 //turn on radio 951 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) { 952 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, false, true, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 953 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 954 } else { 955 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, true, false, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 956 reg = ad9361_get_tx_atten(priv->ad9361_phy, 1); 957 } 958 if (reg == AD9361_RADIO_ON_TX_ATT) { 959 priv->rfkill_off = 1;// 0 off, 1 on 960 printk("%s openwifi_start: rfkill radio on\n",sdr_compatible_str); 961 } 962 else 963 printk("%s openwifi_start: WARNING rfkill radio on failed. tx att read %d require %d\n",sdr_compatible_str, reg, AD9361_RADIO_ON_TX_ATT); 964 965 if (priv->rx_intf_cfg == RX_INTF_BW_20MHZ_AT_0MHZ_ANT0) 966 priv->ctrl_out.index=0x16; 967 else 968 priv->ctrl_out.index=0x17; 969 970 ret = ad9361_ctrl_outs_setup(priv->ad9361_phy, &(priv->ctrl_out)); 971 if (ret < 0) { 972 printk("%s openwifi_start: WARNING ad9361_ctrl_outs_setup %d\n",sdr_compatible_str, ret); 973 } else { 974 printk("%s openwifi_start: ad9361_ctrl_outs_setup en_mask 0x%02x index 0x%02x\n",sdr_compatible_str, priv->ctrl_out.en_mask, priv->ctrl_out.index); 975 } 976 977 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 978 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 979 980 rx_intf_api->hw_init(priv->rx_intf_cfg,8,8); 981 tx_intf_api->hw_init(priv->tx_intf_cfg,8,8); 982 openofdm_tx_api->hw_init(priv->openofdm_tx_cfg); 983 openofdm_rx_api->hw_init(priv->openofdm_rx_cfg); 984 xpu_api->hw_init(priv->xpu_cfg); 985 986 agc_gain_delay = 50; //samples 987 rssi_half_db_offset = 134; // to be consistent 988 xpu_api->XPU_REG_RSSI_DB_CFG_write(0x80000000|((rssi_half_db_offset<<16)|agc_gain_delay) ); 989 xpu_api->XPU_REG_RSSI_DB_CFG_write((~0x80000000)&((rssi_half_db_offset<<16)|agc_gain_delay) ); 990 991 openofdm_rx_api->OPENOFDM_RX_REG_POWER_THRES_write(0); 992 // rssi_half_db_th = 87<<1; // -62dBm // will settup in runtime in _rf_set_channel 993 // xpu_api->XPU_REG_LBT_TH_write(rssi_half_db_th); // set IQ rssi th step .5dB to xxx and enable it 994 995 // xpu_api->XPU_REG_CSMA_CFG_write(3); // cw_min -- already set in xpu.c 996 997 //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((40)<<16)|0 );//high 16bit 5GHz; low 16 bit 2.4GHz (Attention, current tx core has around 1.19us starting delay that makes the ack fall behind 10us SIFS in 2.4GHz! Need to improve TX in 2.4GHz!) 998 //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((51)<<16)|0 );//now our tx send out I/Q immediately 999 xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((51+23)<<16)|(0+23) );//we have more time when we use FIR in AD9361 1000 1001 xpu_api->XPU_REG_RECV_ACK_COUNT_TOP0_write( (((45+2+2)*10 + 15)<<16) | 10 );//2.4GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M) 1002 xpu_api->XPU_REG_RECV_ACK_COUNT_TOP1_write( (((51+2+2)*10 + 15)<<16) | 10 );//5GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M) 1003 1004 tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write( ((16*10)<<16)|(10*10) );//high 16bit 5GHz; low 16 bit 2.4GHz. counter speed 10MHz is assumed 1005 1006 // //xpu_api->XPU_REG_BB_RF_DELAY_write(51); // fine tuned value at 0.005us. old: dac-->ant port: 0.6us, 57 taps fir at 40MHz: 1.425us; round trip: 2*(0.6+1.425)=4.05us; 4.05*10=41 1007 // xpu_api->XPU_REG_BB_RF_DELAY_write(47);//add .5us for slightly longer fir -- already in xpu.c 1008 xpu_api->XPU_REG_MAC_ADDR_write(priv->mac_addr); 1009 1010 // setup time schedule of 4 slices 1011 // slice 0 1012 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write(50000-1); // total 50ms 1013 xpu_api->XPU_REG_SLICE_COUNT_START_write(0); //start 0ms 1014 xpu_api->XPU_REG_SLICE_COUNT_END_write(50000-1); //end 50ms 1015 1016 // slice 1 1017 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((1<<20)|(50000-1)); // total 50ms 1018 xpu_api->XPU_REG_SLICE_COUNT_START_write((1<<20)|(0)); //start 0ms 1019 //xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(20000-1)); //end 20ms 1020 xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(50000-1)); //end 20ms 1021 1022 // slice 2 1023 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((2<<20)|(50000-1)); // total 50ms 1024 //xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(20000)); //start 20ms 1025 xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(0)); //start 20ms 1026 //xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(40000-1)); //end 20ms 1027 xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(50000-1)); //end 20ms 1028 1029 // slice 3 1030 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((3<<20)|(50000-1)); // total 50ms 1031 //xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(40000)); //start 40ms 1032 xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(0)); //start 40ms 1033 //xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms 1034 xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms 1035 1036 // all slice sync rest 1037 xpu_api->XPU_REG_MULTI_RST_write(1<<7); //bit7 reset the counter for all queues at the same time 1038 xpu_api->XPU_REG_MULTI_RST_write(0<<7); 1039 1040 //xpu_api->XPU_REG_MAC_ADDR_HIGH_write( (*( (u16*)(priv->mac_addr + 4) )) ); 1041 printk("%s openwifi_start: rx_intf_cfg %d openofdm_rx_cfg %d tx_intf_cfg %d openofdm_tx_cfg %d\n",sdr_compatible_str, priv->rx_intf_cfg, priv->openofdm_rx_cfg, priv->tx_intf_cfg, priv->openofdm_tx_cfg); 1042 printk("%s openwifi_start: rx_freq_offset_to_lo_MHz %d tx_freq_offset_to_lo_MHz %d\n",sdr_compatible_str, priv->rx_freq_offset_to_lo_MHz, priv->tx_freq_offset_to_lo_MHz); 1043 1044 tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x30004); //disable tx interrupt 1045 rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x100); // disable rx interrupt by interrupt test mode 1046 rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(1); // hold M AXIS in reset status 1047 1048 if (test_mode==1) { 1049 printk("%s openwifi_start: test_mode==1\n",sdr_compatible_str); 1050 goto normal_out; 1051 } 1052 1053 priv->rx_chan = dma_request_slave_channel(&(priv->pdev->dev), "rx_dma_s2mm"); 1054 if (IS_ERR(priv->rx_chan)) { 1055 ret = PTR_ERR(priv->rx_chan); 1056 pr_err("%s openwifi_start: No Rx channel %d\n",sdr_compatible_str,ret); 1057 goto err_dma; 1058 } 1059 1060 priv->tx_chan = dma_request_slave_channel(&(priv->pdev->dev), "tx_dma_mm2s"); 1061 if (IS_ERR(priv->tx_chan)) { 1062 ret = PTR_ERR(priv->tx_chan); 1063 pr_err("%s openwifi_start: No Tx channel %d\n",sdr_compatible_str,ret); 1064 goto err_dma; 1065 } 1066 printk("%s openwifi_start: DMA channel setup successfully.\n",sdr_compatible_str); 1067 1068 ret = openwifi_init_rx_ring(priv); 1069 if (ret) { 1070 printk("%s openwifi_start: openwifi_init_rx_ring ret %d\n", sdr_compatible_str,ret); 1071 goto err_free_rings; 1072 } 1073 1074 priv->seqno=0; 1075 for (i=0; i<MAX_NUM_SW_QUEUE; i++) { 1076 if ((ret = openwifi_init_tx_ring(priv, i))) { 1077 printk("%s openwifi_start: openwifi_init_tx_ring %d ret %d\n", sdr_compatible_str, i, ret); 1078 goto err_free_rings; 1079 } 1080 } 1081 1082 if ( (ret = rx_dma_setup(dev)) ) { 1083 printk("%s openwifi_start: rx_dma_setup ret %d\n", sdr_compatible_str,ret); 1084 goto err_free_rings; 1085 } 1086 1087 priv->irq_rx = irq_of_parse_and_map(priv->pdev->dev.of_node, 1); 1088 ret = request_irq(priv->irq_rx, openwifi_rx_interrupt, 1089 IRQF_SHARED, "sdr,rx_pkt_intr", dev); 1090 if (ret) { 1091 wiphy_err(dev->wiphy, "openwifi_start:failed to register IRQ handler openwifi_rx_interrupt\n"); 1092 goto err_free_rings; 1093 } else { 1094 printk("%s openwifi_start: irq_rx %d\n", sdr_compatible_str, priv->irq_rx); 1095 } 1096 1097 priv->irq_tx = irq_of_parse_and_map(priv->pdev->dev.of_node, 3); 1098 ret = request_irq(priv->irq_tx, openwifi_tx_interrupt, 1099 IRQF_SHARED, "sdr,tx_itrpt1", dev); 1100 if (ret) { 1101 wiphy_err(dev->wiphy, "openwifi_start: failed to register IRQ handler openwifi_tx_interrupt\n"); 1102 goto err_free_rings; 1103 } else { 1104 printk("%s openwifi_start: irq_tx %d\n", sdr_compatible_str, priv->irq_tx); 1105 } 1106 1107 rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x000); // enable rx interrupt get normal fcs valid pass through ddc to ARM 1108 tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x4); //enable tx interrupt 1109 rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(0); // release M AXIS 1110 xpu_api->XPU_REG_TSF_LOAD_VAL_write(0,0); // reset tsf timer 1111 1112 //ieee80211_wake_queue(dev, 0); 1113 1114 normal_out: 1115 printk("%s openwifi_start: normal end\n", sdr_compatible_str); 1116 return 0; 1117 1118 err_free_rings: 1119 openwifi_free_rx_ring(priv); 1120 for (i=0; i<MAX_NUM_SW_QUEUE; i++) 1121 openwifi_free_tx_ring(priv, i); 1122 1123 err_dma: 1124 ret = -1; 1125 printk("%s openwifi_start: abnormal end ret %d\n", sdr_compatible_str, ret); 1126 return ret; 1127 } 1128 1129 static void openwifi_stop(struct ieee80211_hw *dev) 1130 { 1131 struct openwifi_priv *priv = dev->priv; 1132 u32 reg, reg1; 1133 int i; 1134 1135 if (test_mode==1){ 1136 pr_info("%s openwifi_stop: test_mode==1\n", sdr_compatible_str); 1137 goto normal_out; 1138 } 1139 1140 //turn off radio 1141 #if 1 1142 ad9361_tx_mute(priv->ad9361_phy, 1); 1143 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 1144 reg1 = ad9361_get_tx_atten(priv->ad9361_phy, 1); 1145 if (reg == AD9361_RADIO_OFF_TX_ATT && reg1 == AD9361_RADIO_OFF_TX_ATT ) { 1146 priv->rfkill_off = 0;// 0 off, 1 on 1147 printk("%s openwifi_stop: rfkill radio off\n",sdr_compatible_str); 1148 } 1149 else 1150 printk("%s openwifi_stop: WARNING rfkill radio off failed. tx att read %d %d require %d\n",sdr_compatible_str, reg, reg1, AD9361_RADIO_OFF_TX_ATT); 1151 #endif 1152 1153 //ieee80211_stop_queue(dev, 0); 1154 1155 tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x30004); //disable tx interrupt 1156 rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x100); // disable fcs_valid by interrupt test mode 1157 rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(1); // hold M AXIS in reset status 1158 1159 for (i=0; i<MAX_NUM_VIF; i++) { 1160 priv->vif[i] = NULL; 1161 } 1162 1163 openwifi_free_rx_ring(priv); 1164 for (i=0; i<MAX_NUM_SW_QUEUE; i++) 1165 openwifi_free_tx_ring(priv, i); 1166 1167 pr_info("%s openwifi_stop: dropped channel %s\n", sdr_compatible_str, dma_chan_name(priv->rx_chan)); 1168 dmaengine_terminate_all(priv->rx_chan); 1169 dma_release_channel(priv->rx_chan); 1170 pr_info("%s openwifi_stop: dropped channel %s\n", sdr_compatible_str, dma_chan_name(priv->tx_chan)); 1171 dmaengine_terminate_all(priv->tx_chan); 1172 dma_release_channel(priv->tx_chan); 1173 1174 //priv->rf->stop(dev); 1175 1176 free_irq(priv->irq_rx, dev); 1177 free_irq(priv->irq_tx, dev); 1178 1179 normal_out: 1180 printk("%s openwifi_stop\n", sdr_compatible_str); 1181 } 1182 1183 static u64 openwifi_get_tsf(struct ieee80211_hw *dev, 1184 struct ieee80211_vif *vif) 1185 { 1186 u32 tsft_low, tsft_high; 1187 1188 tsft_low = xpu_api->XPU_REG_TSF_RUNTIME_VAL_LOW_read(); 1189 tsft_high = xpu_api->XPU_REG_TSF_RUNTIME_VAL_HIGH_read(); 1190 //printk("%s openwifi_get_tsf: %08x%08x\n", sdr_compatible_str,tsft_high,tsft_low); 1191 return( ( (u64)tsft_low ) | ( ((u64)tsft_high)<<32 ) ); 1192 } 1193 1194 static void openwifi_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u64 tsf) 1195 { 1196 u32 tsft_high = ((tsf >> 32)&0xffffffff); 1197 u32 tsft_low = (tsf&0xffffffff); 1198 xpu_api->XPU_REG_TSF_LOAD_VAL_write(tsft_high,tsft_low); 1199 printk("%s openwifi_set_tsf: %08x%08x\n", sdr_compatible_str,tsft_high,tsft_low); 1200 } 1201 1202 static void openwifi_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 1203 { 1204 xpu_api->XPU_REG_TSF_LOAD_VAL_write(0,0); 1205 printk("%s openwifi_reset_tsf\n", sdr_compatible_str); 1206 } 1207 1208 static int openwifi_set_rts_threshold(struct ieee80211_hw *hw, u32 value) 1209 { 1210 printk("%s openwifi_set_rts_threshold WARNING value %d\n", sdr_compatible_str,value); 1211 return(0); 1212 } 1213 1214 static void openwifi_beacon_work(struct work_struct *work) 1215 { 1216 struct openwifi_vif *vif_priv = 1217 container_of(work, struct openwifi_vif, beacon_work.work); 1218 struct ieee80211_vif *vif = 1219 container_of((void *)vif_priv, struct ieee80211_vif, drv_priv); 1220 struct ieee80211_hw *dev = vif_priv->dev; 1221 struct ieee80211_mgmt *mgmt; 1222 struct sk_buff *skb; 1223 1224 /* don't overflow the tx ring */ 1225 if (ieee80211_queue_stopped(dev, 0)) 1226 goto resched; 1227 1228 /* grab a fresh beacon */ 1229 skb = ieee80211_beacon_get(dev, vif); 1230 if (!skb) 1231 goto resched; 1232 1233 /* 1234 * update beacon timestamp w/ TSF value 1235 * TODO: make hardware update beacon timestamp 1236 */ 1237 mgmt = (struct ieee80211_mgmt *)skb->data; 1238 mgmt->u.beacon.timestamp = cpu_to_le64(openwifi_get_tsf(dev, vif)); 1239 1240 /* TODO: use actual beacon queue */ 1241 skb_set_queue_mapping(skb, 0); 1242 openwifi_tx(dev, NULL, skb); 1243 1244 resched: 1245 /* 1246 * schedule next beacon 1247 * TODO: use hardware support for beacon timing 1248 */ 1249 schedule_delayed_work(&vif_priv->beacon_work, 1250 usecs_to_jiffies(1024 * vif->bss_conf.beacon_int)); 1251 } 1252 1253 static int openwifi_add_interface(struct ieee80211_hw *dev, 1254 struct ieee80211_vif *vif) 1255 { 1256 int i; 1257 struct openwifi_priv *priv = dev->priv; 1258 struct openwifi_vif *vif_priv; 1259 1260 switch (vif->type) { 1261 case NL80211_IFTYPE_AP: 1262 case NL80211_IFTYPE_STATION: 1263 case NL80211_IFTYPE_ADHOC: 1264 case NL80211_IFTYPE_MONITOR: 1265 case NL80211_IFTYPE_MESH_POINT: 1266 break; 1267 default: 1268 return -EOPNOTSUPP; 1269 } 1270 // let's support more than 1 interface 1271 for (i=0; i<MAX_NUM_VIF; i++) { 1272 if (priv->vif[i] == NULL) 1273 break; 1274 } 1275 1276 printk("%s openwifi_add_interface start. vif for loop result %d\n", sdr_compatible_str, i); 1277 1278 if (i==MAX_NUM_VIF) 1279 return -EBUSY; 1280 1281 priv->vif[i] = vif; 1282 1283 /* Initialize driver private area */ 1284 vif_priv = (struct openwifi_vif *)&vif->drv_priv; 1285 vif_priv->idx = i; 1286 1287 vif_priv->dev = dev; 1288 INIT_DELAYED_WORK(&vif_priv->beacon_work, openwifi_beacon_work); 1289 vif_priv->enable_beacon = false; 1290 1291 printk("%s openwifi_add_interface end with vif idx %d\n", sdr_compatible_str,vif_priv->idx); 1292 1293 return 0; 1294 } 1295 1296 static void openwifi_remove_interface(struct ieee80211_hw *dev, 1297 struct ieee80211_vif *vif) 1298 { 1299 struct openwifi_vif *vif_priv; 1300 struct openwifi_priv *priv = dev->priv; 1301 1302 vif_priv = (struct openwifi_vif *)&vif->drv_priv; 1303 priv->vif[vif_priv->idx] = NULL; 1304 printk("%s openwifi_remove_interface vif idx %d\n", sdr_compatible_str, vif_priv->idx); 1305 } 1306 1307 static int openwifi_config(struct ieee80211_hw *dev, u32 changed) 1308 { 1309 struct openwifi_priv *priv = dev->priv; 1310 struct ieee80211_conf *conf = &dev->conf; 1311 1312 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) 1313 priv->rf->set_chan(dev, conf); 1314 else 1315 printk("%s openwifi_config changed flag %08x\n", sdr_compatible_str, changed); 1316 1317 return 0; 1318 } 1319 1320 static void openwifi_bss_info_changed(struct ieee80211_hw *dev, 1321 struct ieee80211_vif *vif, 1322 struct ieee80211_bss_conf *info, 1323 u32 changed) 1324 { 1325 struct openwifi_priv *priv = dev->priv; 1326 struct openwifi_vif *vif_priv; 1327 u32 bssid_low, bssid_high; 1328 1329 vif_priv = (struct openwifi_vif *)&vif->drv_priv; 1330 1331 //be careful: we don have valid chip, so registers addresses in priv->map->BSSID[0] are not valid! should not print it! 1332 //printk("%s openwifi_bss_info_changed map bssid %02x%02x%02x%02x%02x%02x\n",sdr_compatible_str,priv->map->BSSID[0],priv->map->BSSID[1],priv->map->BSSID[2],priv->map->BSSID[3],priv->map->BSSID[4],priv->map->BSSID[5]); 1333 if (changed & BSS_CHANGED_BSSID) { 1334 printk("%s openwifi_bss_info_changed BSS_CHANGED_BSSID %02x%02x%02x%02x%02x%02x\n",sdr_compatible_str,info->bssid[0],info->bssid[1],info->bssid[2],info->bssid[3],info->bssid[4],info->bssid[5]); 1335 // write new bssid to our HW, and do not change bssid filter 1336 //u32 bssid_filter_high = xpu_api->XPU_REG_BSSID_FILTER_HIGH_read(); 1337 bssid_low = ( *( (u32*)(info->bssid) ) ); 1338 bssid_high = ( *( (u16*)(info->bssid+4) ) ); 1339 1340 //bssid_filter_high = (bssid_filter_high&0x80000000); 1341 //bssid_high = (bssid_high|bssid_filter_high); 1342 xpu_api->XPU_REG_BSSID_FILTER_LOW_write(bssid_low); 1343 xpu_api->XPU_REG_BSSID_FILTER_HIGH_write(bssid_high); 1344 } 1345 1346 if (changed & BSS_CHANGED_BEACON_INT) { 1347 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BEACON_INT %x\n",sdr_compatible_str,info->beacon_int); 1348 } 1349 1350 if (changed & BSS_CHANGED_TXPOWER) 1351 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_TXPOWER %x\n",sdr_compatible_str,info->txpower); 1352 1353 if (changed & BSS_CHANGED_ERP_CTS_PROT) 1354 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_ERP_CTS_PROT %x\n",sdr_compatible_str,info->use_cts_prot); 1355 1356 if (changed & BSS_CHANGED_BASIC_RATES) 1357 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BASIC_RATES %x\n",sdr_compatible_str,info->basic_rates); 1358 1359 if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE)) { 1360 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_ERP_SLOT %d BSS_CHANGED_ERP_PREAMBLE %d short slot %d\n",sdr_compatible_str, 1361 changed&BSS_CHANGED_ERP_SLOT,changed&BSS_CHANGED_ERP_PREAMBLE,info->use_short_slot); 1362 if (info->use_short_slot && priv->use_short_slot==false) { 1363 priv->use_short_slot=true; 1364 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 1365 } else if ((!info->use_short_slot) && priv->use_short_slot==true) { 1366 priv->use_short_slot=false; 1367 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 1368 } 1369 } 1370 1371 if (changed & BSS_CHANGED_BEACON_ENABLED) { 1372 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BEACON_ENABLED\n",sdr_compatible_str); 1373 vif_priv->enable_beacon = info->enable_beacon; 1374 } 1375 1376 if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON)) { 1377 cancel_delayed_work_sync(&vif_priv->beacon_work); 1378 if (vif_priv->enable_beacon) 1379 schedule_work(&vif_priv->beacon_work.work); 1380 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BEACON_ENABLED %d BSS_CHANGED_BEACON %d\n",sdr_compatible_str, 1381 changed&BSS_CHANGED_BEACON_ENABLED,changed&BSS_CHANGED_BEACON); 1382 } 1383 } 1384 1385 static int openwifi_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue, 1386 const struct ieee80211_tx_queue_params *params) 1387 { 1388 printk("%s openwifi_conf_tx: WARNING [queue %d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n", 1389 sdr_compatible_str,queue,params->aifs,params->cw_min,params->cw_max,params->txop); 1390 return(0); 1391 } 1392 1393 static u64 openwifi_prepare_multicast(struct ieee80211_hw *dev, 1394 struct netdev_hw_addr_list *mc_list) 1395 { 1396 printk("%s openwifi_prepare_multicast\n", sdr_compatible_str); 1397 return netdev_hw_addr_list_count(mc_list); 1398 } 1399 1400 static void openwifi_configure_filter(struct ieee80211_hw *dev, 1401 unsigned int changed_flags, 1402 unsigned int *total_flags, 1403 u64 multicast) 1404 { 1405 u32 filter_flag; 1406 1407 (*total_flags) &= SDR_SUPPORTED_FILTERS; 1408 (*total_flags) |= FIF_ALLMULTI; //because we need to pass all multicast (no matter it is for us or not) to upper layer 1409 1410 filter_flag = (*total_flags); 1411 1412 filter_flag = (filter_flag|UNICAST_FOR_US|BROADCAST_ALL_ONE|BROADCAST_ALL_ZERO); 1413 //filter_flag = (filter_flag|UNICAST_FOR_US|BROADCAST_ALL_ONE|BROADCAST_ALL_ZERO|MONITOR_ALL); // all pkt will be delivered to arm 1414 1415 //if (priv->vif[0]->type == NL80211_IFTYPE_MONITOR) 1416 if ((filter_flag&0xf0) == 0xf0) //FIF_BCN_PRBRESP_PROMISC/FIF_CONTROL/FIF_OTHER_BSS/FIF_PSPOLL are set means monitor mode 1417 filter_flag = (filter_flag|MONITOR_ALL); 1418 else 1419 filter_flag = (filter_flag&(~MONITOR_ALL)); 1420 1421 if ( !(filter_flag&FIF_BCN_PRBRESP_PROMISC) ) 1422 filter_flag = (filter_flag|MY_BEACON); 1423 1424 filter_flag = (filter_flag|FIF_PSPOLL); 1425 1426 xpu_api->XPU_REG_FILTER_FLAG_write(filter_flag|HIGH_PRIORITY_DISCARD_FLAG); 1427 //xpu_api->XPU_REG_FILTER_FLAG_write(filter_flag); //do not discard any pkt 1428 1429 printk("%s openwifi_configure_filter MON %d M_BCN %d BST0 %d BST1 %d UST %d PB_RQ %d PS_PL %d O_BSS %d CTL %d BCN_PRP %d PCP_FL %d FCS_FL %d ALL_MUT %d\n", sdr_compatible_str, 1430 (filter_flag>>13)&1,(filter_flag>>12)&1,(filter_flag>>11)&1,(filter_flag>>10)&1,(filter_flag>>9)&1,(filter_flag>>8)&1,(filter_flag>>7)&1,(filter_flag>>6)&1,(filter_flag>>5)&1,(filter_flag>>4)&1,(filter_flag>>3)&1,(filter_flag>>2)&1,(filter_flag>>1)&1); 1431 } 1432 1433 static int openwifi_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, void *data, int len) 1434 { 1435 struct openwifi_priv *priv = hw->priv; 1436 struct nlattr *tb[OPENWIFI_ATTR_MAX + 1]; 1437 struct sk_buff *skb; 1438 int err; 1439 u32 tmp=-1, reg_cat, reg_addr, reg_val, reg_addr_idx, tsft_high, tsft_low; 1440 1441 err = nla_parse(tb, OPENWIFI_ATTR_MAX, data, len, openwifi_testmode_policy, NULL); 1442 if (err) 1443 return err; 1444 1445 if (!tb[OPENWIFI_ATTR_CMD]) 1446 return -EINVAL; 1447 1448 switch (nla_get_u32(tb[OPENWIFI_ATTR_CMD])) { 1449 case OPENWIFI_CMD_SET_GAP: 1450 if (!tb[OPENWIFI_ATTR_GAP]) 1451 return -EINVAL; 1452 tmp = nla_get_u32(tb[OPENWIFI_ATTR_GAP]); 1453 printk("%s openwifi radio inter frame gap set to %d usec\n", sdr_compatible_str, tmp); 1454 xpu_api->XPU_REG_CSMA_CFG_write(tmp); // unit us 1455 return 0; 1456 case OPENWIFI_CMD_GET_GAP: 1457 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1458 if (!skb) 1459 return -ENOMEM; 1460 tmp = xpu_api->XPU_REG_CSMA_CFG_read(); 1461 if (nla_put_u32(skb, OPENWIFI_ATTR_GAP, tmp)) 1462 goto nla_put_failure; 1463 return cfg80211_testmode_reply(skb); 1464 case OPENWIFI_CMD_SET_SLICE_IDX: 1465 if (!tb[OPENWIFI_ATTR_SLICE_IDX]) 1466 return -EINVAL; 1467 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_IDX]); 1468 printk("%s set openwifi slice_idx in hex: %08x\n", sdr_compatible_str, tmp); 1469 if (tmp == MAX_NUM_HW_QUEUE) { 1470 printk("%s set openwifi slice_idx reset all queue counter.\n", sdr_compatible_str); 1471 xpu_api->XPU_REG_MULTI_RST_write(1<<7); //bit7 reset the counter for all queues at the same time 1472 xpu_api->XPU_REG_MULTI_RST_write(0<<7); 1473 } else { 1474 priv->slice_idx = tmp; 1475 } 1476 return 0; 1477 case OPENWIFI_CMD_GET_SLICE_IDX: 1478 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1479 if (!skb) 1480 return -ENOMEM; 1481 tmp = priv->slice_idx; 1482 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_IDX, tmp)) 1483 goto nla_put_failure; 1484 printk("%s get openwifi slice_idx in hex: %08x\n", sdr_compatible_str, tmp); 1485 return cfg80211_testmode_reply(skb); 1486 case OPENWIFI_CMD_SET_ADDR: 1487 if (!tb[OPENWIFI_ATTR_ADDR]) 1488 return -EINVAL; 1489 tmp = nla_get_u32(tb[OPENWIFI_ATTR_ADDR]); 1490 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1491 printk("%s set openwifi slice_target_mac_addr(low32) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1492 } else { 1493 printk("%s set openwifi slice_target_mac_addr(low32) in hex: %08x to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1494 priv->dest_mac_addr_queue_map[priv->slice_idx] = reverse32(tmp); 1495 } 1496 return 0; 1497 case OPENWIFI_CMD_GET_ADDR: 1498 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1499 if (!skb) 1500 return -ENOMEM; 1501 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1502 tmp = -1; 1503 } else { 1504 tmp = reverse32(priv->dest_mac_addr_queue_map[priv->slice_idx]); 1505 } 1506 if (nla_put_u32(skb, OPENWIFI_ATTR_ADDR, tmp)) 1507 goto nla_put_failure; 1508 printk("%s get openwifi slice_target_mac_addr(low32) in hex: %08x of slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1509 return cfg80211_testmode_reply(skb); 1510 1511 case OPENWIFI_CMD_SET_SLICE_TOTAL: 1512 if (!tb[OPENWIFI_ATTR_SLICE_TOTAL]) 1513 return -EINVAL; 1514 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_TOTAL]); 1515 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1516 printk("%s set SLICE_TOTAL(duration) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1517 } else { 1518 printk("%s set SLICE_TOTAL(duration) %d usec to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1519 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((priv->slice_idx<<20)|tmp); 1520 } 1521 return 0; 1522 case OPENWIFI_CMD_GET_SLICE_TOTAL: 1523 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1524 if (!skb) 1525 return -ENOMEM; 1526 tmp = (xpu_api->XPU_REG_SLICE_COUNT_TOTAL_read()); 1527 printk("%s get SLICE_TOTAL(duration) %d usec of slice %d\n", sdr_compatible_str, tmp&0xFFFFF, tmp>>20); 1528 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_TOTAL, tmp)) 1529 goto nla_put_failure; 1530 return cfg80211_testmode_reply(skb); 1531 1532 case OPENWIFI_CMD_SET_SLICE_START: 1533 if (!tb[OPENWIFI_ATTR_SLICE_START]) 1534 return -EINVAL; 1535 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_START]); 1536 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1537 printk("%s set SLICE_START(duration) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1538 } else { 1539 printk("%s set SLICE_START(duration) %d usec to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1540 xpu_api->XPU_REG_SLICE_COUNT_START_write((priv->slice_idx<<20)|tmp); 1541 } 1542 return 0; 1543 case OPENWIFI_CMD_GET_SLICE_START: 1544 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1545 if (!skb) 1546 return -ENOMEM; 1547 tmp = (xpu_api->XPU_REG_SLICE_COUNT_START_read()); 1548 printk("%s get SLICE_START(duration) %d usec of slice %d\n", sdr_compatible_str, tmp&0xFFFFF, tmp>>20); 1549 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_START, tmp)) 1550 goto nla_put_failure; 1551 return cfg80211_testmode_reply(skb); 1552 1553 case OPENWIFI_CMD_SET_SLICE_END: 1554 if (!tb[OPENWIFI_ATTR_SLICE_END]) 1555 return -EINVAL; 1556 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_END]); 1557 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1558 printk("%s set SLICE_END(duration) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1559 } else { 1560 printk("%s set SLICE_END(duration) %d usec to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1561 xpu_api->XPU_REG_SLICE_COUNT_END_write((priv->slice_idx<<20)|tmp); 1562 } 1563 return 0; 1564 case OPENWIFI_CMD_GET_SLICE_END: 1565 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1566 if (!skb) 1567 return -ENOMEM; 1568 tmp = (xpu_api->XPU_REG_SLICE_COUNT_END_read()); 1569 printk("%s get SLICE_END(duration) %d usec of slice %d\n", sdr_compatible_str, tmp&0xFFFFF, tmp>>20); 1570 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_END, tmp)) 1571 goto nla_put_failure; 1572 return cfg80211_testmode_reply(skb); 1573 1574 // case OPENWIFI_CMD_SET_SLICE_TOTAL1: 1575 // if (!tb[OPENWIFI_ATTR_SLICE_TOTAL1]) 1576 // return -EINVAL; 1577 // tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_TOTAL1]); 1578 // printk("%s set SLICE_TOTAL1(duration) to %d usec\n", sdr_compatible_str, tmp); 1579 // // xpu_api->XPU_REG_SLICE_COUNT_TOTAL1_write(tmp); 1580 // return 0; 1581 // case OPENWIFI_CMD_GET_SLICE_TOTAL1: 1582 // skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1583 // if (!skb) 1584 // return -ENOMEM; 1585 // // tmp = (xpu_api->XPU_REG_SLICE_COUNT_TOTAL1_read()); 1586 // if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_TOTAL1, tmp)) 1587 // goto nla_put_failure; 1588 // return cfg80211_testmode_reply(skb); 1589 1590 // case OPENWIFI_CMD_SET_SLICE_START1: 1591 // if (!tb[OPENWIFI_ATTR_SLICE_START1]) 1592 // return -EINVAL; 1593 // tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_START1]); 1594 // printk("%s set SLICE_START1(duration) to %d usec\n", sdr_compatible_str, tmp); 1595 // // xpu_api->XPU_REG_SLICE_COUNT_START1_write(tmp); 1596 // return 0; 1597 // case OPENWIFI_CMD_GET_SLICE_START1: 1598 // skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1599 // if (!skb) 1600 // return -ENOMEM; 1601 // // tmp = (xpu_api->XPU_REG_SLICE_COUNT_START1_read()); 1602 // if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_START1, tmp)) 1603 // goto nla_put_failure; 1604 // return cfg80211_testmode_reply(skb); 1605 1606 // case OPENWIFI_CMD_SET_SLICE_END1: 1607 // if (!tb[OPENWIFI_ATTR_SLICE_END1]) 1608 // return -EINVAL; 1609 // tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_END1]); 1610 // printk("%s set SLICE_END1(duration) to %d usec\n", sdr_compatible_str, tmp); 1611 // // xpu_api->XPU_REG_SLICE_COUNT_END1_write(tmp); 1612 // return 0; 1613 // case OPENWIFI_CMD_GET_SLICE_END1: 1614 // skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1615 // if (!skb) 1616 // return -ENOMEM; 1617 // // tmp = (xpu_api->XPU_REG_SLICE_COUNT_END1_read()); 1618 // if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_END1, tmp)) 1619 // goto nla_put_failure; 1620 // return cfg80211_testmode_reply(skb); 1621 1622 case OPENWIFI_CMD_SET_RSSI_TH: 1623 if (!tb[OPENWIFI_ATTR_RSSI_TH]) 1624 return -EINVAL; 1625 tmp = nla_get_u32(tb[OPENWIFI_ATTR_RSSI_TH]); 1626 printk("%s set RSSI_TH to %d\n", sdr_compatible_str, tmp); 1627 xpu_api->XPU_REG_LBT_TH_write(tmp); 1628 return 0; 1629 case OPENWIFI_CMD_GET_RSSI_TH: 1630 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1631 if (!skb) 1632 return -ENOMEM; 1633 tmp = xpu_api->XPU_REG_LBT_TH_read(); 1634 if (nla_put_u32(skb, OPENWIFI_ATTR_RSSI_TH, tmp)) 1635 goto nla_put_failure; 1636 return cfg80211_testmode_reply(skb); 1637 1638 case OPENWIFI_CMD_SET_TSF: 1639 printk("openwifi_set_tsf_1"); 1640 if ( (!tb[OPENWIFI_ATTR_HIGH_TSF]) || (!tb[OPENWIFI_ATTR_LOW_TSF]) ) 1641 return -EINVAL; 1642 printk("openwifi_set_tsf_2"); 1643 tsft_high = nla_get_u32(tb[OPENWIFI_ATTR_HIGH_TSF]); 1644 tsft_low = nla_get_u32(tb[OPENWIFI_ATTR_LOW_TSF]); 1645 xpu_api->XPU_REG_TSF_LOAD_VAL_write(tsft_high,tsft_low); 1646 printk("%s openwifi_set_tsf: %08x%08x\n", sdr_compatible_str,tsft_high,tsft_low); 1647 return 0; 1648 1649 case REG_CMD_SET: 1650 if ( (!tb[REG_ATTR_ADDR]) || (!tb[REG_ATTR_VAL]) ) 1651 return -EINVAL; 1652 reg_addr = nla_get_u32(tb[REG_ATTR_ADDR]); 1653 reg_val = nla_get_u32(tb[REG_ATTR_VAL]); 1654 reg_cat = ((reg_addr>>16)&0xFFFF); 1655 reg_addr = (reg_addr&0xFFFF); 1656 reg_addr_idx = (reg_addr>>2); 1657 printk("%s recv set cmd reg cat %d addr %08x val %08x idx %d\n", sdr_compatible_str, reg_cat, reg_addr, reg_val, reg_addr_idx); 1658 if (reg_cat==1) 1659 printk("%s reg cat 1 (rf) is not supported yet!\n", sdr_compatible_str); 1660 else if (reg_cat==2) 1661 rx_intf_api->reg_write(reg_addr,reg_val); 1662 else if (reg_cat==3) 1663 tx_intf_api->reg_write(reg_addr,reg_val); 1664 else if (reg_cat==4) 1665 openofdm_rx_api->reg_write(reg_addr,reg_val); 1666 else if (reg_cat==5) 1667 openofdm_tx_api->reg_write(reg_addr,reg_val); 1668 else if (reg_cat==6) 1669 xpu_api->reg_write(reg_addr,reg_val); 1670 else if (reg_cat==7) { 1671 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1672 priv->drv_rx_reg_val[reg_addr_idx]=reg_val; 1673 if (reg_addr_idx==DRV_RX_REG_IDX_FREQ_BW_CFG) { 1674 if (reg_val==0) 1675 priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT0; 1676 else 1677 priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT1; 1678 1679 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1680 //priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1681 } 1682 } else 1683 printk("%s reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1684 } 1685 else if (reg_cat==8) { 1686 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1687 priv->drv_tx_reg_val[reg_addr_idx]=reg_val; 1688 if (reg_addr_idx==DRV_TX_REG_IDX_FREQ_BW_CFG) { 1689 if (reg_val==0) { 1690 priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0; 1691 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, true, false, true); 1692 } else { 1693 priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1; 1694 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, false, true, true); 1695 } 1696 1697 //priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1698 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1699 } 1700 } else 1701 printk("%s reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1702 } 1703 else if (reg_cat==9) { 1704 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) 1705 priv->drv_xpu_reg_val[reg_addr_idx]=reg_val; 1706 else 1707 printk("%s reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1708 } 1709 else 1710 printk("%s reg cat %d is not supported yet!\n", sdr_compatible_str, reg_cat); 1711 1712 return 0; 1713 case REG_CMD_GET: 1714 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1715 if (!skb) 1716 return -ENOMEM; 1717 reg_addr = nla_get_u32(tb[REG_ATTR_ADDR]); 1718 reg_cat = ((reg_addr>>16)&0xFFFF); 1719 reg_addr = (reg_addr&0xFFFF); 1720 reg_addr_idx = (reg_addr>>2); 1721 printk("%s recv get cmd reg cat %d addr %08x idx %d\n", sdr_compatible_str, reg_cat, reg_addr, reg_addr_idx); 1722 if (reg_cat==1) { 1723 printk("%s reg cat 1 (rf) is not supported yet!\n", sdr_compatible_str); 1724 tmp = 0xFFFFFFFF; 1725 } 1726 else if (reg_cat==2) 1727 tmp = rx_intf_api->reg_read(reg_addr); 1728 else if (reg_cat==3) 1729 tmp = tx_intf_api->reg_read(reg_addr); 1730 else if (reg_cat==4) 1731 tmp = openofdm_rx_api->reg_read(reg_addr); 1732 else if (reg_cat==5) 1733 tmp = openofdm_tx_api->reg_read(reg_addr); 1734 else if (reg_cat==6) 1735 tmp = xpu_api->reg_read(reg_addr); 1736 else if (reg_cat==7) { 1737 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1738 if (reg_addr_idx==DRV_RX_REG_IDX_FREQ_BW_CFG) { 1739 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1740 //priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1741 1742 if (priv->rx_intf_cfg == RX_INTF_BW_20MHZ_AT_0MHZ_ANT0) 1743 priv->drv_rx_reg_val[reg_addr_idx]=0; 1744 else if (priv->rx_intf_cfg == RX_INTF_BW_20MHZ_AT_0MHZ_ANT1) 1745 priv->drv_rx_reg_val[reg_addr_idx]=1; 1746 } 1747 tmp = priv->drv_rx_reg_val[reg_addr_idx]; 1748 } else 1749 printk("%s reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1750 } 1751 else if (reg_cat==8) { 1752 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1753 if (reg_addr_idx==DRV_TX_REG_IDX_FREQ_BW_CFG) { 1754 //priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1755 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1756 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0) 1757 priv->drv_tx_reg_val[reg_addr_idx]=0; 1758 else if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) 1759 priv->drv_tx_reg_val[reg_addr_idx]=1; 1760 } 1761 tmp = priv->drv_tx_reg_val[reg_addr_idx]; 1762 } else 1763 printk("%s reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1764 } 1765 else if (reg_cat==9) { 1766 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) 1767 tmp = priv->drv_xpu_reg_val[reg_addr_idx]; 1768 else 1769 printk("%s reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1770 } 1771 else 1772 printk("%s reg cat %d is not supported yet!\n", sdr_compatible_str, reg_cat); 1773 1774 if (nla_put_u32(skb, REG_ATTR_VAL, tmp)) 1775 goto nla_put_failure; 1776 return cfg80211_testmode_reply(skb); 1777 1778 default: 1779 return -EOPNOTSUPP; 1780 } 1781 1782 nla_put_failure: 1783 dev_kfree_skb(skb); 1784 return -ENOBUFS; 1785 } 1786 1787 static const struct ieee80211_ops openwifi_ops = { 1788 .tx = openwifi_tx, 1789 .start = openwifi_start, 1790 .stop = openwifi_stop, 1791 .add_interface = openwifi_add_interface, 1792 .remove_interface = openwifi_remove_interface, 1793 .config = openwifi_config, 1794 .bss_info_changed = openwifi_bss_info_changed, 1795 .conf_tx = openwifi_conf_tx, 1796 .prepare_multicast = openwifi_prepare_multicast, 1797 .configure_filter = openwifi_configure_filter, 1798 .rfkill_poll = openwifi_rfkill_poll, 1799 .get_tsf = openwifi_get_tsf, 1800 .set_tsf = openwifi_set_tsf, 1801 .reset_tsf = openwifi_reset_tsf, 1802 .set_rts_threshold = openwifi_set_rts_threshold, 1803 .testmode_cmd = openwifi_testmode_cmd, 1804 }; 1805 1806 static const struct of_device_id openwifi_dev_of_ids[] = { 1807 { .compatible = "sdr,sdr", }, 1808 {} 1809 }; 1810 MODULE_DEVICE_TABLE(of, openwifi_dev_of_ids); 1811 1812 static int custom_match_spi_dev(struct device *dev, void *data) 1813 { 1814 const char *name = data; 1815 1816 bool ret = sysfs_streq(name, dev->of_node->name); 1817 printk("%s custom_match_spi_dev %s %s %d\n", sdr_compatible_str,name, dev->of_node->name, ret); 1818 return ret; 1819 } 1820 1821 static int custom_match_platform_dev(struct device *dev, void *data) 1822 { 1823 struct platform_device *plat_dev = to_platform_device(dev); 1824 const char *name = data; 1825 char *name_in_sys_bus_platform_devices = strstr(plat_dev->name, name); 1826 bool match_flag = (name_in_sys_bus_platform_devices != NULL); 1827 1828 if (match_flag) { 1829 printk("%s custom_match_platform_dev %s\n", sdr_compatible_str,plat_dev->name); 1830 } 1831 return(match_flag); 1832 } 1833 1834 static int openwifi_dev_probe(struct platform_device *pdev) 1835 { 1836 struct ieee80211_hw *dev; 1837 struct openwifi_priv *priv; 1838 int err=1, rand_val; 1839 const char *chip_name; 1840 u32 reg;//, reg1; 1841 1842 struct device_node *np = pdev->dev.of_node; 1843 1844 struct device *tmp_dev; 1845 struct platform_device *tmp_pdev; 1846 struct iio_dev *tmp_indio_dev; 1847 // struct gpio_leds_priv *tmp_led_priv; 1848 1849 printk("\n"); 1850 1851 if (np) { 1852 const struct of_device_id *match; 1853 1854 match = of_match_node(openwifi_dev_of_ids, np); 1855 if (match) { 1856 printk("%s openwifi_dev_probe: match!\n", sdr_compatible_str); 1857 err = 0; 1858 } 1859 } 1860 1861 if (err) 1862 return err; 1863 1864 dev = ieee80211_alloc_hw(sizeof(*priv), &openwifi_ops); 1865 if (!dev) { 1866 printk(KERN_ERR "%s openwifi_dev_probe: ieee80211 alloc failed\n",sdr_compatible_str); 1867 err = -ENOMEM; 1868 goto err_free_dev; 1869 } 1870 1871 priv = dev->priv; 1872 priv->pdev = pdev; 1873 1874 // //-------------find ad9361-phy driver for lo/channel control--------------- 1875 priv->actual_rx_lo = 0; 1876 tmp_dev = bus_find_device( &spi_bus_type, NULL, "ad9361-phy", custom_match_spi_dev ); 1877 if (tmp_dev == NULL) { 1878 printk(KERN_ERR "%s find_dev ad9361-phy failed\n",sdr_compatible_str); 1879 err = -ENOMEM; 1880 goto err_free_dev; 1881 } 1882 printk("%s bus_find_device ad9361-phy: %s. driver_data pointer %p\n", sdr_compatible_str, ((struct spi_device*)tmp_dev)->modalias, (void*)(((struct spi_device*)tmp_dev)->dev.driver_data)); 1883 if (((struct spi_device*)tmp_dev)->dev.driver_data == NULL) { 1884 printk(KERN_ERR "%s find_dev ad9361-phy failed. dev.driver_data == NULL\n",sdr_compatible_str); 1885 err = -ENOMEM; 1886 goto err_free_dev; 1887 } 1888 1889 priv->ad9361_phy = ad9361_spi_to_phy((struct spi_device*)tmp_dev); 1890 if (!(priv->ad9361_phy)) { 1891 printk(KERN_ERR "%s ad9361_spi_to_phy failed\n",sdr_compatible_str); 1892 err = -ENOMEM; 1893 goto err_free_dev; 1894 } 1895 printk("%s ad9361_spi_to_phy ad9361-phy: %s\n", sdr_compatible_str, priv->ad9361_phy->spi->modalias); 1896 1897 priv->ctrl_out.en_mask=0xFF; 1898 priv->ctrl_out.index=0x16; 1899 err = ad9361_ctrl_outs_setup(priv->ad9361_phy, &(priv->ctrl_out)); 1900 if (err < 0) { 1901 printk("%s openwifi_dev_probe: WARNING ad9361_ctrl_outs_setup %d\n",sdr_compatible_str, err); 1902 } else { 1903 printk("%s openwifi_dev_probe: ad9361_ctrl_outs_setup en_mask 0x%02x index 0x%02x\n",sdr_compatible_str, priv->ctrl_out.en_mask, priv->ctrl_out.index); 1904 } 1905 1906 reg = ad9361_spi_read(priv->ad9361_phy->spi, REG_CTRL_OUTPUT_POINTER); 1907 printk("%s openwifi_dev_probe: ad9361_spi_read REG_CTRL_OUTPUT_POINTER 0x%02x\n",sdr_compatible_str, reg); 1908 reg = ad9361_spi_read(priv->ad9361_phy->spi, REG_CTRL_OUTPUT_ENABLE); 1909 printk("%s openwifi_dev_probe: ad9361_spi_read REG_CTRL_OUTPUT_ENABLE 0x%02x\n",sdr_compatible_str, reg); 1910 1911 // //-------------find driver: axi_ad9361 hdl ref design module, dac channel--------------- 1912 tmp_dev = bus_find_device( &platform_bus_type, NULL, "cf-ad9361-dds-core-lpc", custom_match_platform_dev ); 1913 if (!tmp_dev) { 1914 printk(KERN_ERR "%s bus_find_device platform_bus_type cf-ad9361-dds-core-lpc failed\n",sdr_compatible_str); 1915 err = -ENOMEM; 1916 goto err_free_dev; 1917 } 1918 1919 tmp_pdev = to_platform_device(tmp_dev); 1920 if (!tmp_pdev) { 1921 printk(KERN_ERR "%s to_platform_device failed\n",sdr_compatible_str); 1922 err = -ENOMEM; 1923 goto err_free_dev; 1924 } 1925 1926 tmp_indio_dev = platform_get_drvdata(tmp_pdev); 1927 if (!tmp_indio_dev) { 1928 printk(KERN_ERR "%s platform_get_drvdata failed\n",sdr_compatible_str); 1929 err = -ENOMEM; 1930 goto err_free_dev; 1931 } 1932 1933 priv->dds_st = iio_priv(tmp_indio_dev); 1934 if (!(priv->dds_st)) { 1935 printk(KERN_ERR "%s iio_priv failed\n",sdr_compatible_str); 1936 err = -ENOMEM; 1937 goto err_free_dev; 1938 } 1939 printk("%s openwifi_dev_probe: cf-ad9361-dds-core-lpc dds_st->version %08x chip_info->name %s\n",sdr_compatible_str,priv->dds_st->version,priv->dds_st->chip_info->name); 1940 cf_axi_dds_datasel(priv->dds_st, -1, DATA_SEL_DMA); 1941 printk("%s openwifi_dev_probe: cf_axi_dds_datasel DATA_SEL_DMA\n",sdr_compatible_str); 1942 1943 // //-------------find driver: axi_ad9361 hdl ref design module, adc channel--------------- 1944 // turn off radio by muting tx 1945 // ad9361_tx_mute(priv->ad9361_phy, 1); 1946 // reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 1947 // reg1 = ad9361_get_tx_atten(priv->ad9361_phy, 1); 1948 // if (reg == AD9361_RADIO_OFF_TX_ATT && reg1 == AD9361_RADIO_OFF_TX_ATT ) { 1949 // priv->rfkill_off = 0;// 0 off, 1 on 1950 // printk("%s openwifi_dev_probe: rfkill radio off\n",sdr_compatible_str); 1951 // } 1952 // else 1953 // printk("%s openwifi_dev_probe: WARNING rfkill radio off failed. tx att read %d %d require %d\n",sdr_compatible_str, reg, reg1, AD9361_RADIO_OFF_TX_ATT); 1954 1955 priv->rssi_correction = 43;//this will be set in real-time by _rf_set_channel() 1956 1957 //priv->rf_bw = 20000000; // Signal quality issue! NOT use for now. 20MHz or 40MHz. 40MHz need ddc/duc. 20MHz works in bypass mode 1958 priv->rf_bw = 40000000; // 20MHz or 40MHz. 40MHz need ddc/duc. 20MHz works in bypass mode 1959 1960 priv->xpu_cfg = XPU_NORMAL; 1961 1962 priv->openofdm_tx_cfg = OPENOFDM_TX_NORMAL; 1963 priv->openofdm_rx_cfg = OPENOFDM_RX_NORMAL; 1964 1965 printk("%s openwifi_dev_probe: priv->rf_bw == %dHz. bool for 20000000 %d, 40000000 %d\n",sdr_compatible_str, priv->rf_bw, (priv->rf_bw==20000000) , (priv->rf_bw==40000000) ); 1966 if (priv->rf_bw == 20000000) { 1967 priv->rx_intf_cfg = RX_INTF_BYPASS; 1968 priv->tx_intf_cfg = TX_INTF_BYPASS; 1969 //priv->rx_freq_offset_to_lo_MHz = 0; 1970 //priv->tx_freq_offset_to_lo_MHz = 0; 1971 } else if (priv->rf_bw == 40000000) { 1972 //priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_P_10MHZ; //work 1973 //priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1; //work 1974 1975 // // test ddc at central, duc at central+10M. It works. And also change rx BW from 40MHz to 20MHz in rf_init.sh. Rx sampling rate is still 40Msps 1976 priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT0; 1977 priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0; // Let's use rx0 tx0 as default mode, because it works for both 9361 and 9364 1978 // // try another antenna option 1979 //priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT1; 1980 //priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0; 1981 1982 #if 0 1983 if (priv->rx_intf_cfg == DDC_BW_20MHZ_AT_N_10MHZ) { 1984 priv->rx_freq_offset_to_lo_MHz = -10; 1985 } else if (priv->rx_intf_cfg == DDC_BW_20MHZ_AT_P_10MHZ) { 1986 priv->rx_freq_offset_to_lo_MHz = 10; 1987 } else if (priv->rx_intf_cfg == DDC_BW_20MHZ_AT_0MHZ) { 1988 priv->rx_freq_offset_to_lo_MHz = 0; 1989 } else { 1990 printk("%s openwifi_dev_probe: Warning! priv->rx_intf_cfg == %d\n",sdr_compatible_str,priv->rx_intf_cfg); 1991 } 1992 #endif 1993 } else { 1994 printk("%s openwifi_dev_probe: Warning! priv->rf_bw == %dHz (should be 20000000 or 40000000)\n",sdr_compatible_str, priv->rf_bw); 1995 } 1996 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1997 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1998 printk("%s openwifi_dev_probe: test_mode %d\n", sdr_compatible_str, test_mode); 1999 2000 //let's by default turn radio on when probing 2001 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) { 2002 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, false, true, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 2003 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 2004 } else { 2005 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, true, false, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 2006 reg = ad9361_get_tx_atten(priv->ad9361_phy, 1); 2007 } 2008 if (reg == AD9361_RADIO_ON_TX_ATT) { 2009 priv->rfkill_off = 1;// 0 off, 1 on 2010 printk("%s openwifi_dev_probe: rfkill radio on\n",sdr_compatible_str); 2011 } 2012 else 2013 printk("%s openwifi_dev_probe: WARNING rfkill radio on failed. tx att read %d require %d\n",sdr_compatible_str, reg, AD9361_RADIO_ON_TX_ATT); 2014 2015 memset(priv->drv_rx_reg_val,0,sizeof(priv->drv_rx_reg_val)); 2016 memset(priv->drv_tx_reg_val,0,sizeof(priv->drv_tx_reg_val)); 2017 memset(priv->drv_xpu_reg_val,0,sizeof(priv->drv_xpu_reg_val)); 2018 2019 // //set ad9361 in certain mode 2020 #if 0 2021 err = ad9361_set_trx_clock_chain_freq(priv->ad9361_phy,priv->rf_bw); 2022 printk("%s openwifi_dev_probe: ad9361_set_trx_clock_chain_freq %dHz err %d\n",sdr_compatible_str, priv->rf_bw,err); 2023 err = ad9361_update_rf_bandwidth(priv->ad9361_phy,priv->rf_bw,priv->rf_bw); 2024 printk("%s openwifi_dev_probe: ad9361_update_rf_bandwidth %dHz err %d\n",sdr_compatible_str, priv->rf_bw,err); 2025 2026 rx_intf_api->hw_init(priv->rx_intf_cfg,8,8); 2027 tx_intf_api->hw_init(priv->tx_intf_cfg,8,8); 2028 openofdm_tx_api->hw_init(priv->openofdm_tx_cfg); 2029 openofdm_rx_api->hw_init(priv->openofdm_rx_cfg); 2030 printk("%s openwifi_dev_probe: rx_intf_cfg %d openofdm_rx_cfg %d tx_intf_cfg %d openofdm_tx_cfg %d\n",sdr_compatible_str, priv->rx_intf_cfg, priv->openofdm_rx_cfg, priv->tx_intf_cfg, priv->openofdm_tx_cfg); 2031 printk("%s openwifi_dev_probe: rx_freq_offset_to_lo_MHz %d tx_freq_offset_to_lo_MHz %d\n",sdr_compatible_str, priv->rx_freq_offset_to_lo_MHz, priv->tx_freq_offset_to_lo_MHz); 2032 #endif 2033 2034 dev->max_rates = 1; //maximum number of alternate rate retry stages the hw can handle. 2035 2036 SET_IEEE80211_DEV(dev, &pdev->dev); 2037 platform_set_drvdata(pdev, dev); 2038 2039 BUILD_BUG_ON(sizeof(priv->rates_2GHz) != sizeof(openwifi_2GHz_rates)); 2040 BUILD_BUG_ON(sizeof(priv->rates_5GHz) != sizeof(openwifi_5GHz_rates)); 2041 BUILD_BUG_ON(sizeof(priv->channels_2GHz) != sizeof(openwifi_2GHz_channels)); 2042 BUILD_BUG_ON(sizeof(priv->channels_5GHz) != sizeof(openwifi_5GHz_channels)); 2043 2044 memcpy(priv->rates_2GHz, openwifi_2GHz_rates, sizeof(openwifi_2GHz_rates)); 2045 memcpy(priv->rates_5GHz, openwifi_5GHz_rates, sizeof(openwifi_5GHz_rates)); 2046 memcpy(priv->channels_2GHz, openwifi_2GHz_channels, sizeof(openwifi_2GHz_channels)); 2047 memcpy(priv->channels_5GHz, openwifi_5GHz_channels, sizeof(openwifi_5GHz_channels)); 2048 2049 priv->band = BAND_5_8GHZ; //this can be changed by band _rf_set_channel() (2.4GHz ERP(OFDM)) (5GHz OFDM) 2050 priv->channel = 44; //currently useless. this can be changed by band _rf_set_channel() 2051 priv->use_short_slot = false; //this can be changed by openwifi_bss_info_changed: BSS_CHANGED_ERP_SLOT 2052 2053 priv->band_2GHz.band = NL80211_BAND_2GHZ; 2054 priv->band_2GHz.channels = priv->channels_2GHz; 2055 priv->band_2GHz.n_channels = ARRAY_SIZE(priv->channels_2GHz); 2056 priv->band_2GHz.bitrates = priv->rates_2GHz; 2057 priv->band_2GHz.n_bitrates = ARRAY_SIZE(priv->rates_2GHz); 2058 priv->band_2GHz.ht_cap.ht_supported = true; 2059 priv->band_2GHz.ht_cap.cap = IEEE80211_HT_CAP_SGI_20; 2060 memset(&priv->band_2GHz.ht_cap.mcs, 0, sizeof(priv->band_2GHz.ht_cap.mcs)); 2061 priv->band_2GHz.ht_cap.mcs.rx_mask[0] = 0xff; 2062 priv->band_2GHz.ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 2063 dev->wiphy->bands[NL80211_BAND_2GHZ] = &(priv->band_2GHz); 2064 2065 priv->band_5GHz.band = NL80211_BAND_5GHZ; 2066 priv->band_5GHz.channels = priv->channels_5GHz; 2067 priv->band_5GHz.n_channels = ARRAY_SIZE(priv->channels_5GHz); 2068 priv->band_5GHz.bitrates = priv->rates_5GHz; 2069 priv->band_5GHz.n_bitrates = ARRAY_SIZE(priv->rates_5GHz); 2070 priv->band_5GHz.ht_cap.ht_supported = true; 2071 priv->band_5GHz.ht_cap.cap = IEEE80211_HT_CAP_SGI_20; 2072 memset(&priv->band_5GHz.ht_cap.mcs, 0, sizeof(priv->band_5GHz.ht_cap.mcs)); 2073 priv->band_5GHz.ht_cap.mcs.rx_mask[0] = 0xff; 2074 priv->band_5GHz.ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 2075 dev->wiphy->bands[NL80211_BAND_5GHZ] = &(priv->band_5GHz); 2076 2077 printk("%s openwifi_dev_probe: band_2GHz.n_channels %d n_bitrates %d band_5GHz.n_channels %d n_bitrates %d\n",sdr_compatible_str, 2078 priv->band_2GHz.n_channels,priv->band_2GHz.n_bitrates,priv->band_5GHz.n_channels,priv->band_5GHz.n_bitrates); 2079 2080 ieee80211_hw_set(dev, HOST_BROADCAST_PS_BUFFERING); 2081 ieee80211_hw_set(dev, RX_INCLUDES_FCS); 2082 ieee80211_hw_set(dev, BEACON_TX_STATUS); 2083 2084 dev->vif_data_size = sizeof(struct openwifi_vif); 2085 dev->wiphy->interface_modes = 2086 BIT(NL80211_IFTYPE_MONITOR)| 2087 BIT(NL80211_IFTYPE_P2P_GO) | 2088 BIT(NL80211_IFTYPE_P2P_CLIENT) | 2089 BIT(NL80211_IFTYPE_AP) | 2090 BIT(NL80211_IFTYPE_STATION) | 2091 BIT(NL80211_IFTYPE_ADHOC) | 2092 BIT(NL80211_IFTYPE_MESH_POINT) | 2093 BIT(NL80211_IFTYPE_OCB); 2094 dev->wiphy->iface_combinations = &openwifi_if_comb; 2095 dev->wiphy->n_iface_combinations = 1; 2096 2097 dev->wiphy->regulatory_flags = (REGULATORY_STRICT_REG|REGULATORY_CUSTOM_REG); // use our own config within strict regulation 2098 //dev->wiphy->regulatory_flags = REGULATORY_CUSTOM_REG; // use our own config 2099 wiphy_apply_custom_regulatory(dev->wiphy, &sdr_regd); 2100 2101 chip_name = "ZYNQ"; 2102 2103 /* we declare to MAC80211 all the queues except for beacon queue 2104 * that will be eventually handled by DRV. 2105 * TX rings are arranged in such a way that lower is the IDX, 2106 * higher is the priority, in order to achieve direct mapping 2107 * with mac80211, however the beacon queue is an exception and it 2108 * is mapped on the highst tx ring IDX. 2109 */ 2110 dev->queues = MAX_NUM_HW_QUEUE; 2111 //dev->queues = 1; 2112 2113 ieee80211_hw_set(dev, SIGNAL_DBM); 2114 2115 wiphy_ext_feature_set(dev->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST); 2116 2117 priv->rf = &ad9361_rf_ops; 2118 2119 memset(priv->dest_mac_addr_queue_map,0,sizeof(priv->dest_mac_addr_queue_map)); 2120 priv->slice_idx = 0xFFFFFFFF; 2121 2122 sg_init_table(&(priv->tx_sg), 1); 2123 2124 get_random_bytes(&rand_val, sizeof(rand_val)); 2125 rand_val%=250; 2126 priv->mac_addr[0]=0x66; priv->mac_addr[1]=0x55; priv->mac_addr[2]=0x44; priv->mac_addr[3]=0x33; priv->mac_addr[4]=0x22; 2127 priv->mac_addr[5]=rand_val+1; 2128 //priv->mac_addr[5]=0x11; 2129 if (!is_valid_ether_addr(priv->mac_addr)) { 2130 printk(KERN_WARNING "%s openwifi_dev_probe: WARNING Invalid hwaddr! Using randomly generated MAC addr\n",sdr_compatible_str); 2131 eth_random_addr(priv->mac_addr); 2132 } else { 2133 printk("%s openwifi_dev_probe: mac_addr %02x:%02x:%02x:%02x:%02x:%02x\n",sdr_compatible_str,priv->mac_addr[0],priv->mac_addr[1],priv->mac_addr[2],priv->mac_addr[3],priv->mac_addr[4],priv->mac_addr[5]); 2134 } 2135 SET_IEEE80211_PERM_ADDR(dev, priv->mac_addr); 2136 2137 spin_lock_init(&priv->lock); 2138 2139 err = ieee80211_register_hw(dev); 2140 if (err) { 2141 pr_err(KERN_ERR "%s openwifi_dev_probe: WARNING Cannot register device\n",sdr_compatible_str); 2142 goto err_free_dev; 2143 } else { 2144 printk("%s openwifi_dev_probe: ieee80211_register_hw %d\n",sdr_compatible_str, err); 2145 } 2146 2147 // // //--------------------hook leds (not complete yet)-------------------------------- 2148 // tmp_dev = bus_find_device( &platform_bus_type, NULL, "leds", custom_match_platform_dev ); //leds is the name in devicetree, not "compatiable" field 2149 // if (!tmp_dev) { 2150 // printk(KERN_ERR "%s bus_find_device platform_bus_type leds-gpio failed\n",sdr_compatible_str); 2151 // err = -ENOMEM; 2152 // goto err_free_dev; 2153 // } 2154 2155 // tmp_pdev = to_platform_device(tmp_dev); 2156 // if (!tmp_pdev) { 2157 // printk(KERN_ERR "%s to_platform_device failed for leds-gpio\n",sdr_compatible_str); 2158 // err = -ENOMEM; 2159 // goto err_free_dev; 2160 // } 2161 2162 // tmp_led_priv = platform_get_drvdata(tmp_pdev); 2163 // if (!tmp_led_priv) { 2164 // printk(KERN_ERR "%s platform_get_drvdata failed for leds-gpio\n",sdr_compatible_str); 2165 // err = -ENOMEM; 2166 // goto err_free_dev; 2167 // } 2168 // printk("%s openwifi_dev_probe: leds-gpio detect %d leds!\n",sdr_compatible_str, tmp_led_priv->num_leds); 2169 // if (tmp_led_priv->num_leds!=4){ 2170 // printk(KERN_ERR "%s WARNING we expect 4 leds, but actual %d leds\n",sdr_compatible_str,tmp_led_priv->num_leds); 2171 // err = -ENOMEM; 2172 // goto err_free_dev; 2173 // } 2174 // gpiod_set_value(tmp_led_priv->leds[0].gpiod, 1);//light it 2175 // gpiod_set_value(tmp_led_priv->leds[3].gpiod, 0);//black it 2176 // priv->num_led = tmp_led_priv->num_leds; 2177 // priv->led[0] = &(tmp_led_priv->leds[0].cdev); 2178 // priv->led[1] = &(tmp_led_priv->leds[1].cdev); 2179 // priv->led[2] = &(tmp_led_priv->leds[2].cdev); 2180 // priv->led[3] = &(tmp_led_priv->leds[3].cdev); 2181 2182 // snprintf(priv->led_name[0], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::radio", wiphy_name(dev->wiphy)); 2183 // snprintf(priv->led_name[1], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::assoc", wiphy_name(dev->wiphy)); 2184 // snprintf(priv->led_name[2], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::tx", wiphy_name(dev->wiphy)); 2185 // snprintf(priv->led_name[3], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::rx", wiphy_name(dev->wiphy)); 2186 2187 wiphy_info(dev->wiphy, "hwaddr %pm, %s + %s\n", 2188 priv->mac_addr, chip_name, priv->rf->name); 2189 2190 openwifi_rfkill_init(dev); 2191 return 0; 2192 2193 err_free_dev: 2194 ieee80211_free_hw(dev); 2195 2196 return err; 2197 } 2198 2199 static int openwifi_dev_remove(struct platform_device *pdev) 2200 { 2201 struct ieee80211_hw *dev = platform_get_drvdata(pdev); 2202 2203 if (!dev) { 2204 pr_info("%s openwifi_dev_remove: dev %p\n", sdr_compatible_str, (void*)dev); 2205 return(-1); 2206 } 2207 2208 openwifi_rfkill_exit(dev); 2209 ieee80211_unregister_hw(dev); 2210 ieee80211_free_hw(dev); 2211 return(0); 2212 } 2213 2214 static struct platform_driver openwifi_dev_driver = { 2215 .driver = { 2216 .name = "sdr,sdr", 2217 .owner = THIS_MODULE, 2218 .of_match_table = openwifi_dev_of_ids, 2219 }, 2220 .probe = openwifi_dev_probe, 2221 .remove = openwifi_dev_remove, 2222 }; 2223 2224 module_platform_driver(openwifi_dev_driver); 2225