1 // Author: Xianjun Jiao, Michael Mehari, Wei Liu 2 // SPDX-FileCopyrightText: 2019 UGent 3 // SPDX-License-Identifier: AGPL-3.0-or-later 4 5 #include <linux/bitops.h> 6 #include <linux/dmapool.h> 7 #include <linux/io.h> 8 #include <linux/iopoll.h> 9 #include <linux/of_address.h> 10 #include <linux/of_platform.h> 11 #include <linux/of_irq.h> 12 #include <linux/slab.h> 13 #include <linux/clk.h> 14 #include <linux/io-64-nonatomic-lo-hi.h> 15 16 #include <linux/delay.h> 17 #include <linux/interrupt.h> 18 19 #include <linux/dmaengine.h> 20 #include <linux/slab.h> 21 #include <linux/delay.h> 22 #include <linux/etherdevice.h> 23 24 #include <linux/init.h> 25 #include <linux/kthread.h> 26 #include <linux/module.h> 27 #include <linux/of_dma.h> 28 #include <linux/platform_device.h> 29 #include <linux/random.h> 30 #include <linux/slab.h> 31 #include <linux/wait.h> 32 #include <linux/sched/task.h> 33 #include <linux/dma/xilinx_dma.h> 34 #include <linux/spi/spi.h> 35 #include <net/mac80211.h> 36 37 #include <linux/clk.h> 38 #include <linux/clkdev.h> 39 #include <linux/clk-provider.h> 40 41 #include <linux/iio/iio.h> 42 #include <linux/iio/sysfs.h> 43 44 #include <linux/gpio.h> 45 #include <linux/leds.h> 46 47 #define IIO_AD9361_USE_PRIVATE_H_ 48 #include "ad9361/ad9361_regs.h" 49 #include "ad9361/ad9361.h" 50 #include "ad9361/ad9361_private.h" 51 52 #include <../../drivers/iio/frequency/cf_axi_dds.h> 53 54 #include "../user_space/sdrctl_src/nl80211_testmode_def.h" 55 #include "hw_def.h" 56 #include "sdr.h" 57 #include "git_rev.h" 58 59 // driver API of component driver 60 extern struct tx_intf_driver_api *tx_intf_api; 61 extern struct rx_intf_driver_api *rx_intf_api; 62 extern struct openofdm_tx_driver_api *openofdm_tx_api; 63 extern struct openofdm_rx_driver_api *openofdm_rx_api; 64 extern struct xpu_driver_api *xpu_api; 65 66 static int test_mode = 0; // 0 normal; 1 rx test 67 68 MODULE_AUTHOR("Xianjun Jiao"); 69 MODULE_DESCRIPTION("SDR driver"); 70 MODULE_LICENSE("GPL v2"); 71 72 module_param(test_mode, int, 0); 73 MODULE_PARM_DESC(myint, "test_mode. 0 normal; 1 rx test"); 74 75 // ---------------rfkill--------------------------------------- 76 static bool openwifi_is_radio_enabled(struct openwifi_priv *priv) 77 { 78 int reg; 79 80 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) 81 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 82 else 83 reg = ad9361_get_tx_atten(priv->ad9361_phy, 1); 84 85 if (reg == AD9361_RADIO_ON_TX_ATT) 86 return true;// 0 off, 1 on 87 return false; 88 } 89 90 void openwifi_rfkill_init(struct ieee80211_hw *hw) 91 { 92 struct openwifi_priv *priv = hw->priv; 93 94 priv->rfkill_off = openwifi_is_radio_enabled(priv); 95 printk("%s openwifi_rfkill_init: wireless switch is %s\n", sdr_compatible_str, priv->rfkill_off ? "on" : "off"); 96 wiphy_rfkill_set_hw_state(hw->wiphy, !priv->rfkill_off); 97 wiphy_rfkill_start_polling(hw->wiphy); 98 } 99 100 void openwifi_rfkill_poll(struct ieee80211_hw *hw) 101 { 102 bool enabled; 103 struct openwifi_priv *priv = hw->priv; 104 105 enabled = openwifi_is_radio_enabled(priv); 106 // printk("%s openwifi_rfkill_poll: wireless radio switch turned %s\n", sdr_compatible_str, enabled ? "on" : "off"); 107 if (unlikely(enabled != priv->rfkill_off)) { 108 priv->rfkill_off = enabled; 109 printk("%s openwifi_rfkill_poll: WARNING wireless radio switch turned %s\n", sdr_compatible_str, enabled ? "on" : "off"); 110 wiphy_rfkill_set_hw_state(hw->wiphy, !enabled); 111 } 112 } 113 114 void openwifi_rfkill_exit(struct ieee80211_hw *hw) 115 { 116 printk("%s openwifi_rfkill_exit\n", sdr_compatible_str); 117 wiphy_rfkill_stop_polling(hw->wiphy); 118 } 119 //----------------rfkill end----------------------------------- 120 121 //static void ad9361_rf_init(void); 122 //static void ad9361_rf_stop(void); 123 //static void ad9361_rf_calc_rssi(void); 124 static void ad9361_rf_set_channel(struct ieee80211_hw *dev, 125 struct ieee80211_conf *conf) 126 { 127 struct openwifi_priv *priv = dev->priv; 128 u32 actual_rx_lo = conf->chandef.chan->center_freq - priv->rx_freq_offset_to_lo_MHz + priv->drv_rx_reg_val[DRV_RX_REG_IDX_EXTRA_FO]; 129 u32 actual_tx_lo, reg_val; 130 bool change_flag = (actual_rx_lo != priv->actual_rx_lo); 131 132 if (change_flag) { 133 priv->actual_rx_lo = actual_rx_lo; 134 135 actual_tx_lo = conf->chandef.chan->center_freq - priv->tx_freq_offset_to_lo_MHz; 136 137 ad9361_clk_set_rate(priv->ad9361_phy->clks[RX_RFPLL], ( ((u64)1000000ull)*((u64)actual_rx_lo )>>1) ); 138 ad9361_clk_set_rate(priv->ad9361_phy->clks[TX_RFPLL], ( ((u64)1000000ull)*((u64)actual_tx_lo )>>1) ); 139 140 if (actual_rx_lo<2412) { 141 priv->rssi_correction = 153; 142 } else if (actual_rx_lo<=2484) { 143 priv->rssi_correction = 153; 144 } else if (actual_rx_lo<5160) { 145 priv->rssi_correction = 153; 146 } else if (actual_rx_lo<=5240) { 147 priv->rssi_correction = 145; 148 } else if (actual_rx_lo<=5320) { 149 priv->rssi_correction = 148; 150 } else { 151 priv->rssi_correction = 148; 152 } 153 154 // xpu_api->XPU_REG_LBT_TH_write((priv->rssi_correction-62)<<1); // -62dBm 155 reg_val=xpu_api->XPU_REG_LBT_TH_read(); 156 xpu_api->XPU_REG_LBT_TH_write( (reg_val & 0xFFFF0000) | ((priv->rssi_correction-62-16)<<1)); // wei's magic value is 135, here is 134 @ ch 44 157 158 if (actual_rx_lo < 2500) { 159 //priv->slot_time = 20; //20 is default slot time in ERP(OFDM)/11g 2.4G; short one is 9. 160 //xpu_api->XPU_REG_BAND_CHANNEL_write(BAND_2_4GHZ<<16); 161 if (priv->band != BAND_2_4GHZ) { 162 priv->band = BAND_2_4GHZ; 163 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 164 } 165 // //xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((45+2)*10)<<16) | 10 ); // high 16 bits to cover sig valid of ACK packet, low 16 bits is adjustment of fcs valid waiting time. let's add 2us for those device that is really "slow"! 166 // xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((45+2+2)*10)<<16) | 10 );//add 2us for longer fir. BUT corrding to FPGA probing test, we do not need this 167 // xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 0 ); 168 // tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write(((10)*10)<<16); 169 } 170 else { 171 //priv->slot_time = 9; //default slot time of OFDM PHY (OFDM by default means 5GHz) 172 // xpu_api->XPU_REG_BAND_CHANNEL_write(BAND_5_8GHZ<<16); 173 if (priv->band != BAND_5_8GHZ) { 174 priv->band = BAND_5_8GHZ; 175 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 176 } 177 // //xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((51+2)*10)<<16) | 10 ); // because 5GHz needs longer SIFS (16 instead of 10), we need 58 instead of 48 for XPU low mac setting. let's add 2us for those device that is really "slow"! 178 // xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((51+2+2)*10)<<16) | 10 );//add 2us for longer fir. BUT corrding to FPGA probing test, we do not need this 179 // //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 60*10 ); 180 // xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 50*10 );// for longer fir we need this delay 1us shorter 181 // tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write(((16)*10)<<16); 182 } 183 //printk("%s ad9361_rf_set_channel %dM rssi_correction %d\n", sdr_compatible_str,conf->chandef.chan->center_freq,priv->rssi_correction); 184 // //-- use less 185 //clk_prepare_enable(priv->ad9361_phy->clks[RX_RFPLL]); 186 //printk("%s ad9361_rf_set_channel tune to %d read back %llu\n", sdr_compatible_str,conf->chandef.chan->center_freq,2*priv->ad9361_phy->state->current_rx_lo_freq); 187 //ad9361_set_trx_clock_chain_default(priv->ad9361_phy); 188 //printk("%s ad9361_rf_set_channel tune to %d read back %llu\n", sdr_compatible_str,conf->chandef.chan->center_freq,2*priv->ad9361_phy->state->current_rx_lo_freq); 189 } 190 printk("%s ad9361_rf_set_channel %dM rssi_correction %d (change flag %d)\n", sdr_compatible_str,conf->chandef.chan->center_freq,priv->rssi_correction,change_flag); 191 } 192 193 const struct openwifi_rf_ops ad9361_rf_ops = { 194 .name = "ad9361", 195 // .init = ad9361_rf_init, 196 // .stop = ad9361_rf_stop, 197 .set_chan = ad9361_rf_set_channel, 198 // .calc_rssi = ad9361_rf_calc_rssi, 199 }; 200 201 u16 reverse16(u16 d) { 202 union u16_byte2 tmp0, tmp1; 203 tmp0.a = d; 204 tmp1.c[0] = tmp0.c[1]; 205 tmp1.c[1] = tmp0.c[0]; 206 return(tmp1.a); 207 } 208 209 u32 reverse32(u32 d) { 210 union u32_byte4 tmp0, tmp1; 211 tmp0.a = d; 212 tmp1.c[0] = tmp0.c[3]; 213 tmp1.c[1] = tmp0.c[2]; 214 tmp1.c[2] = tmp0.c[1]; 215 tmp1.c[3] = tmp0.c[0]; 216 return(tmp1.a); 217 } 218 219 static int openwifi_init_tx_ring(struct openwifi_priv *priv, int ring_idx) 220 { 221 struct openwifi_ring *ring = &(priv->tx_ring[ring_idx]); 222 int i; 223 224 ring->stop_flag = 0; 225 ring->bd_wr_idx = 0; 226 ring->bd_rd_idx = 0; 227 ring->bds = kmalloc(sizeof(struct openwifi_buffer_descriptor)*NUM_TX_BD,GFP_KERNEL); 228 if (ring->bds==NULL) { 229 printk("%s openwifi_init_tx_ring: WARNING Cannot allocate TX ring\n",sdr_compatible_str); 230 return -ENOMEM; 231 } 232 233 for (i = 0; i < NUM_TX_BD; i++) { 234 ring->bds[i].skb_linked=0; // for tx, skb is from upper layer 235 //at frist right after skb allocated, head, data, tail are the same. 236 ring->bds[i].dma_mapping_addr = 0; // for tx, mapping is done after skb is received from uppler layer in tx routine 237 } 238 239 return 0; 240 } 241 242 static void openwifi_free_tx_ring(struct openwifi_priv *priv, int ring_idx) 243 { 244 struct openwifi_ring *ring = &(priv->tx_ring[ring_idx]); 245 int i; 246 247 ring->stop_flag = 0; 248 ring->bd_wr_idx = 0; 249 ring->bd_rd_idx = 0; 250 for (i = 0; i < NUM_TX_BD; i++) { 251 if (ring->bds[i].skb_linked == 0 && ring->bds[i].dma_mapping_addr == 0) 252 continue; 253 if (ring->bds[i].dma_mapping_addr != 0) 254 dma_unmap_single(priv->tx_chan->device->dev, ring->bds[i].dma_mapping_addr,ring->bds[i].skb_linked->len, DMA_MEM_TO_DEV); 255 // if (ring->bds[i].skb_linked!=NULL) 256 // dev_kfree_skb(ring->bds[i].skb_linked); // only use dev_kfree_skb when there is exception 257 if ( (ring->bds[i].dma_mapping_addr != 0 && ring->bds[i].skb_linked == 0) || 258 (ring->bds[i].dma_mapping_addr == 0 && ring->bds[i].skb_linked != 0)) 259 printk("%s openwifi_free_tx_ring: WARNING ring %d i %d skb_linked %p dma_mapping_addr %08llx\n", sdr_compatible_str, 260 ring_idx, i, (void*)(ring->bds[i].skb_linked), ring->bds[i].dma_mapping_addr); 261 262 ring->bds[i].skb_linked=0; 263 ring->bds[i].dma_mapping_addr = 0; 264 } 265 if (ring->bds) 266 kfree(ring->bds); 267 ring->bds = NULL; 268 } 269 270 static int openwifi_init_rx_ring(struct openwifi_priv *priv) 271 { 272 priv->rx_cyclic_buf = dma_alloc_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,&priv->rx_cyclic_buf_dma_mapping_addr,GFP_KERNEL); 273 if (!priv->rx_cyclic_buf) { 274 printk("%s openwifi_init_rx_ring: WARNING dma_alloc_coherent failed!\n", sdr_compatible_str); 275 dma_free_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,priv->rx_cyclic_buf,priv->rx_cyclic_buf_dma_mapping_addr); 276 return(-1); 277 } 278 return 0; 279 } 280 281 static void openwifi_free_rx_ring(struct openwifi_priv *priv) 282 { 283 if (priv->rx_cyclic_buf) 284 dma_free_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,priv->rx_cyclic_buf,priv->rx_cyclic_buf_dma_mapping_addr); 285 286 priv->rx_cyclic_buf_dma_mapping_addr = 0; 287 priv->rx_cyclic_buf = 0; 288 } 289 290 static int rx_dma_setup(struct ieee80211_hw *dev){ 291 struct openwifi_priv *priv = dev->priv; 292 struct dma_device *rx_dev = priv->rx_chan->device; 293 294 priv->rxd = rx_dev->device_prep_dma_cyclic(priv->rx_chan,priv->rx_cyclic_buf_dma_mapping_addr,RX_BD_BUF_SIZE*NUM_RX_BD,RX_BD_BUF_SIZE,DMA_DEV_TO_MEM,DMA_CTRL_ACK|DMA_PREP_INTERRUPT); 295 if (!(priv->rxd)) { 296 openwifi_free_rx_ring(priv); 297 printk("%s rx_dma_setup: WARNING rx_dev->device_prep_dma_cyclic %p\n", sdr_compatible_str, (void*)(priv->rxd)); 298 return(-1); 299 } 300 priv->rxd->callback = 0; 301 priv->rxd->callback_param = 0; 302 303 priv->rx_cookie = priv->rxd->tx_submit(priv->rxd); 304 305 if (dma_submit_error(priv->rx_cookie)) { 306 printk("%s rx_dma_setup: WARNING dma_submit_error(rx_cookie) %d\n", sdr_compatible_str, (u32)(priv->rx_cookie)); 307 return(-1); 308 } 309 310 dma_async_issue_pending(priv->rx_chan); 311 return(0); 312 } 313 314 static irqreturn_t openwifi_rx_interrupt(int irq, void *dev_id) 315 { 316 struct ieee80211_hw *dev = dev_id; 317 struct openwifi_priv *priv = dev->priv; 318 struct ieee80211_rx_status rx_status = {0}; 319 struct sk_buff *skb; 320 struct ieee80211_hdr *hdr; 321 u32 addr1_low32=0, addr2_low32=0, addr3_low32=0, len, rate_idx, tsft_low, tsft_high, loop_count=0, ht_flag, short_gi;//, fc_di; 322 // u32 dma_driver_buf_idx_mod; 323 u8 *pdata_tmp, fcs_ok, target_buf_idx;//, phy_rx_sn_hw; 324 s8 signal; 325 u16 rssi_val, addr1_high16=0, addr2_high16=0, addr3_high16=0, sc=0; 326 bool content_ok = false, len_overflow = false; 327 struct dma_tx_state state; 328 static u8 target_buf_idx_old = 0xFF; 329 330 spin_lock(&priv->lock); 331 priv->rx_chan->device->device_tx_status(priv->rx_chan,priv->rx_cookie,&state); 332 target_buf_idx = ((state.residue-1)&(NUM_RX_BD-1)); 333 334 while( target_buf_idx_old!=target_buf_idx ) { // loop all rx buffers that have new rx packets 335 target_buf_idx_old=((target_buf_idx_old+1)&(NUM_RX_BD-1)); 336 pdata_tmp = priv->rx_cyclic_buf + target_buf_idx_old*RX_BD_BUF_SIZE; // our header insertion is at the beginning 337 tsft_low = (*((u32*)(pdata_tmp+0 ))); 338 tsft_high = (*((u32*)(pdata_tmp+4 ))); 339 rssi_val = (*((u16*)(pdata_tmp+8 ))); 340 len = (*((u16*)(pdata_tmp+12))); 341 342 len_overflow = (len>(RX_BD_BUF_SIZE-16)?true:false); 343 344 rate_idx = (*((u16*)(pdata_tmp+14))); 345 short_gi = ((rate_idx&0x20)!=0); 346 rate_idx = (rate_idx&0xDF); 347 348 fcs_ok = ( len_overflow?0:(*(( u8*)(pdata_tmp+16+len-1))) ); 349 350 //phy_rx_sn_hw = (fcs_ok&(NUM_RX_BD-1)); 351 // phy_rx_sn_hw = (fcs_ok&0x7f);//0x7f is FPGA limitation 352 // dma_driver_buf_idx_mod = (state.residue&0x7f); 353 fcs_ok = ((fcs_ok&0x80)!=0); 354 ht_flag = ((rate_idx&0x10)!=0); 355 356 if ( (len>=14 && (!len_overflow)) && (rate_idx>=8 && rate_idx<=23)) { 357 // if ( phy_rx_sn_hw!=dma_driver_buf_idx_mod) { 358 // printk("%s openwifi_rx_interrupt: WARNING sn %d next buf_idx %d!\n", sdr_compatible_str,phy_rx_sn_hw,dma_driver_buf_idx_mod); 359 // } 360 content_ok = true; 361 } else { 362 printk("%s openwifi_rx_interrupt: WARNING content!\n", sdr_compatible_str); 363 content_ok = false; 364 } 365 366 rssi_val = (rssi_val>>1); 367 if ( (rssi_val+128)<priv->rssi_correction ) 368 signal = -128; 369 else 370 signal = rssi_val - priv->rssi_correction; 371 372 // fc_di = (*((u32*)(pdata_tmp+16))); 373 // addr1_high16 = (*((u16*)(pdata_tmp+16+4))); 374 // addr1_low32 = (*((u32*)(pdata_tmp+16+4+2))); 375 // addr2_high16 = (*((u16*)(pdata_tmp+16+6+4))); 376 // addr2_low32 = (*((u32*)(pdata_tmp+16+6+4+2))); 377 // addr3_high16 = (*((u16*)(pdata_tmp+16+12+4))); 378 // addr3_low32 = (*((u32*)(pdata_tmp+16+12+4+2))); 379 if ( (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&2) || ( (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&1) && fcs_ok==0 ) ) { 380 hdr = (struct ieee80211_hdr *)(pdata_tmp+16); 381 addr1_low32 = *((u32*)(hdr->addr1+2)); 382 addr1_high16 = *((u16*)(hdr->addr1)); 383 if (len>=20) { 384 addr2_low32 = *((u32*)(hdr->addr2+2)); 385 addr2_high16 = *((u16*)(hdr->addr2)); 386 } 387 if (len>=26) { 388 addr3_low32 = *((u32*)(hdr->addr3+2)); 389 addr3_high16 = *((u16*)(hdr->addr3)); 390 } 391 if (len>=28) 392 sc = hdr->seq_ctrl; 393 394 if ( addr1_low32!=0xffffffff || addr1_high16!=0xffff ) 395 printk("%s openwifi_rx_interrupt:%4dbytes ht%d %3dM FC%04x DI%04x addr1/2/3:%04x%08x/%04x%08x/%04x%08x SC%04x fcs%d buf_idx%d %ddBm\n", sdr_compatible_str, 396 len, ht_flag, wifi_rate_table[rate_idx], hdr->frame_control, hdr->duration_id, 397 reverse16(addr1_high16), reverse32(addr1_low32), reverse16(addr2_high16), reverse32(addr2_low32), reverse16(addr3_high16), reverse32(addr3_low32), 398 sc, fcs_ok, target_buf_idx_old, signal); 399 } 400 401 // priv->phy_rx_sn_hw_old = phy_rx_sn_hw; 402 if (content_ok) { 403 skb = dev_alloc_skb(len); 404 if (skb) { 405 skb_put_data(skb,pdata_tmp+16,len); 406 407 rx_status.antenna = 0; 408 // def in ieee80211_rate openwifi_rates 0~11. 0~3 11b(1M~11M), 4~11 11a/g(6M~54M) 409 rx_status.rate_idx = wifi_rate_table_mapping[rate_idx]; 410 rx_status.signal = signal; 411 rx_status.freq = dev->conf.chandef.chan->center_freq; 412 rx_status.band = dev->conf.chandef.chan->band; 413 rx_status.mactime = ( ( (u64)tsft_low ) | ( ((u64)tsft_high)<<32 ) ); 414 rx_status.flag |= RX_FLAG_MACTIME_START; 415 if (!fcs_ok) 416 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC; 417 if (rate_idx <= 15) 418 rx_status.encoding = RX_ENC_LEGACY; 419 else 420 rx_status.encoding = RX_ENC_HT; 421 rx_status.bw = RATE_INFO_BW_20; 422 if (short_gi) 423 rx_status.enc_flags |= RX_ENC_FLAG_SHORT_GI; 424 425 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status)); // put rx_status into skb->cb, from now on skb->cb is not dma_dsts any more. 426 ieee80211_rx_irqsafe(dev, skb); // call mac80211 function 427 } else 428 printk("%s openwifi_rx_interrupt: WARNING dev_alloc_skb failed!\n", sdr_compatible_str); 429 } 430 loop_count++; 431 } 432 433 if ( loop_count!=1 && (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&1) ) 434 printk("%s openwifi_rx_interrupt: WARNING loop_count %d\n", sdr_compatible_str,loop_count); 435 436 // openwifi_rx_interrupt_out: 437 spin_unlock(&priv->lock); 438 return IRQ_HANDLED; 439 } 440 441 static irqreturn_t openwifi_tx_interrupt(int irq, void *dev_id) 442 { 443 struct ieee80211_hw *dev = dev_id; 444 struct openwifi_priv *priv = dev->priv; 445 struct openwifi_ring *ring; 446 struct sk_buff *skb; 447 struct ieee80211_tx_info *info; 448 u32 reg_val, hw_queue_len, prio, queue_idx, dma_fifo_no_room_flag, num_slot_random, cw, loop_count=0;//, i; 449 u8 tx_result_report; 450 // u16 prio_rd_idx_store[64]={0}; 451 452 spin_lock(&priv->lock); 453 454 while(1) { // loop all packets that have been sent by FPGA 455 reg_val = tx_intf_api->TX_INTF_REG_PKT_INFO_read(); 456 if (reg_val!=0xFFFFFFFF) { 457 prio = ((0x7FFFF & reg_val)>>(5+NUM_BIT_MAX_PHY_TX_SN+NUM_BIT_MAX_NUM_HW_QUEUE)); 458 cw = ((0xF0000000 & reg_val) >> 28); 459 num_slot_random = ((0xFF80000 ®_val)>>(2+5+NUM_BIT_MAX_PHY_TX_SN+NUM_BIT_MAX_NUM_HW_QUEUE)); 460 if(cw > 10) { 461 cw = 10 ; 462 num_slot_random += 512 ; 463 } 464 465 ring = &(priv->tx_ring[prio]); 466 ring->bd_rd_idx = ((reg_val>>5)&MAX_PHY_TX_SN); 467 skb = ring->bds[ring->bd_rd_idx].skb_linked; 468 469 dma_unmap_single(priv->tx_chan->device->dev,ring->bds[ring->bd_rd_idx].dma_mapping_addr, 470 skb->len, DMA_MEM_TO_DEV); 471 472 if ( ring->stop_flag == 1) { 473 // Wake up Linux queue if FPGA and driver ring have room 474 queue_idx = ((reg_val>>(5+NUM_BIT_MAX_PHY_TX_SN))&(MAX_NUM_HW_QUEUE-1)); 475 dma_fifo_no_room_flag = tx_intf_api->TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read(); 476 hw_queue_len = tx_intf_api->TX_INTF_REG_QUEUE_FIFO_DATA_COUNT_read(); 477 478 // printk("%s openwifi_tx_interrupt: WARNING loop %d prio %d queue %d no room flag %x hw queue len %08x wr %d rd %d call %d\n", sdr_compatible_str, 479 // loop_count, prio, queue_idx, dma_fifo_no_room_flag, hw_queue_len, ring->bd_wr_idx, ring->bd_rd_idx, priv->call_counter); 480 481 if ( ((dma_fifo_no_room_flag>>queue_idx)&1)==0 && (NUM_TX_BD-((hw_queue_len>>(queue_idx*8))&0xFF))>=RING_ROOM_THRESHOLD ) { 482 // printk("%s openwifi_tx_interrupt: WARNING ieee80211_wake_queue loop %d call %d\n", sdr_compatible_str, loop_count, priv->call_counter); 483 printk("%s openwifi_tx_interrupt: WARNING ieee80211_wake_queue prio %d queue %d no room flag %x hw queue len %08x wr %d rd %d\n", sdr_compatible_str, 484 prio, queue_idx, dma_fifo_no_room_flag, hw_queue_len, ring->bd_wr_idx, ring->bd_rd_idx); 485 ieee80211_wake_queue(dev, prio); 486 ring->stop_flag = 0; 487 } 488 } 489 490 if ( (*(u32*)(&(skb->data[4]))) || ((*(u32*)(&(skb->data[12])))&0xFFFF0000) ) { 491 printk("%s openwifi_tx_interrupt: WARNING %08x %08x %08x %08x\n", sdr_compatible_str, *(u32*)(&(skb->data[12])), *(u32*)(&(skb->data[8])), *(u32*)(&(skb->data[4])), *(u32*)(&(skb->data[0]))); 492 continue; 493 } 494 495 skb_pull(skb, LEN_PHY_HEADER); 496 //skb_trim(skb, num_byte_pad_skb); 497 info = IEEE80211_SKB_CB(skb); 498 ieee80211_tx_info_clear_status(info); 499 500 tx_result_report = (reg_val&0x1F); 501 if ( !(info->flags & IEEE80211_TX_CTL_NO_ACK) ) { 502 if ((tx_result_report&0x10)==0) 503 info->flags |= IEEE80211_TX_STAT_ACK; 504 505 // printk("%s openwifi_tx_interrupt: rate&try: %d %d %03x; %d %d %03x; %d %d %03x; %d %d %03x\n", sdr_compatible_str, 506 // info->status.rates[0].idx,info->status.rates[0].count,info->status.rates[0].flags, 507 // info->status.rates[1].idx,info->status.rates[1].count,info->status.rates[1].flags, 508 // info->status.rates[2].idx,info->status.rates[2].count,info->status.rates[2].flags, 509 // info->status.rates[3].idx,info->status.rates[3].count,info->status.rates[3].flags); 510 } 511 512 info->status.rates[0].count = (tx_result_report&0xF) + 1; //according to our test, the 1st rate is the most important. we only do retry on the 1st rate 513 info->status.rates[1].idx = -1; 514 info->status.rates[2].idx = -1; 515 info->status.rates[3].idx = -1;//in mac80211.h: #define IEEE80211_TX_MAX_RATES 4 516 517 if ( (tx_result_report&0x10) && ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&1) ) 518 printk("%s openwifi_tx_interrupt: WARNING tx_result %02x prio%d wr%d rd%d\n", sdr_compatible_str, tx_result_report, prio, ring->bd_wr_idx, ring->bd_rd_idx); 519 if ( ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&2) ) 520 printk("%s openwifi_tx_interrupt: tx_result %02x prio%d wr%d rd%d num_rand_slot %d cw %d \n", sdr_compatible_str, tx_result_report, prio, ring->bd_wr_idx, ring->bd_rd_idx, num_slot_random,cw); 521 522 ieee80211_tx_status_irqsafe(dev, skb); 523 524 loop_count++; 525 526 // printk("%s openwifi_tx_interrupt: loop %d prio %d rd %d\n", sdr_compatible_str, loop_count, prio, ring->bd_rd_idx); 527 528 } else 529 break; 530 } 531 if ( loop_count!=1 && ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&1) ) 532 printk("%s openwifi_tx_interrupt: WARNING loop_count %d\n", sdr_compatible_str, loop_count); 533 534 spin_unlock(&priv->lock); 535 return IRQ_HANDLED; 536 } 537 538 u32 gen_parity(u32 v){ 539 v ^= v >> 1; 540 v ^= v >> 2; 541 v = (v & 0x11111111U) * 0x11111111U; 542 return (v >> 28) & 1; 543 } 544 545 u8 gen_ht_sig_crc(u64 m) 546 { 547 u8 i, temp, c[8] = {1, 1, 1, 1, 1, 1, 1, 1}, ht_sig_crc; 548 549 for (i = 0; i < 34; i++) 550 { 551 temp = c[7] ^ ((m >> i) & 0x01); 552 553 c[7] = c[6]; 554 c[6] = c[5]; 555 c[5] = c[4]; 556 c[4] = c[3]; 557 c[3] = c[2]; 558 c[2] = c[1] ^ temp; 559 c[1] = c[0] ^ temp; 560 c[0] = temp; 561 } 562 ht_sig_crc = ((~c[7] & 0x01) << 0) | ((~c[6] & 0x01) << 1) | ((~c[5] & 0x01) << 2) | ((~c[4] & 0x01) << 3) | ((~c[3] & 0x01) << 4) | ((~c[2] & 0x01) << 5) | ((~c[1] & 0x01) << 6) | ((~c[0] & 0x01) << 7); 563 564 return ht_sig_crc; 565 } 566 567 u32 calc_phy_header(u8 rate_hw_value, bool use_ht_rate, bool use_short_gi, u32 len, u8 *bytes){ 568 //u32 signal_word = 0 ; 569 u8 SIG_RATE = 0, HT_SIG_RATE; 570 u8 len_2to0, len_10to3, len_msb,b0,b1,b2, header_parity ; 571 u32 l_len, ht_len, ht_sig1, ht_sig2; 572 573 // printk("rate_hw_value=%u\tuse_ht_rate=%u\tuse_short_gi=%u\tlen=%u\n", rate_hw_value, use_ht_rate, use_short_gi, len); 574 575 // HT-mixed mode ht signal 576 577 if(use_ht_rate) 578 { 579 SIG_RATE = wifi_mcs_table_11b_force_up[4]; 580 HT_SIG_RATE = rate_hw_value; 581 l_len = 24 * len / wifi_n_dbps_ht_table[rate_hw_value]; 582 ht_len = len; 583 } 584 else 585 { 586 // rate_hw_value = (rate_hw_value<=4?0:(rate_hw_value-4)); 587 // SIG_RATE = wifi_mcs_table_phy_tx[rate_hw_value]; 588 SIG_RATE = wifi_mcs_table_11b_force_up[rate_hw_value]; 589 l_len = len; 590 } 591 592 len_2to0 = l_len & 0x07 ; 593 len_10to3 = (l_len >> 3 ) & 0xFF ; 594 len_msb = (l_len >> 11) & 0x01 ; 595 596 b0=SIG_RATE | (len_2to0 << 5) ; 597 b1 = len_10to3 ; 598 header_parity = gen_parity((len_msb << 16)| (b1<<8) | b0) ; 599 b2 = ( len_msb | (header_parity << 1) ) ; 600 601 memset(bytes,0,16); 602 bytes[0] = b0 ; 603 bytes[1] = b1 ; 604 bytes[2] = b2; 605 606 // HT-mixed mode signal 607 if(use_ht_rate) 608 { 609 ht_sig1 = (HT_SIG_RATE & 0x7F) | ((ht_len << 8) & 0xFFFF00); 610 ht_sig2 = 0x04 | (use_short_gi << 7); 611 ht_sig2 = ht_sig2 | (gen_ht_sig_crc(ht_sig1 | ht_sig2 << 24) << 10); 612 613 bytes[3] = 1; 614 bytes[8] = (ht_sig1 & 0xFF); 615 bytes[9] = (ht_sig1 >> 8) & 0xFF; 616 bytes[10] = (ht_sig1 >> 16) & 0xFF; 617 bytes[11] = (ht_sig2 & 0xFF); 618 bytes[12] = (ht_sig2 >> 8) & 0xFF; 619 bytes[13] = (ht_sig2 >> 16) & 0xFF; 620 621 return(HT_SIG_RATE); 622 } 623 else 624 { 625 //signal_word = b0+(b1<<8)+(b2<<16) ; 626 //return signal_word; 627 return(SIG_RATE); 628 } 629 } 630 631 static inline struct gpio_led_data * //please align with the implementation in leds-gpio.c 632 cdev_to_gpio_led_data(struct led_classdev *led_cdev) 633 { 634 return container_of(led_cdev, struct gpio_led_data, cdev); 635 } 636 637 static void openwifi_tx(struct ieee80211_hw *dev, 638 struct ieee80211_tx_control *control, 639 struct sk_buff *skb) 640 { 641 struct openwifi_priv *priv = dev->priv; 642 unsigned long flags; 643 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 644 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 645 struct openwifi_ring *ring; 646 dma_addr_t dma_mapping_addr; 647 unsigned int prio, i; 648 u32 num_dma_symbol, len_mac_pdu, num_dma_byte, len_phy_packet, num_byte_pad; 649 u32 rate_signal_value,rate_hw_value,ack_flag; 650 u32 pkt_need_ack, addr1_low32=0, addr2_low32=0, addr3_low32=0, queue_idx=2, dma_reg, cts_reg;//, openofdm_state_history; 651 u16 addr1_high16=0, addr2_high16=0, addr3_high16=0, sc=0, cts_duration=0, cts_rate_hw_value = 0, cts_rate_signal_value=0, sifs, ack_duration=0, traffic_pkt_duration; 652 u8 fc_flag,fc_type,fc_subtype,retry_limit_raw,*dma_buf,retry_limit_hw_value,rc_flags; 653 bool use_rts_cts, use_cts_protect, use_ht_rate=false, use_short_gi, addr_flag, cts_use_traffic_rate=false, force_use_cts_protect=false; 654 __le16 frame_control,duration_id; 655 u32 dma_fifo_no_room_flag, hw_queue_len; 656 enum dma_status status; 657 // static bool led_status=0; 658 // struct gpio_led_data *led_dat = cdev_to_gpio_led_data(priv->led[3]); 659 660 // if ( (priv->phy_tx_sn&7) ==0 ) { 661 // openofdm_state_history = openofdm_rx_api->OPENOFDM_RX_REG_STATE_HISTORY_read(); 662 // if (openofdm_state_history!=openofdm_state_history_old){ 663 // led_status = (~led_status); 664 // openofdm_state_history_old = openofdm_state_history; 665 // gpiod_set_value(led_dat->gpiod, led_status); 666 // } 667 // } 668 669 if (test_mode==1){ 670 printk("%s openwifi_tx: WARNING test_mode==1\n", sdr_compatible_str); 671 goto openwifi_tx_early_out; 672 } 673 674 if (skb->data_len>0) {// more data are not in linear data area skb->data 675 printk("%s openwifi_tx: WARNING skb->data_len>0\n", sdr_compatible_str); 676 goto openwifi_tx_early_out; 677 } 678 679 len_mac_pdu = skb->len; 680 len_phy_packet = len_mac_pdu + LEN_PHY_HEADER; 681 num_dma_symbol = (len_phy_packet>>TX_INTF_NUM_BYTE_PER_DMA_SYMBOL_IN_BITS) + ((len_phy_packet&(TX_INTF_NUM_BYTE_PER_DMA_SYMBOL-1))!=0); 682 683 // get Linux priority/queue setting info and target mac address 684 prio = skb_get_queue_mapping(skb); 685 addr1_low32 = *((u32*)(hdr->addr1+2)); 686 ring = &(priv->tx_ring[prio]); 687 688 // -------------- DO your idea here! Map Linux/SW "prio" to hardware "queue_idx" ----------- 689 if (priv->slice_idx == 0xFFFFFFFF) {// use Linux default prio setting, if there isn't any slice config 690 queue_idx = prio; 691 } else {// customized prio to queue_idx mapping 692 //if (fc_type==2 && fc_subtype==0 && (!addr_flag)) { // for unicast data packet only 693 // check current packet belonging to which slice/hw-queue 694 for (i=0; i<MAX_NUM_HW_QUEUE; i++) { 695 if ( priv->dest_mac_addr_queue_map[i] == addr1_low32 ) { 696 break; 697 } 698 } 699 //} 700 queue_idx = (i>=MAX_NUM_HW_QUEUE?2:i); // if no address is hit, use FPGA queue 2. becuase the queue 2 is the longest. 701 } 702 // -------------------- end of Map Linux/SW "prio" to hardware "queue_idx" ------------------ 703 704 // check whether the packet is bigger than DMA buffer size 705 num_dma_byte = (num_dma_symbol<<TX_INTF_NUM_BYTE_PER_DMA_SYMBOL_IN_BITS); 706 if (num_dma_byte > TX_BD_BUF_SIZE) { 707 // dev_err(priv->tx_chan->device->dev, "sdr,sdr openwifi_tx: WARNING num_dma_byte > TX_BD_BUF_SIZE\n"); 708 printk("%s openwifi_tx: WARNING sn %d num_dma_byte > TX_BD_BUF_SIZE\n", sdr_compatible_str, ring->bd_wr_idx); 709 goto openwifi_tx_early_out; 710 } 711 num_byte_pad = num_dma_byte-len_phy_packet; 712 713 // get other info from packet header 714 addr1_high16 = *((u16*)(hdr->addr1)); 715 if (len_mac_pdu>=20) { 716 addr2_low32 = *((u32*)(hdr->addr2+2)); 717 addr2_high16 = *((u16*)(hdr->addr2)); 718 } 719 if (len_mac_pdu>=26) { 720 addr3_low32 = *((u32*)(hdr->addr3+2)); 721 addr3_high16 = *((u16*)(hdr->addr3)); 722 } 723 724 duration_id = hdr->duration_id; 725 frame_control=hdr->frame_control; 726 ack_flag = (info->flags&IEEE80211_TX_CTL_NO_ACK); 727 fc_type = ((frame_control)>>2)&3; 728 fc_subtype = ((frame_control)>>4)&0xf; 729 fc_flag = ( fc_type==2 || fc_type==0 || (fc_type==1 && (fc_subtype==8 || fc_subtype==9 || fc_subtype==10) ) ); 730 //if it is broadcasting or multicasting addr 731 addr_flag = ( (addr1_low32==0 && addr1_high16==0) || 732 (addr1_low32==0xFFFFFFFF && addr1_high16==0xFFFF) || 733 (addr1_high16==0x3333) || 734 (addr1_high16==0x0001 && hdr->addr1[2]==0x5E) ); 735 if ( fc_flag && ( !addr_flag ) && (!ack_flag) ) { // unicast data frame 736 pkt_need_ack = 1; //FPGA need to wait ACK after this pkt sent 737 } else { 738 pkt_need_ack = 0; 739 } 740 741 // get Linux rate (MCS) setting 742 rate_hw_value = ieee80211_get_tx_rate(dev, info)->hw_value; 743 //rate_hw_value = 10; //4:6M, 5:9M, 6:12M, 7:18M, 8:24M, 9:36M, 10:48M, 11:54M 744 if (priv->drv_tx_reg_val[DRV_TX_REG_IDX_RATE]>0 && fc_type==2 && (!addr_flag)) //rate override command 745 rate_hw_value = priv->drv_tx_reg_val[DRV_TX_REG_IDX_RATE]; 746 747 retry_limit_raw = info->control.rates[0].count; 748 749 rc_flags = info->control.rates[0].flags; 750 use_rts_cts = ((rc_flags&IEEE80211_TX_RC_USE_RTS_CTS)!=0); 751 use_cts_protect = ((rc_flags&IEEE80211_TX_RC_USE_CTS_PROTECT)!=0); 752 use_ht_rate = ((rc_flags&IEEE80211_TX_RC_MCS)!=0); 753 use_short_gi = ((rc_flags&IEEE80211_TX_RC_SHORT_GI)!=0); 754 755 if (use_rts_cts) 756 printk("%s openwifi_tx: WARNING sn %d use_rts_cts is not supported!\n", sdr_compatible_str, ring->bd_wr_idx); 757 758 if (use_cts_protect) { 759 cts_rate_hw_value = ieee80211_get_rts_cts_rate(dev, info)->hw_value; 760 cts_duration = le16_to_cpu(ieee80211_ctstoself_duration(dev,info->control.vif,len_mac_pdu,info)); 761 } else if (force_use_cts_protect) { // could override mac80211 setting here. 762 cts_rate_hw_value = 4; //wifi_mcs_table_11b_force_up[] translate it to 1011(6M) 763 sifs = (priv->actual_rx_lo<2500?10:16); 764 if (pkt_need_ack) 765 ack_duration = 44;//assume the ack we wait use 6Mbps: 4*ceil((22+14*8)/24) + 20(preamble+SIGNAL) 766 traffic_pkt_duration = 20 + 4*(((22+len_mac_pdu*8)/wifi_n_dbps_table[rate_hw_value])+1); 767 cts_duration = traffic_pkt_duration + sifs + pkt_need_ack*(sifs+ack_duration); 768 } 769 770 // this is 11b stuff 771 // if (info->flags&IEEE80211_TX_RC_USE_SHORT_PREAMBLE) 772 // printk("%s openwifi_tx: WARNING IEEE80211_TX_RC_USE_SHORT_PREAMBLE\n", sdr_compatible_str); 773 774 if (len_mac_pdu>=28) { 775 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { 776 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) 777 priv->seqno += 0x10; 778 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); 779 hdr->seq_ctrl |= cpu_to_le16(priv->seqno); 780 } 781 sc = hdr->seq_ctrl; 782 } 783 784 if ( (!addr_flag) && (priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG]&2) ) 785 printk("%s openwifi_tx: %4dbytes ht%d %3dM FC%04x DI%04x addr1/2/3:%04x%08x/%04x%08x/%04x%08x SC%04x flag%08x retr%d ack%d prio%d q%d wr%d rd%d\n", sdr_compatible_str, 786 len_mac_pdu, (use_ht_rate == false ? 0 : 1), (use_ht_rate == false ? wifi_rate_all[rate_hw_value] : wifi_rate_all[rate_hw_value + 12]),frame_control,duration_id, 787 reverse16(addr1_high16), reverse32(addr1_low32), reverse16(addr2_high16), reverse32(addr2_low32), reverse16(addr3_high16), reverse32(addr3_low32), 788 sc, info->flags, retry_limit_raw, pkt_need_ack, prio, queue_idx, 789 // use_rts_cts,use_cts_protect|force_use_cts_protect,wifi_rate_all[cts_rate_hw_value],cts_duration, 790 ring->bd_wr_idx,ring->bd_rd_idx); 791 792 // printk("%s openwifi_tx: rate&try: %d %d %03x; %d %d %03x; %d %d %03x; %d %d %03x\n", sdr_compatible_str, 793 // info->status.rates[0].idx,info->status.rates[0].count,info->status.rates[0].flags, 794 // info->status.rates[1].idx,info->status.rates[1].count,info->status.rates[1].flags, 795 // info->status.rates[2].idx,info->status.rates[2].count,info->status.rates[2].flags, 796 // info->status.rates[3].idx,info->status.rates[3].count,info->status.rates[3].flags); 797 798 // -----------end of preprocess some info from header and skb---------------- 799 800 // /* HW will perform RTS-CTS when only RTS flags is set. 801 // * HW will perform CTS-to-self when both RTS and CTS flags are set. 802 // * RTS rate and RTS duration will be used also for CTS-to-self. 803 // */ 804 // if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) { 805 // tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; 806 // rts_duration = ieee80211_rts_duration(dev, priv->vif[0], // assume all vif have the same config 807 // len_mac_pdu, info); 808 // printk("%s openwifi_tx: rc_flags & IEEE80211_TX_RC_USE_RTS_CTS\n", sdr_compatible_str); 809 // } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { 810 // tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; 811 // rts_duration = ieee80211_ctstoself_duration(dev, priv->vif[0], // assume all vif have the same config 812 // len_mac_pdu, info); 813 // printk("%s openwifi_tx: rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT\n", sdr_compatible_str); 814 // } 815 816 // when skb does not have enough headroom, skb_push will cause kernel panic. headroom needs to be extended if necessary 817 if (skb_headroom(skb)<LEN_PHY_HEADER) { 818 struct sk_buff *skb_new; // in case original skb headroom is not enough to host phy header needed by FPGA IP core 819 printk("%s openwifi_tx: WARNING sn %d skb_headroom(skb)<LEN_PHY_HEADER\n", sdr_compatible_str, ring->bd_wr_idx); 820 if ((skb_new = skb_realloc_headroom(skb, LEN_PHY_HEADER)) == NULL) { 821 printk("%s openwifi_tx: WARNING sn %d skb_realloc_headroom failed!\n", sdr_compatible_str, ring->bd_wr_idx); 822 goto openwifi_tx_early_out; 823 } 824 if (skb->sk != NULL) 825 skb_set_owner_w(skb_new, skb->sk); 826 dev_kfree_skb(skb); 827 skb = skb_new; 828 } 829 830 skb_push( skb, LEN_PHY_HEADER ); 831 rate_signal_value = calc_phy_header(rate_hw_value, use_ht_rate, use_short_gi, len_mac_pdu+LEN_PHY_CRC, skb->data); //fill the phy header 832 833 834 //make sure dma length is integer times of DDC_NUM_BYTE_PER_DMA_SYMBOL 835 if (skb_tailroom(skb)<num_byte_pad) { 836 printk("%s openwifi_tx: WARNING sn %d skb_tailroom(skb)<num_byte_pad!\n", sdr_compatible_str, ring->bd_wr_idx); 837 // skb_pull(skb, LEN_PHY_HEADER); 838 goto openwifi_tx_early_out; 839 } 840 skb_put( skb, num_byte_pad ); 841 842 retry_limit_hw_value = (retry_limit_raw - 1)&0xF; 843 dma_buf = skb->data; 844 845 cts_rate_signal_value = wifi_mcs_table_11b_force_up[cts_rate_hw_value]; 846 cts_reg = (((use_cts_protect|force_use_cts_protect)<<31)|(cts_use_traffic_rate<<30)|(cts_duration<<8)|(cts_rate_signal_value<<4)|rate_signal_value); 847 dma_reg = ( (( ((prio<<(NUM_BIT_MAX_NUM_HW_QUEUE+NUM_BIT_MAX_PHY_TX_SN))|(ring->bd_wr_idx<<NUM_BIT_MAX_NUM_HW_QUEUE)|queue_idx) )<<18)|(retry_limit_hw_value<<14)|(pkt_need_ack<<13)|num_dma_symbol ); 848 849 /* We must be sure that tx_flags is written last because the HW 850 * looks at it to check if the rest of data is valid or not 851 */ 852 //wmb(); 853 // entry->flags = cpu_to_le32(tx_flags); 854 /* We must be sure this has been written before followings HW 855 * register write, because this write will made the HW attempts 856 * to DMA the just-written data 857 */ 858 //wmb(); 859 860 spin_lock_irqsave(&priv->lock, flags); // from now on, we'd better avoid interrupt because ring->stop_flag is shared with interrupt 861 862 // -------------check whether FPGA dma fifo and queue (queue_idx) has enough room------------- 863 dma_fifo_no_room_flag = tx_intf_api->TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read(); 864 hw_queue_len = tx_intf_api->TX_INTF_REG_QUEUE_FIFO_DATA_COUNT_read(); 865 if ( ((dma_fifo_no_room_flag>>queue_idx)&1) || ((NUM_TX_BD-((hw_queue_len>>(queue_idx*8))&0xFF))<RING_ROOM_THRESHOLD) || ring->stop_flag==1 ) { 866 ieee80211_stop_queue(dev, prio); // here we should stop those prio related to the queue idx flag set in TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read 867 printk("%s openwifi_tx: WARNING ieee80211_stop_queue prio %d queue %d no room flag %x hw queue len %08x request %d wr %d rd %d\n", sdr_compatible_str, 868 prio, queue_idx, dma_fifo_no_room_flag, hw_queue_len, num_dma_symbol, ring->bd_wr_idx, ring->bd_rd_idx); 869 ring->stop_flag = 1; 870 goto openwifi_tx_early_out_after_lock; 871 } 872 // --------end of check whether FPGA fifo (queue_idx) has enough room------------ 873 874 status = dma_async_is_tx_complete(priv->tx_chan, priv->tx_cookie, NULL, NULL); 875 if (status!=DMA_COMPLETE) { 876 printk("%s openwifi_tx: WARNING status!=DMA_COMPLETE\n", sdr_compatible_str); 877 goto openwifi_tx_early_out_after_lock; 878 } 879 880 if ( (*(u32*)(&(skb->data[4]))) || ((*(u32*)(&(skb->data[12])))&0xFFFF0000) ) { 881 printk("%s openwifi_tx: WARNING 1 %d %08x %08x %08x %08x\n", sdr_compatible_str, num_byte_pad, *(u32*)(&(skb->data[12])), *(u32*)(&(skb->data[8])), *(u32*)(&(skb->data[4])), *(u32*)(&(skb->data[0]))); 882 goto openwifi_tx_early_out_after_lock; 883 } 884 885 //-------------------------fire skb DMA to hardware---------------------------------- 886 dma_mapping_addr = dma_map_single(priv->tx_chan->device->dev, dma_buf, 887 num_dma_byte, DMA_MEM_TO_DEV); 888 889 if (dma_mapping_error(priv->tx_chan->device->dev,dma_mapping_addr)) { 890 // dev_err(priv->tx_chan->device->dev, "sdr,sdr openwifi_tx: WARNING TX DMA mapping error\n"); 891 printk("%s openwifi_tx: WARNING sn %d TX DMA mapping error\n", sdr_compatible_str, ring->bd_wr_idx); 892 goto openwifi_tx_early_out_after_lock; 893 } 894 895 sg_init_table(&(priv->tx_sg), 1); // only need to be initialized once in openwifi_start 896 sg_dma_address( &(priv->tx_sg) ) = dma_mapping_addr; 897 sg_dma_len( &(priv->tx_sg) ) = num_dma_byte; 898 899 tx_intf_api->TX_INTF_REG_CTS_TOSELF_CONFIG_write(cts_reg); 900 tx_intf_api->TX_INTF_REG_NUM_DMA_SYMBOL_TO_PL_write(dma_reg); 901 priv->txd = priv->tx_chan->device->device_prep_slave_sg(priv->tx_chan, &(priv->tx_sg),1,DMA_MEM_TO_DEV, DMA_CTRL_ACK | DMA_PREP_INTERRUPT, NULL); 902 if (!(priv->txd)) { 903 printk("%s openwifi_tx: WARNING sn %d device_prep_slave_sg %p\n", sdr_compatible_str, ring->bd_wr_idx, (void*)(priv->txd)); 904 goto openwifi_tx_after_dma_mapping; 905 } 906 907 priv->tx_cookie = priv->txd->tx_submit(priv->txd); 908 909 if (dma_submit_error(priv->tx_cookie)) { 910 printk("%s openwifi_tx: WARNING sn %d dma_submit_error(tx_cookie) %d\n", sdr_compatible_str, ring->bd_wr_idx, (u32)(priv->tx_cookie)); 911 goto openwifi_tx_after_dma_mapping; 912 } 913 914 // seems everything ok. let's mark this pkt in bd descriptor ring 915 ring->bds[ring->bd_wr_idx].skb_linked = skb; 916 ring->bds[ring->bd_wr_idx].dma_mapping_addr = dma_mapping_addr; 917 918 ring->bd_wr_idx = ((ring->bd_wr_idx+1)&(NUM_TX_BD-1)); 919 920 dma_async_issue_pending(priv->tx_chan); 921 922 if ( (*(u32*)(&(skb->data[4]))) || ((*(u32*)(&(skb->data[12])))&0xFFFF0000) ) 923 printk("%s openwifi_tx: WARNING 2 %08x %08x %08x %08x\n", sdr_compatible_str, *(u32*)(&(skb->data[12])), *(u32*)(&(skb->data[8])), *(u32*)(&(skb->data[4])), *(u32*)(&(skb->data[0]))); 924 925 spin_unlock_irqrestore(&priv->lock, flags); 926 927 return; 928 929 openwifi_tx_after_dma_mapping: 930 dma_unmap_single(priv->tx_chan->device->dev, dma_mapping_addr, num_dma_byte, DMA_MEM_TO_DEV); 931 932 openwifi_tx_early_out_after_lock: 933 // skb_pull(skb, LEN_PHY_HEADER); 934 dev_kfree_skb(skb); 935 spin_unlock_irqrestore(&priv->lock, flags); 936 // printk("%s openwifi_tx: WARNING openwifi_tx_after_dma_mapping phy_tx_sn %d queue %d\n", sdr_compatible_str,priv->phy_tx_sn,queue_idx); 937 return; 938 939 openwifi_tx_early_out: 940 dev_kfree_skb(skb); 941 // printk("%s openwifi_tx: WARNING openwifi_tx_early_out phy_tx_sn %d queue %d\n", sdr_compatible_str,priv->phy_tx_sn,queue_idx); 942 } 943 944 static int openwifi_start(struct ieee80211_hw *dev) 945 { 946 struct openwifi_priv *priv = dev->priv; 947 int ret, i, rssi_half_db_offset, agc_gain_delay;//rssi_half_db_th, 948 u32 reg; 949 950 for (i=0; i<MAX_NUM_VIF; i++) { 951 priv->vif[i] = NULL; 952 } 953 954 memset(priv->drv_tx_reg_val, 0, sizeof(priv->drv_tx_reg_val)); 955 memset(priv->drv_rx_reg_val, 0, sizeof(priv->drv_rx_reg_val)); 956 memset(priv->drv_xpu_reg_val, 0, sizeof(priv->drv_xpu_reg_val)); 957 priv->drv_xpu_reg_val[DRV_XPU_REG_IDX_GIT_REV] = GIT_REV; 958 959 //turn on radio 960 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) { 961 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, false, true, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 962 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 963 } else { 964 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, true, false, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 965 reg = ad9361_get_tx_atten(priv->ad9361_phy, 1); 966 } 967 if (reg == AD9361_RADIO_ON_TX_ATT) { 968 priv->rfkill_off = 1;// 0 off, 1 on 969 printk("%s openwifi_start: rfkill radio on\n",sdr_compatible_str); 970 } 971 else 972 printk("%s openwifi_start: WARNING rfkill radio on failed. tx att read %d require %d\n",sdr_compatible_str, reg, AD9361_RADIO_ON_TX_ATT); 973 974 if (priv->rx_intf_cfg == RX_INTF_BW_20MHZ_AT_0MHZ_ANT0) 975 priv->ctrl_out.index=0x16; 976 else 977 priv->ctrl_out.index=0x17; 978 979 ret = ad9361_ctrl_outs_setup(priv->ad9361_phy, &(priv->ctrl_out)); 980 if (ret < 0) { 981 printk("%s openwifi_start: WARNING ad9361_ctrl_outs_setup %d\n",sdr_compatible_str, ret); 982 } else { 983 printk("%s openwifi_start: ad9361_ctrl_outs_setup en_mask 0x%02x index 0x%02x\n",sdr_compatible_str, priv->ctrl_out.en_mask, priv->ctrl_out.index); 984 } 985 986 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 987 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 988 989 rx_intf_api->hw_init(priv->rx_intf_cfg,8,8); 990 tx_intf_api->hw_init(priv->tx_intf_cfg,8,8,priv->fpga_type); 991 openofdm_tx_api->hw_init(priv->openofdm_tx_cfg); 992 openofdm_rx_api->hw_init(priv->openofdm_rx_cfg); 993 xpu_api->hw_init(priv->xpu_cfg); 994 995 agc_gain_delay = 50; //samples 996 rssi_half_db_offset = 150; // to be consistent 997 xpu_api->XPU_REG_RSSI_DB_CFG_write(0x80000000|((rssi_half_db_offset<<16)|agc_gain_delay) ); 998 xpu_api->XPU_REG_RSSI_DB_CFG_write((~0x80000000)&((rssi_half_db_offset<<16)|agc_gain_delay) ); 999 1000 openofdm_rx_api->OPENOFDM_RX_REG_POWER_THRES_write(0); 1001 // rssi_half_db_th = 87<<1; // -62dBm // will settup in runtime in _rf_set_channel 1002 // xpu_api->XPU_REG_LBT_TH_write(rssi_half_db_th); // set IQ rssi th step .5dB to xxx and enable it 1003 reg=xpu_api->XPU_REG_LBT_TH_read(); 1004 xpu_api->XPU_REG_LBT_TH_write((reg & 0xFF00FFFF) | (75 << 16) ); // bit 23:16 of LBT TH reg is set to control the duration to force ch_idle after decoding a packet due to imperfection of agc and signals 1005 // xpu_api->XPU_REG_CSMA_CFG_write(3); // cw_min -- already set in xpu.c 1006 1007 //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((40)<<16)|0 );//high 16bit 5GHz; low 16 bit 2.4GHz (Attention, current tx core has around 1.19us starting delay that makes the ack fall behind 10us SIFS in 2.4GHz! Need to improve TX in 2.4GHz!) 1008 //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((51)<<16)|0 );//now our tx send out I/Q immediately 1009 xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((51+23)<<16)|(0+23) );//we have more time when we use FIR in AD9361 1010 1011 xpu_api->XPU_REG_RECV_ACK_COUNT_TOP0_write( (1<<31) | (((45+2+2)*10 + 15)<<16) | 10 );//2.4GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M) 1012 xpu_api->XPU_REG_RECV_ACK_COUNT_TOP1_write( (1<<31) | (((51+2+2)*10 + 15)<<16) | 10 );//5GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M) 1013 1014 tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write( ((16*10)<<16)|(10*10) );//high 16bit 5GHz; low 16 bit 2.4GHz. counter speed 10MHz is assumed 1015 1016 // //xpu_api->XPU_REG_BB_RF_DELAY_write(51); // fine tuned value at 0.005us. old: dac-->ant port: 0.6us, 57 taps fir at 40MHz: 1.425us; round trip: 2*(0.6+1.425)=4.05us; 4.05*10=41 1017 // xpu_api->XPU_REG_BB_RF_DELAY_write(47);//add .5us for slightly longer fir -- already in xpu.c 1018 xpu_api->XPU_REG_MAC_ADDR_write(priv->mac_addr); 1019 1020 // setup time schedule of 4 slices 1021 // slice 0 1022 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write(50000-1); // total 50ms 1023 xpu_api->XPU_REG_SLICE_COUNT_START_write(0); //start 0ms 1024 xpu_api->XPU_REG_SLICE_COUNT_END_write(50000-1); //end 50ms 1025 1026 // slice 1 1027 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((1<<20)|(50000-1)); // total 50ms 1028 xpu_api->XPU_REG_SLICE_COUNT_START_write((1<<20)|(0)); //start 0ms 1029 //xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(20000-1)); //end 20ms 1030 xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(50000-1)); //end 20ms 1031 1032 // slice 2 1033 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((2<<20)|(50000-1)); // total 50ms 1034 //xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(20000)); //start 20ms 1035 xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(0)); //start 20ms 1036 //xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(40000-1)); //end 20ms 1037 xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(50000-1)); //end 20ms 1038 1039 // slice 3 1040 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((3<<20)|(50000-1)); // total 50ms 1041 //xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(40000)); //start 40ms 1042 xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(0)); //start 40ms 1043 //xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms 1044 xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms 1045 1046 // all slice sync rest 1047 xpu_api->XPU_REG_MULTI_RST_write(1<<7); //bit7 reset the counter for all queues at the same time 1048 xpu_api->XPU_REG_MULTI_RST_write(0<<7); 1049 1050 //xpu_api->XPU_REG_MAC_ADDR_HIGH_write( (*( (u16*)(priv->mac_addr + 4) )) ); 1051 printk("%s openwifi_start: rx_intf_cfg %d openofdm_rx_cfg %d tx_intf_cfg %d openofdm_tx_cfg %d\n",sdr_compatible_str, priv->rx_intf_cfg, priv->openofdm_rx_cfg, priv->tx_intf_cfg, priv->openofdm_tx_cfg); 1052 printk("%s openwifi_start: rx_freq_offset_to_lo_MHz %d tx_freq_offset_to_lo_MHz %d\n",sdr_compatible_str, priv->rx_freq_offset_to_lo_MHz, priv->tx_freq_offset_to_lo_MHz); 1053 1054 tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x30004); //disable tx interrupt 1055 rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x100); // disable rx interrupt by interrupt test mode 1056 rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(1); // hold M AXIS in reset status 1057 1058 if (test_mode==1) { 1059 printk("%s openwifi_start: test_mode==1\n",sdr_compatible_str); 1060 goto normal_out; 1061 } 1062 1063 priv->rx_chan = dma_request_slave_channel(&(priv->pdev->dev), "rx_dma_s2mm"); 1064 if (IS_ERR(priv->rx_chan)) { 1065 ret = PTR_ERR(priv->rx_chan); 1066 pr_err("%s openwifi_start: No Rx channel %d\n",sdr_compatible_str,ret); 1067 goto err_dma; 1068 } 1069 1070 priv->tx_chan = dma_request_slave_channel(&(priv->pdev->dev), "tx_dma_mm2s"); 1071 if (IS_ERR(priv->tx_chan)) { 1072 ret = PTR_ERR(priv->tx_chan); 1073 pr_err("%s openwifi_start: No Tx channel %d\n",sdr_compatible_str,ret); 1074 goto err_dma; 1075 } 1076 printk("%s openwifi_start: DMA channel setup successfully.\n",sdr_compatible_str); 1077 1078 ret = openwifi_init_rx_ring(priv); 1079 if (ret) { 1080 printk("%s openwifi_start: openwifi_init_rx_ring ret %d\n", sdr_compatible_str,ret); 1081 goto err_free_rings; 1082 } 1083 1084 priv->seqno=0; 1085 for (i=0; i<MAX_NUM_SW_QUEUE; i++) { 1086 if ((ret = openwifi_init_tx_ring(priv, i))) { 1087 printk("%s openwifi_start: openwifi_init_tx_ring %d ret %d\n", sdr_compatible_str, i, ret); 1088 goto err_free_rings; 1089 } 1090 } 1091 1092 if ( (ret = rx_dma_setup(dev)) ) { 1093 printk("%s openwifi_start: rx_dma_setup ret %d\n", sdr_compatible_str,ret); 1094 goto err_free_rings; 1095 } 1096 1097 priv->irq_rx = irq_of_parse_and_map(priv->pdev->dev.of_node, 1); 1098 ret = request_irq(priv->irq_rx, openwifi_rx_interrupt, 1099 IRQF_SHARED, "sdr,rx_pkt_intr", dev); 1100 if (ret) { 1101 wiphy_err(dev->wiphy, "openwifi_start:failed to register IRQ handler openwifi_rx_interrupt\n"); 1102 goto err_free_rings; 1103 } else { 1104 printk("%s openwifi_start: irq_rx %d\n", sdr_compatible_str, priv->irq_rx); 1105 } 1106 1107 priv->irq_tx = irq_of_parse_and_map(priv->pdev->dev.of_node, 3); 1108 ret = request_irq(priv->irq_tx, openwifi_tx_interrupt, 1109 IRQF_SHARED, "sdr,tx_itrpt1", dev); 1110 if (ret) { 1111 wiphy_err(dev->wiphy, "openwifi_start: failed to register IRQ handler openwifi_tx_interrupt\n"); 1112 goto err_free_rings; 1113 } else { 1114 printk("%s openwifi_start: irq_tx %d\n", sdr_compatible_str, priv->irq_tx); 1115 } 1116 1117 rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x000); // enable rx interrupt get normal fcs valid pass through ddc to ARM 1118 tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x4); //enable tx interrupt 1119 rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(0); // release M AXIS 1120 xpu_api->XPU_REG_TSF_LOAD_VAL_write(0,0); // reset tsf timer 1121 1122 //ieee80211_wake_queue(dev, 0); 1123 1124 normal_out: 1125 printk("%s openwifi_start: normal end\n", sdr_compatible_str); 1126 return 0; 1127 1128 err_free_rings: 1129 openwifi_free_rx_ring(priv); 1130 for (i=0; i<MAX_NUM_SW_QUEUE; i++) 1131 openwifi_free_tx_ring(priv, i); 1132 1133 err_dma: 1134 ret = -1; 1135 printk("%s openwifi_start: abnormal end ret %d\n", sdr_compatible_str, ret); 1136 return ret; 1137 } 1138 1139 static void openwifi_stop(struct ieee80211_hw *dev) 1140 { 1141 struct openwifi_priv *priv = dev->priv; 1142 u32 reg, reg1; 1143 int i; 1144 1145 if (test_mode==1){ 1146 pr_info("%s openwifi_stop: test_mode==1\n", sdr_compatible_str); 1147 goto normal_out; 1148 } 1149 1150 //turn off radio 1151 #if 1 1152 ad9361_tx_mute(priv->ad9361_phy, 1); 1153 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 1154 reg1 = ad9361_get_tx_atten(priv->ad9361_phy, 1); 1155 if (reg == AD9361_RADIO_OFF_TX_ATT && reg1 == AD9361_RADIO_OFF_TX_ATT ) { 1156 priv->rfkill_off = 0;// 0 off, 1 on 1157 printk("%s openwifi_stop: rfkill radio off\n",sdr_compatible_str); 1158 } 1159 else 1160 printk("%s openwifi_stop: WARNING rfkill radio off failed. tx att read %d %d require %d\n",sdr_compatible_str, reg, reg1, AD9361_RADIO_OFF_TX_ATT); 1161 #endif 1162 1163 //ieee80211_stop_queue(dev, 0); 1164 1165 tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x30004); //disable tx interrupt 1166 rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x100); // disable fcs_valid by interrupt test mode 1167 rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(1); // hold M AXIS in reset status 1168 1169 for (i=0; i<MAX_NUM_VIF; i++) { 1170 priv->vif[i] = NULL; 1171 } 1172 1173 openwifi_free_rx_ring(priv); 1174 for (i=0; i<MAX_NUM_SW_QUEUE; i++) 1175 openwifi_free_tx_ring(priv, i); 1176 1177 pr_info("%s openwifi_stop: dropped channel %s\n", sdr_compatible_str, dma_chan_name(priv->rx_chan)); 1178 dmaengine_terminate_all(priv->rx_chan); 1179 dma_release_channel(priv->rx_chan); 1180 pr_info("%s openwifi_stop: dropped channel %s\n", sdr_compatible_str, dma_chan_name(priv->tx_chan)); 1181 dmaengine_terminate_all(priv->tx_chan); 1182 dma_release_channel(priv->tx_chan); 1183 1184 //priv->rf->stop(dev); 1185 1186 free_irq(priv->irq_rx, dev); 1187 free_irq(priv->irq_tx, dev); 1188 1189 normal_out: 1190 printk("%s openwifi_stop\n", sdr_compatible_str); 1191 } 1192 1193 static u64 openwifi_get_tsf(struct ieee80211_hw *dev, 1194 struct ieee80211_vif *vif) 1195 { 1196 u32 tsft_low, tsft_high; 1197 1198 tsft_low = xpu_api->XPU_REG_TSF_RUNTIME_VAL_LOW_read(); 1199 tsft_high = xpu_api->XPU_REG_TSF_RUNTIME_VAL_HIGH_read(); 1200 //printk("%s openwifi_get_tsf: %08x%08x\n", sdr_compatible_str,tsft_high,tsft_low); 1201 return( ( (u64)tsft_low ) | ( ((u64)tsft_high)<<32 ) ); 1202 } 1203 1204 static void openwifi_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u64 tsf) 1205 { 1206 u32 tsft_high = ((tsf >> 32)&0xffffffff); 1207 u32 tsft_low = (tsf&0xffffffff); 1208 xpu_api->XPU_REG_TSF_LOAD_VAL_write(tsft_high,tsft_low); 1209 printk("%s openwifi_set_tsf: %08x%08x\n", sdr_compatible_str,tsft_high,tsft_low); 1210 } 1211 1212 static void openwifi_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 1213 { 1214 xpu_api->XPU_REG_TSF_LOAD_VAL_write(0,0); 1215 printk("%s openwifi_reset_tsf\n", sdr_compatible_str); 1216 } 1217 1218 static int openwifi_set_rts_threshold(struct ieee80211_hw *hw, u32 value) 1219 { 1220 printk("%s openwifi_set_rts_threshold WARNING value %d\n", sdr_compatible_str,value); 1221 return(0); 1222 } 1223 1224 static void openwifi_beacon_work(struct work_struct *work) 1225 { 1226 struct openwifi_vif *vif_priv = 1227 container_of(work, struct openwifi_vif, beacon_work.work); 1228 struct ieee80211_vif *vif = 1229 container_of((void *)vif_priv, struct ieee80211_vif, drv_priv); 1230 struct ieee80211_hw *dev = vif_priv->dev; 1231 struct ieee80211_mgmt *mgmt; 1232 struct sk_buff *skb; 1233 1234 /* don't overflow the tx ring */ 1235 if (ieee80211_queue_stopped(dev, 0)) 1236 goto resched; 1237 1238 /* grab a fresh beacon */ 1239 skb = ieee80211_beacon_get(dev, vif); 1240 if (!skb) 1241 goto resched; 1242 1243 /* 1244 * update beacon timestamp w/ TSF value 1245 * TODO: make hardware update beacon timestamp 1246 */ 1247 mgmt = (struct ieee80211_mgmt *)skb->data; 1248 mgmt->u.beacon.timestamp = cpu_to_le64(openwifi_get_tsf(dev, vif)); 1249 1250 /* TODO: use actual beacon queue */ 1251 skb_set_queue_mapping(skb, 0); 1252 openwifi_tx(dev, NULL, skb); 1253 1254 resched: 1255 /* 1256 * schedule next beacon 1257 * TODO: use hardware support for beacon timing 1258 */ 1259 schedule_delayed_work(&vif_priv->beacon_work, 1260 usecs_to_jiffies(1024 * vif->bss_conf.beacon_int)); 1261 } 1262 1263 static int openwifi_add_interface(struct ieee80211_hw *dev, 1264 struct ieee80211_vif *vif) 1265 { 1266 int i; 1267 struct openwifi_priv *priv = dev->priv; 1268 struct openwifi_vif *vif_priv; 1269 1270 switch (vif->type) { 1271 case NL80211_IFTYPE_AP: 1272 case NL80211_IFTYPE_STATION: 1273 case NL80211_IFTYPE_ADHOC: 1274 case NL80211_IFTYPE_MONITOR: 1275 case NL80211_IFTYPE_MESH_POINT: 1276 break; 1277 default: 1278 return -EOPNOTSUPP; 1279 } 1280 // let's support more than 1 interface 1281 for (i=0; i<MAX_NUM_VIF; i++) { 1282 if (priv->vif[i] == NULL) 1283 break; 1284 } 1285 1286 printk("%s openwifi_add_interface start. vif for loop result %d\n", sdr_compatible_str, i); 1287 1288 if (i==MAX_NUM_VIF) 1289 return -EBUSY; 1290 1291 priv->vif[i] = vif; 1292 1293 /* Initialize driver private area */ 1294 vif_priv = (struct openwifi_vif *)&vif->drv_priv; 1295 vif_priv->idx = i; 1296 1297 vif_priv->dev = dev; 1298 INIT_DELAYED_WORK(&vif_priv->beacon_work, openwifi_beacon_work); 1299 vif_priv->enable_beacon = false; 1300 1301 printk("%s openwifi_add_interface end with vif idx %d\n", sdr_compatible_str,vif_priv->idx); 1302 1303 return 0; 1304 } 1305 1306 static void openwifi_remove_interface(struct ieee80211_hw *dev, 1307 struct ieee80211_vif *vif) 1308 { 1309 struct openwifi_vif *vif_priv; 1310 struct openwifi_priv *priv = dev->priv; 1311 1312 vif_priv = (struct openwifi_vif *)&vif->drv_priv; 1313 priv->vif[vif_priv->idx] = NULL; 1314 printk("%s openwifi_remove_interface vif idx %d\n", sdr_compatible_str, vif_priv->idx); 1315 } 1316 1317 static int openwifi_config(struct ieee80211_hw *dev, u32 changed) 1318 { 1319 struct openwifi_priv *priv = dev->priv; 1320 struct ieee80211_conf *conf = &dev->conf; 1321 1322 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) 1323 priv->rf->set_chan(dev, conf); 1324 else 1325 printk("%s openwifi_config changed flag %08x\n", sdr_compatible_str, changed); 1326 1327 return 0; 1328 } 1329 1330 static void openwifi_bss_info_changed(struct ieee80211_hw *dev, 1331 struct ieee80211_vif *vif, 1332 struct ieee80211_bss_conf *info, 1333 u32 changed) 1334 { 1335 struct openwifi_priv *priv = dev->priv; 1336 struct openwifi_vif *vif_priv; 1337 u32 bssid_low, bssid_high; 1338 1339 vif_priv = (struct openwifi_vif *)&vif->drv_priv; 1340 1341 //be careful: we don have valid chip, so registers addresses in priv->map->BSSID[0] are not valid! should not print it! 1342 //printk("%s openwifi_bss_info_changed map bssid %02x%02x%02x%02x%02x%02x\n",sdr_compatible_str,priv->map->BSSID[0],priv->map->BSSID[1],priv->map->BSSID[2],priv->map->BSSID[3],priv->map->BSSID[4],priv->map->BSSID[5]); 1343 if (changed & BSS_CHANGED_BSSID) { 1344 printk("%s openwifi_bss_info_changed BSS_CHANGED_BSSID %02x%02x%02x%02x%02x%02x\n",sdr_compatible_str,info->bssid[0],info->bssid[1],info->bssid[2],info->bssid[3],info->bssid[4],info->bssid[5]); 1345 // write new bssid to our HW, and do not change bssid filter 1346 //u32 bssid_filter_high = xpu_api->XPU_REG_BSSID_FILTER_HIGH_read(); 1347 bssid_low = ( *( (u32*)(info->bssid) ) ); 1348 bssid_high = ( *( (u16*)(info->bssid+4) ) ); 1349 1350 //bssid_filter_high = (bssid_filter_high&0x80000000); 1351 //bssid_high = (bssid_high|bssid_filter_high); 1352 xpu_api->XPU_REG_BSSID_FILTER_LOW_write(bssid_low); 1353 xpu_api->XPU_REG_BSSID_FILTER_HIGH_write(bssid_high); 1354 } 1355 1356 if (changed & BSS_CHANGED_BEACON_INT) { 1357 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BEACON_INT %x\n",sdr_compatible_str,info->beacon_int); 1358 } 1359 1360 if (changed & BSS_CHANGED_TXPOWER) 1361 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_TXPOWER %x\n",sdr_compatible_str,info->txpower); 1362 1363 if (changed & BSS_CHANGED_ERP_CTS_PROT) 1364 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_ERP_CTS_PROT %x\n",sdr_compatible_str,info->use_cts_prot); 1365 1366 if (changed & BSS_CHANGED_BASIC_RATES) 1367 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BASIC_RATES %x\n",sdr_compatible_str,info->basic_rates); 1368 1369 if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE)) { 1370 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_ERP_SLOT %d BSS_CHANGED_ERP_PREAMBLE %d short slot %d\n",sdr_compatible_str, 1371 changed&BSS_CHANGED_ERP_SLOT,changed&BSS_CHANGED_ERP_PREAMBLE,info->use_short_slot); 1372 if (info->use_short_slot && priv->use_short_slot==false) { 1373 priv->use_short_slot=true; 1374 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 1375 } else if ((!info->use_short_slot) && priv->use_short_slot==true) { 1376 priv->use_short_slot=false; 1377 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 1378 } 1379 } 1380 1381 if (changed & BSS_CHANGED_BEACON_ENABLED) { 1382 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BEACON_ENABLED\n",sdr_compatible_str); 1383 vif_priv->enable_beacon = info->enable_beacon; 1384 } 1385 1386 if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON)) { 1387 cancel_delayed_work_sync(&vif_priv->beacon_work); 1388 if (vif_priv->enable_beacon) 1389 schedule_work(&vif_priv->beacon_work.work); 1390 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BEACON_ENABLED %d BSS_CHANGED_BEACON %d\n",sdr_compatible_str, 1391 changed&BSS_CHANGED_BEACON_ENABLED,changed&BSS_CHANGED_BEACON); 1392 } 1393 } 1394 // helper function 1395 u32 log2val(u32 val){ 1396 u32 ret_val = 0 ; 1397 while(val>1){ 1398 val = val >> 1 ; 1399 ret_val ++ ; 1400 } 1401 return ret_val ; 1402 } 1403 1404 static int openwifi_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue, 1405 const struct ieee80211_tx_queue_params *params) 1406 { 1407 printk("%s openwifi_conf_tx: WARNING [queue %d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d, aifs and txop ignored\n", 1408 sdr_compatible_str,queue,params->aifs,params->cw_min,params->cw_max,params->txop); 1409 u32 reg19_val, reg8_val, cw_min_exp, cw_max_exp; 1410 reg19_val=xpu_api->XPU_REG_CSMA_CFG_read(); 1411 reg8_val=xpu_api->XPU_REG_LBT_TH_read(); 1412 cw_min_exp = (log2val(params->cw_min + 1) & 0x0F); 1413 cw_max_exp = (log2val(params->cw_max + 1) & 0x0F); 1414 switch(queue){ 1415 case 0: reg19_val = (reg19_val & 0xFFFFFF00) | cw_min_exp | (cw_max_exp << 4); break ; 1416 case 1: reg19_val = (reg19_val & 0xFFFF00FF) | ((cw_min_exp | (cw_max_exp << 4)) << 8); break ; 1417 case 2: reg19_val = (reg19_val & 0xFF00FFFF) | ((cw_min_exp | (cw_max_exp << 4)) << 16); break ; 1418 case 3: reg8_val = (reg8_val & 0x00FFFFFF) | ((cw_min_exp | (cw_max_exp << 4)) << 24); break ; 1419 default: printk("%s openwifi_conf_tx: WARNING queue %d does not exist",sdr_compatible_str, queue); return(0); 1420 } 1421 reg19_val = reg19_val | 0x10000000 ; // enable dynamic contention window. 1422 xpu_api->XPU_REG_LBT_TH_write(reg8_val); 1423 xpu_api->XPU_REG_CSMA_CFG_write(reg19_val); 1424 //printk("reg19 val target val %08x, reg8 target val %08x", reg19_val, reg8_val); 1425 //reg19_val=xpu_api->XPU_REG_CSMA_CFG_read(); 1426 //reg8_val=xpu_api->XPU_REG_LBT_TH_read(); 1427 //printk("reg19 val read back %08x, reg8 read back %08x", reg19_val, reg8_val); 1428 return(0); 1429 } 1430 1431 static u64 openwifi_prepare_multicast(struct ieee80211_hw *dev, 1432 struct netdev_hw_addr_list *mc_list) 1433 { 1434 printk("%s openwifi_prepare_multicast\n", sdr_compatible_str); 1435 return netdev_hw_addr_list_count(mc_list); 1436 } 1437 1438 static void openwifi_configure_filter(struct ieee80211_hw *dev, 1439 unsigned int changed_flags, 1440 unsigned int *total_flags, 1441 u64 multicast) 1442 { 1443 u32 filter_flag; 1444 1445 (*total_flags) &= SDR_SUPPORTED_FILTERS; 1446 (*total_flags) |= FIF_ALLMULTI; //because we need to pass all multicast (no matter it is for us or not) to upper layer 1447 1448 filter_flag = (*total_flags); 1449 1450 filter_flag = (filter_flag|UNICAST_FOR_US|BROADCAST_ALL_ONE|BROADCAST_ALL_ZERO); 1451 //filter_flag = (filter_flag|UNICAST_FOR_US|BROADCAST_ALL_ONE|BROADCAST_ALL_ZERO|MONITOR_ALL); // all pkt will be delivered to arm 1452 1453 //if (priv->vif[0]->type == NL80211_IFTYPE_MONITOR) 1454 if ((filter_flag&0xf0) == 0xf0) //FIF_BCN_PRBRESP_PROMISC/FIF_CONTROL/FIF_OTHER_BSS/FIF_PSPOLL are set means monitor mode 1455 filter_flag = (filter_flag|MONITOR_ALL); 1456 else 1457 filter_flag = (filter_flag&(~MONITOR_ALL)); 1458 1459 if ( !(filter_flag&FIF_BCN_PRBRESP_PROMISC) ) 1460 filter_flag = (filter_flag|MY_BEACON); 1461 1462 filter_flag = (filter_flag|FIF_PSPOLL); 1463 1464 xpu_api->XPU_REG_FILTER_FLAG_write(filter_flag|HIGH_PRIORITY_DISCARD_FLAG); 1465 //xpu_api->XPU_REG_FILTER_FLAG_write(filter_flag); //do not discard any pkt 1466 1467 printk("%s openwifi_configure_filter MON %d M_BCN %d BST0 %d BST1 %d UST %d PB_RQ %d PS_PL %d O_BSS %d CTL %d BCN_PRP %d PCP_FL %d FCS_FL %d ALL_MUT %d\n", sdr_compatible_str, 1468 (filter_flag>>13)&1,(filter_flag>>12)&1,(filter_flag>>11)&1,(filter_flag>>10)&1,(filter_flag>>9)&1,(filter_flag>>8)&1,(filter_flag>>7)&1,(filter_flag>>6)&1,(filter_flag>>5)&1,(filter_flag>>4)&1,(filter_flag>>3)&1,(filter_flag>>2)&1,(filter_flag>>1)&1); 1469 } 1470 1471 static int openwifi_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, void *data, int len) 1472 { 1473 struct openwifi_priv *priv = hw->priv; 1474 struct nlattr *tb[OPENWIFI_ATTR_MAX + 1]; 1475 struct sk_buff *skb; 1476 int err; 1477 u32 tmp=-1, reg_cat, reg_addr, reg_val, reg_addr_idx, tsft_high, tsft_low; 1478 1479 err = nla_parse(tb, OPENWIFI_ATTR_MAX, data, len, openwifi_testmode_policy, NULL); 1480 if (err) 1481 return err; 1482 1483 if (!tb[OPENWIFI_ATTR_CMD]) 1484 return -EINVAL; 1485 1486 switch (nla_get_u32(tb[OPENWIFI_ATTR_CMD])) { 1487 case OPENWIFI_CMD_SET_GAP: 1488 if (!tb[OPENWIFI_ATTR_GAP]) 1489 return -EINVAL; 1490 tmp = nla_get_u32(tb[OPENWIFI_ATTR_GAP]); 1491 printk("%s openwifi radio inter frame gap set to %d usec\n", sdr_compatible_str, tmp); 1492 xpu_api->XPU_REG_CSMA_CFG_write(tmp); // unit us 1493 return 0; 1494 case OPENWIFI_CMD_GET_GAP: 1495 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1496 if (!skb) 1497 return -ENOMEM; 1498 tmp = xpu_api->XPU_REG_CSMA_CFG_read(); 1499 if (nla_put_u32(skb, OPENWIFI_ATTR_GAP, tmp)) 1500 goto nla_put_failure; 1501 return cfg80211_testmode_reply(skb); 1502 case OPENWIFI_CMD_SET_SLICE_IDX: 1503 if (!tb[OPENWIFI_ATTR_SLICE_IDX]) 1504 return -EINVAL; 1505 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_IDX]); 1506 printk("%s set openwifi slice_idx in hex: %08x\n", sdr_compatible_str, tmp); 1507 if (tmp == MAX_NUM_HW_QUEUE) { 1508 printk("%s set openwifi slice_idx reset all queue counter.\n", sdr_compatible_str); 1509 xpu_api->XPU_REG_MULTI_RST_write(1<<7); //bit7 reset the counter for all queues at the same time 1510 xpu_api->XPU_REG_MULTI_RST_write(0<<7); 1511 } else { 1512 priv->slice_idx = tmp; 1513 } 1514 return 0; 1515 case OPENWIFI_CMD_GET_SLICE_IDX: 1516 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1517 if (!skb) 1518 return -ENOMEM; 1519 tmp = priv->slice_idx; 1520 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_IDX, tmp)) 1521 goto nla_put_failure; 1522 printk("%s get openwifi slice_idx in hex: %08x\n", sdr_compatible_str, tmp); 1523 return cfg80211_testmode_reply(skb); 1524 case OPENWIFI_CMD_SET_ADDR: 1525 if (!tb[OPENWIFI_ATTR_ADDR]) 1526 return -EINVAL; 1527 tmp = nla_get_u32(tb[OPENWIFI_ATTR_ADDR]); 1528 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1529 printk("%s set openwifi slice_target_mac_addr(low32) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1530 } else { 1531 printk("%s set openwifi slice_target_mac_addr(low32) in hex: %08x to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1532 priv->dest_mac_addr_queue_map[priv->slice_idx] = reverse32(tmp); 1533 } 1534 return 0; 1535 case OPENWIFI_CMD_GET_ADDR: 1536 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1537 if (!skb) 1538 return -ENOMEM; 1539 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1540 tmp = -1; 1541 } else { 1542 tmp = reverse32(priv->dest_mac_addr_queue_map[priv->slice_idx]); 1543 } 1544 if (nla_put_u32(skb, OPENWIFI_ATTR_ADDR, tmp)) 1545 goto nla_put_failure; 1546 printk("%s get openwifi slice_target_mac_addr(low32) in hex: %08x of slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1547 return cfg80211_testmode_reply(skb); 1548 1549 case OPENWIFI_CMD_SET_SLICE_TOTAL: 1550 if (!tb[OPENWIFI_ATTR_SLICE_TOTAL]) 1551 return -EINVAL; 1552 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_TOTAL]); 1553 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1554 printk("%s set SLICE_TOTAL(duration) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1555 } else { 1556 printk("%s set SLICE_TOTAL(duration) %d usec to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1557 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((priv->slice_idx<<20)|tmp); 1558 } 1559 return 0; 1560 case OPENWIFI_CMD_GET_SLICE_TOTAL: 1561 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1562 if (!skb) 1563 return -ENOMEM; 1564 tmp = (xpu_api->XPU_REG_SLICE_COUNT_TOTAL_read()); 1565 printk("%s get SLICE_TOTAL(duration) %d usec of slice %d\n", sdr_compatible_str, tmp&0xFFFFF, tmp>>20); 1566 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_TOTAL, tmp)) 1567 goto nla_put_failure; 1568 return cfg80211_testmode_reply(skb); 1569 1570 case OPENWIFI_CMD_SET_SLICE_START: 1571 if (!tb[OPENWIFI_ATTR_SLICE_START]) 1572 return -EINVAL; 1573 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_START]); 1574 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1575 printk("%s set SLICE_START(duration) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1576 } else { 1577 printk("%s set SLICE_START(duration) %d usec to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1578 xpu_api->XPU_REG_SLICE_COUNT_START_write((priv->slice_idx<<20)|tmp); 1579 } 1580 return 0; 1581 case OPENWIFI_CMD_GET_SLICE_START: 1582 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1583 if (!skb) 1584 return -ENOMEM; 1585 tmp = (xpu_api->XPU_REG_SLICE_COUNT_START_read()); 1586 printk("%s get SLICE_START(duration) %d usec of slice %d\n", sdr_compatible_str, tmp&0xFFFFF, tmp>>20); 1587 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_START, tmp)) 1588 goto nla_put_failure; 1589 return cfg80211_testmode_reply(skb); 1590 1591 case OPENWIFI_CMD_SET_SLICE_END: 1592 if (!tb[OPENWIFI_ATTR_SLICE_END]) 1593 return -EINVAL; 1594 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_END]); 1595 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1596 printk("%s set SLICE_END(duration) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1597 } else { 1598 printk("%s set SLICE_END(duration) %d usec to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1599 xpu_api->XPU_REG_SLICE_COUNT_END_write((priv->slice_idx<<20)|tmp); 1600 } 1601 return 0; 1602 case OPENWIFI_CMD_GET_SLICE_END: 1603 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1604 if (!skb) 1605 return -ENOMEM; 1606 tmp = (xpu_api->XPU_REG_SLICE_COUNT_END_read()); 1607 printk("%s get SLICE_END(duration) %d usec of slice %d\n", sdr_compatible_str, tmp&0xFFFFF, tmp>>20); 1608 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_END, tmp)) 1609 goto nla_put_failure; 1610 return cfg80211_testmode_reply(skb); 1611 1612 // case OPENWIFI_CMD_SET_SLICE_TOTAL1: 1613 // if (!tb[OPENWIFI_ATTR_SLICE_TOTAL1]) 1614 // return -EINVAL; 1615 // tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_TOTAL1]); 1616 // printk("%s set SLICE_TOTAL1(duration) to %d usec\n", sdr_compatible_str, tmp); 1617 // // xpu_api->XPU_REG_SLICE_COUNT_TOTAL1_write(tmp); 1618 // return 0; 1619 // case OPENWIFI_CMD_GET_SLICE_TOTAL1: 1620 // skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1621 // if (!skb) 1622 // return -ENOMEM; 1623 // // tmp = (xpu_api->XPU_REG_SLICE_COUNT_TOTAL1_read()); 1624 // if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_TOTAL1, tmp)) 1625 // goto nla_put_failure; 1626 // return cfg80211_testmode_reply(skb); 1627 1628 // case OPENWIFI_CMD_SET_SLICE_START1: 1629 // if (!tb[OPENWIFI_ATTR_SLICE_START1]) 1630 // return -EINVAL; 1631 // tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_START1]); 1632 // printk("%s set SLICE_START1(duration) to %d usec\n", sdr_compatible_str, tmp); 1633 // // xpu_api->XPU_REG_SLICE_COUNT_START1_write(tmp); 1634 // return 0; 1635 // case OPENWIFI_CMD_GET_SLICE_START1: 1636 // skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1637 // if (!skb) 1638 // return -ENOMEM; 1639 // // tmp = (xpu_api->XPU_REG_SLICE_COUNT_START1_read()); 1640 // if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_START1, tmp)) 1641 // goto nla_put_failure; 1642 // return cfg80211_testmode_reply(skb); 1643 1644 // case OPENWIFI_CMD_SET_SLICE_END1: 1645 // if (!tb[OPENWIFI_ATTR_SLICE_END1]) 1646 // return -EINVAL; 1647 // tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_END1]); 1648 // printk("%s set SLICE_END1(duration) to %d usec\n", sdr_compatible_str, tmp); 1649 // // xpu_api->XPU_REG_SLICE_COUNT_END1_write(tmp); 1650 // return 0; 1651 // case OPENWIFI_CMD_GET_SLICE_END1: 1652 // skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1653 // if (!skb) 1654 // return -ENOMEM; 1655 // // tmp = (xpu_api->XPU_REG_SLICE_COUNT_END1_read()); 1656 // if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_END1, tmp)) 1657 // goto nla_put_failure; 1658 // return cfg80211_testmode_reply(skb); 1659 1660 case OPENWIFI_CMD_SET_RSSI_TH: 1661 if (!tb[OPENWIFI_ATTR_RSSI_TH]) 1662 return -EINVAL; 1663 tmp = nla_get_u32(tb[OPENWIFI_ATTR_RSSI_TH]); 1664 printk("%s set RSSI_TH to %d\n", sdr_compatible_str, tmp); 1665 tmp = (tmp | (xpu_api->XPU_REG_LBT_TH_read() & 0xFFFF0000)); 1666 xpu_api->XPU_REG_LBT_TH_write(tmp); 1667 return 0; 1668 case OPENWIFI_CMD_GET_RSSI_TH: 1669 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1670 if (!skb) 1671 return -ENOMEM; 1672 tmp = xpu_api->XPU_REG_LBT_TH_read(); 1673 if (nla_put_u32(skb, OPENWIFI_ATTR_RSSI_TH, tmp)) 1674 goto nla_put_failure; 1675 return cfg80211_testmode_reply(skb); 1676 1677 case OPENWIFI_CMD_SET_TSF: 1678 printk("openwifi_set_tsf_1"); 1679 if ( (!tb[OPENWIFI_ATTR_HIGH_TSF]) || (!tb[OPENWIFI_ATTR_LOW_TSF]) ) 1680 return -EINVAL; 1681 printk("openwifi_set_tsf_2"); 1682 tsft_high = nla_get_u32(tb[OPENWIFI_ATTR_HIGH_TSF]); 1683 tsft_low = nla_get_u32(tb[OPENWIFI_ATTR_LOW_TSF]); 1684 xpu_api->XPU_REG_TSF_LOAD_VAL_write(tsft_high,tsft_low); 1685 printk("%s openwifi_set_tsf: %08x%08x\n", sdr_compatible_str,tsft_high,tsft_low); 1686 return 0; 1687 1688 case REG_CMD_SET: 1689 if ( (!tb[REG_ATTR_ADDR]) || (!tb[REG_ATTR_VAL]) ) 1690 return -EINVAL; 1691 reg_addr = nla_get_u32(tb[REG_ATTR_ADDR]); 1692 reg_val = nla_get_u32(tb[REG_ATTR_VAL]); 1693 reg_cat = ((reg_addr>>16)&0xFFFF); 1694 reg_addr = (reg_addr&0xFFFF); 1695 reg_addr_idx = (reg_addr>>2); 1696 printk("%s recv set cmd reg cat %d addr %08x val %08x idx %d\n", sdr_compatible_str, reg_cat, reg_addr, reg_val, reg_addr_idx); 1697 if (reg_cat==1) 1698 printk("%s reg cat 1 (rf) is not supported yet!\n", sdr_compatible_str); 1699 else if (reg_cat==2) 1700 rx_intf_api->reg_write(reg_addr,reg_val); 1701 else if (reg_cat==3) 1702 tx_intf_api->reg_write(reg_addr,reg_val); 1703 else if (reg_cat==4) 1704 openofdm_rx_api->reg_write(reg_addr,reg_val); 1705 else if (reg_cat==5) 1706 openofdm_tx_api->reg_write(reg_addr,reg_val); 1707 else if (reg_cat==6) 1708 xpu_api->reg_write(reg_addr,reg_val); 1709 else if (reg_cat==7) { 1710 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1711 priv->drv_rx_reg_val[reg_addr_idx]=reg_val; 1712 if (reg_addr_idx==DRV_RX_REG_IDX_FREQ_BW_CFG) { 1713 if (reg_val==0) 1714 priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT0; 1715 else 1716 priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT1; 1717 1718 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1719 //priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1720 } 1721 } else 1722 printk("%s reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1723 } 1724 else if (reg_cat==8) { 1725 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1726 priv->drv_tx_reg_val[reg_addr_idx]=reg_val; 1727 if (reg_addr_idx==DRV_TX_REG_IDX_FREQ_BW_CFG) { 1728 if (reg_val==0) { 1729 priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0; 1730 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, true, false, true); 1731 } else { 1732 priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1; 1733 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, false, true, true); 1734 } 1735 1736 //priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1737 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1738 } 1739 } else 1740 printk("%s reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1741 } 1742 else if (reg_cat==9) { 1743 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) 1744 priv->drv_xpu_reg_val[reg_addr_idx]=reg_val; 1745 else 1746 printk("%s reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1747 } 1748 else 1749 printk("%s reg cat %d is not supported yet!\n", sdr_compatible_str, reg_cat); 1750 1751 return 0; 1752 case REG_CMD_GET: 1753 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1754 if (!skb) 1755 return -ENOMEM; 1756 reg_addr = nla_get_u32(tb[REG_ATTR_ADDR]); 1757 reg_cat = ((reg_addr>>16)&0xFFFF); 1758 reg_addr = (reg_addr&0xFFFF); 1759 reg_addr_idx = (reg_addr>>2); 1760 printk("%s recv get cmd reg cat %d addr %08x idx %d\n", sdr_compatible_str, reg_cat, reg_addr, reg_addr_idx); 1761 if (reg_cat==1) { 1762 printk("%s reg cat 1 (rf) is not supported yet!\n", sdr_compatible_str); 1763 tmp = 0xFFFFFFFF; 1764 } 1765 else if (reg_cat==2) 1766 tmp = rx_intf_api->reg_read(reg_addr); 1767 else if (reg_cat==3) 1768 tmp = tx_intf_api->reg_read(reg_addr); 1769 else if (reg_cat==4) 1770 tmp = openofdm_rx_api->reg_read(reg_addr); 1771 else if (reg_cat==5) 1772 tmp = openofdm_tx_api->reg_read(reg_addr); 1773 else if (reg_cat==6) 1774 tmp = xpu_api->reg_read(reg_addr); 1775 else if (reg_cat==7) { 1776 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1777 if (reg_addr_idx==DRV_RX_REG_IDX_FREQ_BW_CFG) { 1778 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1779 //priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1780 1781 if (priv->rx_intf_cfg == RX_INTF_BW_20MHZ_AT_0MHZ_ANT0) 1782 priv->drv_rx_reg_val[reg_addr_idx]=0; 1783 else if (priv->rx_intf_cfg == RX_INTF_BW_20MHZ_AT_0MHZ_ANT1) 1784 priv->drv_rx_reg_val[reg_addr_idx]=1; 1785 } 1786 tmp = priv->drv_rx_reg_val[reg_addr_idx]; 1787 } else 1788 printk("%s reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1789 } 1790 else if (reg_cat==8) { 1791 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1792 if (reg_addr_idx==DRV_TX_REG_IDX_FREQ_BW_CFG) { 1793 //priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1794 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1795 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0) 1796 priv->drv_tx_reg_val[reg_addr_idx]=0; 1797 else if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) 1798 priv->drv_tx_reg_val[reg_addr_idx]=1; 1799 } 1800 tmp = priv->drv_tx_reg_val[reg_addr_idx]; 1801 } else 1802 printk("%s reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1803 } 1804 else if (reg_cat==9) { 1805 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) 1806 tmp = priv->drv_xpu_reg_val[reg_addr_idx]; 1807 else 1808 printk("%s reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1809 } 1810 else 1811 printk("%s reg cat %d is not supported yet!\n", sdr_compatible_str, reg_cat); 1812 1813 if (nla_put_u32(skb, REG_ATTR_VAL, tmp)) 1814 goto nla_put_failure; 1815 return cfg80211_testmode_reply(skb); 1816 1817 default: 1818 return -EOPNOTSUPP; 1819 } 1820 1821 nla_put_failure: 1822 dev_kfree_skb(skb); 1823 return -ENOBUFS; 1824 } 1825 1826 static const struct ieee80211_ops openwifi_ops = { 1827 .tx = openwifi_tx, 1828 .start = openwifi_start, 1829 .stop = openwifi_stop, 1830 .add_interface = openwifi_add_interface, 1831 .remove_interface = openwifi_remove_interface, 1832 .config = openwifi_config, 1833 .bss_info_changed = openwifi_bss_info_changed, 1834 .conf_tx = openwifi_conf_tx, 1835 .prepare_multicast = openwifi_prepare_multicast, 1836 .configure_filter = openwifi_configure_filter, 1837 .rfkill_poll = openwifi_rfkill_poll, 1838 .get_tsf = openwifi_get_tsf, 1839 .set_tsf = openwifi_set_tsf, 1840 .reset_tsf = openwifi_reset_tsf, 1841 .set_rts_threshold = openwifi_set_rts_threshold, 1842 .testmode_cmd = openwifi_testmode_cmd, 1843 }; 1844 1845 static const struct of_device_id openwifi_dev_of_ids[] = { 1846 { .compatible = "sdr,sdr", }, 1847 {} 1848 }; 1849 MODULE_DEVICE_TABLE(of, openwifi_dev_of_ids); 1850 1851 static int custom_match_spi_dev(struct device *dev, void *data) 1852 { 1853 const char *name = data; 1854 1855 bool ret = sysfs_streq(name, dev->of_node->name); 1856 printk("%s custom_match_spi_dev %s %s %d\n", sdr_compatible_str,name, dev->of_node->name, ret); 1857 return ret; 1858 } 1859 1860 static int custom_match_platform_dev(struct device *dev, void *data) 1861 { 1862 struct platform_device *plat_dev = to_platform_device(dev); 1863 const char *name = data; 1864 char *name_in_sys_bus_platform_devices = strstr(plat_dev->name, name); 1865 bool match_flag = (name_in_sys_bus_platform_devices != NULL); 1866 1867 if (match_flag) { 1868 printk("%s custom_match_platform_dev %s\n", sdr_compatible_str,plat_dev->name); 1869 } 1870 return(match_flag); 1871 } 1872 1873 static int openwifi_dev_probe(struct platform_device *pdev) 1874 { 1875 struct ieee80211_hw *dev; 1876 struct openwifi_priv *priv; 1877 int err=1, rand_val; 1878 const char *chip_name, *fpga_model; 1879 u32 reg;//, reg1; 1880 1881 struct device_node *np = pdev->dev.of_node; 1882 1883 struct device *tmp_dev; 1884 struct platform_device *tmp_pdev; 1885 struct iio_dev *tmp_indio_dev; 1886 // struct gpio_leds_priv *tmp_led_priv; 1887 1888 printk("\n"); 1889 1890 if (np) { 1891 const struct of_device_id *match; 1892 1893 match = of_match_node(openwifi_dev_of_ids, np); 1894 if (match) { 1895 printk("%s openwifi_dev_probe: match!\n", sdr_compatible_str); 1896 err = 0; 1897 } 1898 } 1899 1900 if (err) 1901 return err; 1902 1903 dev = ieee80211_alloc_hw(sizeof(*priv), &openwifi_ops); 1904 if (!dev) { 1905 printk(KERN_ERR "%s openwifi_dev_probe: ieee80211 alloc failed\n",sdr_compatible_str); 1906 err = -ENOMEM; 1907 goto err_free_dev; 1908 } 1909 1910 priv = dev->priv; 1911 priv->pdev = pdev; 1912 1913 err = of_property_read_string(of_find_node_by_path("/"), "model", &fpga_model); 1914 if(err < 0) { 1915 printk("%s openwifi_dev_probe: WARNING unknown openwifi FPGA model %d\n",sdr_compatible_str, err); 1916 priv->fpga_type = SMALL_FPGA; 1917 } else { 1918 // LARGE FPGAs (i.e. ZCU102, Z7035, ZC706) 1919 if(strstr(fpga_model, "ZCU102") != NULL || strstr(fpga_model, "Z7035") != NULL || strstr(fpga_model, "ZC706") != NULL) 1920 priv->fpga_type = LARGE_FPGA; 1921 // SMALL FPGA: (i.e. ZED, ZC702, Z7020) 1922 else if(strstr(fpga_model, "ZED") != NULL || strstr(fpga_model, "ZC702") != NULL || strstr(fpga_model, "Z7020") != NULL) 1923 priv->fpga_type = SMALL_FPGA; 1924 } 1925 1926 // //-------------find ad9361-phy driver for lo/channel control--------------- 1927 priv->actual_rx_lo = 0; 1928 tmp_dev = bus_find_device( &spi_bus_type, NULL, "ad9361-phy", custom_match_spi_dev ); 1929 if (tmp_dev == NULL) { 1930 printk(KERN_ERR "%s find_dev ad9361-phy failed\n",sdr_compatible_str); 1931 err = -ENOMEM; 1932 goto err_free_dev; 1933 } 1934 printk("%s bus_find_device ad9361-phy: %s. driver_data pointer %p\n", sdr_compatible_str, ((struct spi_device*)tmp_dev)->modalias, (void*)(((struct spi_device*)tmp_dev)->dev.driver_data)); 1935 if (((struct spi_device*)tmp_dev)->dev.driver_data == NULL) { 1936 printk(KERN_ERR "%s find_dev ad9361-phy failed. dev.driver_data == NULL\n",sdr_compatible_str); 1937 err = -ENOMEM; 1938 goto err_free_dev; 1939 } 1940 1941 priv->ad9361_phy = ad9361_spi_to_phy((struct spi_device*)tmp_dev); 1942 if (!(priv->ad9361_phy)) { 1943 printk(KERN_ERR "%s ad9361_spi_to_phy failed\n",sdr_compatible_str); 1944 err = -ENOMEM; 1945 goto err_free_dev; 1946 } 1947 printk("%s ad9361_spi_to_phy ad9361-phy: %s\n", sdr_compatible_str, priv->ad9361_phy->spi->modalias); 1948 1949 priv->ctrl_out.en_mask=0xFF; 1950 priv->ctrl_out.index=0x16; 1951 err = ad9361_ctrl_outs_setup(priv->ad9361_phy, &(priv->ctrl_out)); 1952 if (err < 0) { 1953 printk("%s openwifi_dev_probe: WARNING ad9361_ctrl_outs_setup %d\n",sdr_compatible_str, err); 1954 } else { 1955 printk("%s openwifi_dev_probe: ad9361_ctrl_outs_setup en_mask 0x%02x index 0x%02x\n",sdr_compatible_str, priv->ctrl_out.en_mask, priv->ctrl_out.index); 1956 } 1957 1958 reg = ad9361_spi_read(priv->ad9361_phy->spi, REG_CTRL_OUTPUT_POINTER); 1959 printk("%s openwifi_dev_probe: ad9361_spi_read REG_CTRL_OUTPUT_POINTER 0x%02x\n",sdr_compatible_str, reg); 1960 reg = ad9361_spi_read(priv->ad9361_phy->spi, REG_CTRL_OUTPUT_ENABLE); 1961 printk("%s openwifi_dev_probe: ad9361_spi_read REG_CTRL_OUTPUT_ENABLE 0x%02x\n",sdr_compatible_str, reg); 1962 1963 // //-------------find driver: axi_ad9361 hdl ref design module, dac channel--------------- 1964 tmp_dev = bus_find_device( &platform_bus_type, NULL, "cf-ad9361-dds-core-lpc", custom_match_platform_dev ); 1965 if (!tmp_dev) { 1966 printk(KERN_ERR "%s bus_find_device platform_bus_type cf-ad9361-dds-core-lpc failed\n",sdr_compatible_str); 1967 err = -ENOMEM; 1968 goto err_free_dev; 1969 } 1970 1971 tmp_pdev = to_platform_device(tmp_dev); 1972 if (!tmp_pdev) { 1973 printk(KERN_ERR "%s to_platform_device failed\n",sdr_compatible_str); 1974 err = -ENOMEM; 1975 goto err_free_dev; 1976 } 1977 1978 tmp_indio_dev = platform_get_drvdata(tmp_pdev); 1979 if (!tmp_indio_dev) { 1980 printk(KERN_ERR "%s platform_get_drvdata failed\n",sdr_compatible_str); 1981 err = -ENOMEM; 1982 goto err_free_dev; 1983 } 1984 1985 priv->dds_st = iio_priv(tmp_indio_dev); 1986 if (!(priv->dds_st)) { 1987 printk(KERN_ERR "%s iio_priv failed\n",sdr_compatible_str); 1988 err = -ENOMEM; 1989 goto err_free_dev; 1990 } 1991 printk("%s openwifi_dev_probe: cf-ad9361-dds-core-lpc dds_st->version %08x chip_info->name %s\n",sdr_compatible_str,priv->dds_st->version,priv->dds_st->chip_info->name); 1992 cf_axi_dds_datasel(priv->dds_st, -1, DATA_SEL_DMA); 1993 printk("%s openwifi_dev_probe: cf_axi_dds_datasel DATA_SEL_DMA\n",sdr_compatible_str); 1994 1995 // //-------------find driver: axi_ad9361 hdl ref design module, adc channel--------------- 1996 // turn off radio by muting tx 1997 // ad9361_tx_mute(priv->ad9361_phy, 1); 1998 // reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 1999 // reg1 = ad9361_get_tx_atten(priv->ad9361_phy, 1); 2000 // if (reg == AD9361_RADIO_OFF_TX_ATT && reg1 == AD9361_RADIO_OFF_TX_ATT ) { 2001 // priv->rfkill_off = 0;// 0 off, 1 on 2002 // printk("%s openwifi_dev_probe: rfkill radio off\n",sdr_compatible_str); 2003 // } 2004 // else 2005 // printk("%s openwifi_dev_probe: WARNING rfkill radio off failed. tx att read %d %d require %d\n",sdr_compatible_str, reg, reg1, AD9361_RADIO_OFF_TX_ATT); 2006 2007 priv->rssi_correction = 43;//this will be set in real-time by _rf_set_channel() 2008 2009 //priv->rf_bw = 20000000; // Signal quality issue! NOT use for now. 20MHz or 40MHz. 40MHz need ddc/duc. 20MHz works in bypass mode 2010 priv->rf_bw = 40000000; // 20MHz or 40MHz. 40MHz need ddc/duc. 20MHz works in bypass mode 2011 2012 priv->xpu_cfg = XPU_NORMAL; 2013 2014 priv->openofdm_tx_cfg = OPENOFDM_TX_NORMAL; 2015 priv->openofdm_rx_cfg = OPENOFDM_RX_NORMAL; 2016 2017 printk("%s openwifi_dev_probe: priv->rf_bw == %dHz. bool for 20000000 %d, 40000000 %d\n",sdr_compatible_str, priv->rf_bw, (priv->rf_bw==20000000) , (priv->rf_bw==40000000) ); 2018 if (priv->rf_bw == 20000000) { 2019 priv->rx_intf_cfg = RX_INTF_BYPASS; 2020 priv->tx_intf_cfg = TX_INTF_BYPASS; 2021 //priv->rx_freq_offset_to_lo_MHz = 0; 2022 //priv->tx_freq_offset_to_lo_MHz = 0; 2023 } else if (priv->rf_bw == 40000000) { 2024 //priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_P_10MHZ; //work 2025 //priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1; //work 2026 2027 // // test ddc at central, duc at central+10M. It works. And also change rx BW from 40MHz to 20MHz in rf_init.sh. Rx sampling rate is still 40Msps 2028 priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT0; 2029 priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0; // Let's use rx0 tx0 as default mode, because it works for both 9361 and 9364 2030 // // try another antenna option 2031 //priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT1; 2032 //priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0; 2033 2034 #if 0 2035 if (priv->rx_intf_cfg == DDC_BW_20MHZ_AT_N_10MHZ) { 2036 priv->rx_freq_offset_to_lo_MHz = -10; 2037 } else if (priv->rx_intf_cfg == DDC_BW_20MHZ_AT_P_10MHZ) { 2038 priv->rx_freq_offset_to_lo_MHz = 10; 2039 } else if (priv->rx_intf_cfg == DDC_BW_20MHZ_AT_0MHZ) { 2040 priv->rx_freq_offset_to_lo_MHz = 0; 2041 } else { 2042 printk("%s openwifi_dev_probe: Warning! priv->rx_intf_cfg == %d\n",sdr_compatible_str,priv->rx_intf_cfg); 2043 } 2044 #endif 2045 } else { 2046 printk("%s openwifi_dev_probe: Warning! priv->rf_bw == %dHz (should be 20000000 or 40000000)\n",sdr_compatible_str, priv->rf_bw); 2047 } 2048 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 2049 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 2050 printk("%s openwifi_dev_probe: test_mode %d\n", sdr_compatible_str, test_mode); 2051 2052 //let's by default turn radio on when probing 2053 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) { 2054 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, false, true, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 2055 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 2056 } else { 2057 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, true, false, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 2058 reg = ad9361_get_tx_atten(priv->ad9361_phy, 1); 2059 } 2060 if (reg == AD9361_RADIO_ON_TX_ATT) { 2061 priv->rfkill_off = 1;// 0 off, 1 on 2062 printk("%s openwifi_dev_probe: rfkill radio on\n",sdr_compatible_str); 2063 } 2064 else 2065 printk("%s openwifi_dev_probe: WARNING rfkill radio on failed. tx att read %d require %d\n",sdr_compatible_str, reg, AD9361_RADIO_ON_TX_ATT); 2066 2067 memset(priv->drv_rx_reg_val,0,sizeof(priv->drv_rx_reg_val)); 2068 memset(priv->drv_tx_reg_val,0,sizeof(priv->drv_tx_reg_val)); 2069 memset(priv->drv_xpu_reg_val,0,sizeof(priv->drv_xpu_reg_val)); 2070 2071 // //set ad9361 in certain mode 2072 #if 0 2073 err = ad9361_set_trx_clock_chain_freq(priv->ad9361_phy,priv->rf_bw); 2074 printk("%s openwifi_dev_probe: ad9361_set_trx_clock_chain_freq %dHz err %d\n",sdr_compatible_str, priv->rf_bw,err); 2075 err = ad9361_update_rf_bandwidth(priv->ad9361_phy,priv->rf_bw,priv->rf_bw); 2076 printk("%s openwifi_dev_probe: ad9361_update_rf_bandwidth %dHz err %d\n",sdr_compatible_str, priv->rf_bw,err); 2077 2078 rx_intf_api->hw_init(priv->rx_intf_cfg,8,8); 2079 tx_intf_api->hw_init(priv->tx_intf_cfg,8,8,priv->fpga_type); 2080 openofdm_tx_api->hw_init(priv->openofdm_tx_cfg); 2081 openofdm_rx_api->hw_init(priv->openofdm_rx_cfg); 2082 printk("%s openwifi_dev_probe: rx_intf_cfg %d openofdm_rx_cfg %d tx_intf_cfg %d openofdm_tx_cfg %d\n",sdr_compatible_str, priv->rx_intf_cfg, priv->openofdm_rx_cfg, priv->tx_intf_cfg, priv->openofdm_tx_cfg); 2083 printk("%s openwifi_dev_probe: rx_freq_offset_to_lo_MHz %d tx_freq_offset_to_lo_MHz %d\n",sdr_compatible_str, priv->rx_freq_offset_to_lo_MHz, priv->tx_freq_offset_to_lo_MHz); 2084 #endif 2085 2086 dev->max_rates = 1; //maximum number of alternate rate retry stages the hw can handle. 2087 2088 SET_IEEE80211_DEV(dev, &pdev->dev); 2089 platform_set_drvdata(pdev, dev); 2090 2091 BUILD_BUG_ON(sizeof(priv->rates_2GHz) != sizeof(openwifi_2GHz_rates)); 2092 BUILD_BUG_ON(sizeof(priv->rates_5GHz) != sizeof(openwifi_5GHz_rates)); 2093 BUILD_BUG_ON(sizeof(priv->channels_2GHz) != sizeof(openwifi_2GHz_channels)); 2094 BUILD_BUG_ON(sizeof(priv->channels_5GHz) != sizeof(openwifi_5GHz_channels)); 2095 2096 memcpy(priv->rates_2GHz, openwifi_2GHz_rates, sizeof(openwifi_2GHz_rates)); 2097 memcpy(priv->rates_5GHz, openwifi_5GHz_rates, sizeof(openwifi_5GHz_rates)); 2098 memcpy(priv->channels_2GHz, openwifi_2GHz_channels, sizeof(openwifi_2GHz_channels)); 2099 memcpy(priv->channels_5GHz, openwifi_5GHz_channels, sizeof(openwifi_5GHz_channels)); 2100 2101 priv->band = BAND_5_8GHZ; //this can be changed by band _rf_set_channel() (2.4GHz ERP(OFDM)) (5GHz OFDM) 2102 priv->channel = 44; //currently useless. this can be changed by band _rf_set_channel() 2103 priv->use_short_slot = false; //this can be changed by openwifi_bss_info_changed: BSS_CHANGED_ERP_SLOT 2104 2105 priv->band_2GHz.band = NL80211_BAND_2GHZ; 2106 priv->band_2GHz.channels = priv->channels_2GHz; 2107 priv->band_2GHz.n_channels = ARRAY_SIZE(priv->channels_2GHz); 2108 priv->band_2GHz.bitrates = priv->rates_2GHz; 2109 priv->band_2GHz.n_bitrates = ARRAY_SIZE(priv->rates_2GHz); 2110 priv->band_2GHz.ht_cap.ht_supported = true; 2111 priv->band_2GHz.ht_cap.cap = IEEE80211_HT_CAP_SGI_20; 2112 memset(&priv->band_2GHz.ht_cap.mcs, 0, sizeof(priv->band_2GHz.ht_cap.mcs)); 2113 priv->band_2GHz.ht_cap.mcs.rx_mask[0] = 0xff; 2114 priv->band_2GHz.ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 2115 dev->wiphy->bands[NL80211_BAND_2GHZ] = &(priv->band_2GHz); 2116 2117 priv->band_5GHz.band = NL80211_BAND_5GHZ; 2118 priv->band_5GHz.channels = priv->channels_5GHz; 2119 priv->band_5GHz.n_channels = ARRAY_SIZE(priv->channels_5GHz); 2120 priv->band_5GHz.bitrates = priv->rates_5GHz; 2121 priv->band_5GHz.n_bitrates = ARRAY_SIZE(priv->rates_5GHz); 2122 priv->band_5GHz.ht_cap.ht_supported = true; 2123 priv->band_5GHz.ht_cap.cap = IEEE80211_HT_CAP_SGI_20; 2124 memset(&priv->band_5GHz.ht_cap.mcs, 0, sizeof(priv->band_5GHz.ht_cap.mcs)); 2125 priv->band_5GHz.ht_cap.mcs.rx_mask[0] = 0xff; 2126 priv->band_5GHz.ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 2127 dev->wiphy->bands[NL80211_BAND_5GHZ] = &(priv->band_5GHz); 2128 2129 printk("%s openwifi_dev_probe: band_2GHz.n_channels %d n_bitrates %d band_5GHz.n_channels %d n_bitrates %d\n",sdr_compatible_str, 2130 priv->band_2GHz.n_channels,priv->band_2GHz.n_bitrates,priv->band_5GHz.n_channels,priv->band_5GHz.n_bitrates); 2131 2132 ieee80211_hw_set(dev, HOST_BROADCAST_PS_BUFFERING); 2133 ieee80211_hw_set(dev, RX_INCLUDES_FCS); 2134 ieee80211_hw_set(dev, BEACON_TX_STATUS); 2135 2136 dev->vif_data_size = sizeof(struct openwifi_vif); 2137 dev->wiphy->interface_modes = 2138 BIT(NL80211_IFTYPE_MONITOR)| 2139 BIT(NL80211_IFTYPE_P2P_GO) | 2140 BIT(NL80211_IFTYPE_P2P_CLIENT) | 2141 BIT(NL80211_IFTYPE_AP) | 2142 BIT(NL80211_IFTYPE_STATION) | 2143 BIT(NL80211_IFTYPE_ADHOC) | 2144 BIT(NL80211_IFTYPE_MESH_POINT) | 2145 BIT(NL80211_IFTYPE_OCB); 2146 dev->wiphy->iface_combinations = &openwifi_if_comb; 2147 dev->wiphy->n_iface_combinations = 1; 2148 2149 dev->wiphy->regulatory_flags = (REGULATORY_STRICT_REG|REGULATORY_CUSTOM_REG); // use our own config within strict regulation 2150 //dev->wiphy->regulatory_flags = REGULATORY_CUSTOM_REG; // use our own config 2151 wiphy_apply_custom_regulatory(dev->wiphy, &sdr_regd); 2152 2153 chip_name = "ZYNQ"; 2154 2155 /* we declare to MAC80211 all the queues except for beacon queue 2156 * that will be eventually handled by DRV. 2157 * TX rings are arranged in such a way that lower is the IDX, 2158 * higher is the priority, in order to achieve direct mapping 2159 * with mac80211, however the beacon queue is an exception and it 2160 * is mapped on the highst tx ring IDX. 2161 */ 2162 dev->queues = MAX_NUM_HW_QUEUE; 2163 //dev->queues = 1; 2164 2165 ieee80211_hw_set(dev, SIGNAL_DBM); 2166 2167 wiphy_ext_feature_set(dev->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST); 2168 2169 priv->rf = &ad9361_rf_ops; 2170 2171 memset(priv->dest_mac_addr_queue_map,0,sizeof(priv->dest_mac_addr_queue_map)); 2172 priv->slice_idx = 0xFFFFFFFF; 2173 2174 sg_init_table(&(priv->tx_sg), 1); 2175 2176 get_random_bytes(&rand_val, sizeof(rand_val)); 2177 rand_val%=250; 2178 priv->mac_addr[0]=0x66; priv->mac_addr[1]=0x55; priv->mac_addr[2]=0x44; priv->mac_addr[3]=0x33; priv->mac_addr[4]=0x22; 2179 priv->mac_addr[5]=rand_val+1; 2180 //priv->mac_addr[5]=0x11; 2181 if (!is_valid_ether_addr(priv->mac_addr)) { 2182 printk(KERN_WARNING "%s openwifi_dev_probe: WARNING Invalid hwaddr! Using randomly generated MAC addr\n",sdr_compatible_str); 2183 eth_random_addr(priv->mac_addr); 2184 } else { 2185 printk("%s openwifi_dev_probe: mac_addr %02x:%02x:%02x:%02x:%02x:%02x\n",sdr_compatible_str,priv->mac_addr[0],priv->mac_addr[1],priv->mac_addr[2],priv->mac_addr[3],priv->mac_addr[4],priv->mac_addr[5]); 2186 } 2187 SET_IEEE80211_PERM_ADDR(dev, priv->mac_addr); 2188 2189 spin_lock_init(&priv->lock); 2190 2191 err = ieee80211_register_hw(dev); 2192 if (err) { 2193 pr_err(KERN_ERR "%s openwifi_dev_probe: WARNING Cannot register device\n",sdr_compatible_str); 2194 goto err_free_dev; 2195 } else { 2196 printk("%s openwifi_dev_probe: ieee80211_register_hw %d\n",sdr_compatible_str, err); 2197 } 2198 2199 // // //--------------------hook leds (not complete yet)-------------------------------- 2200 // tmp_dev = bus_find_device( &platform_bus_type, NULL, "leds", custom_match_platform_dev ); //leds is the name in devicetree, not "compatiable" field 2201 // if (!tmp_dev) { 2202 // printk(KERN_ERR "%s bus_find_device platform_bus_type leds-gpio failed\n",sdr_compatible_str); 2203 // err = -ENOMEM; 2204 // goto err_free_dev; 2205 // } 2206 2207 // tmp_pdev = to_platform_device(tmp_dev); 2208 // if (!tmp_pdev) { 2209 // printk(KERN_ERR "%s to_platform_device failed for leds-gpio\n",sdr_compatible_str); 2210 // err = -ENOMEM; 2211 // goto err_free_dev; 2212 // } 2213 2214 // tmp_led_priv = platform_get_drvdata(tmp_pdev); 2215 // if (!tmp_led_priv) { 2216 // printk(KERN_ERR "%s platform_get_drvdata failed for leds-gpio\n",sdr_compatible_str); 2217 // err = -ENOMEM; 2218 // goto err_free_dev; 2219 // } 2220 // printk("%s openwifi_dev_probe: leds-gpio detect %d leds!\n",sdr_compatible_str, tmp_led_priv->num_leds); 2221 // if (tmp_led_priv->num_leds!=4){ 2222 // printk(KERN_ERR "%s WARNING we expect 4 leds, but actual %d leds\n",sdr_compatible_str,tmp_led_priv->num_leds); 2223 // err = -ENOMEM; 2224 // goto err_free_dev; 2225 // } 2226 // gpiod_set_value(tmp_led_priv->leds[0].gpiod, 1);//light it 2227 // gpiod_set_value(tmp_led_priv->leds[3].gpiod, 0);//black it 2228 // priv->num_led = tmp_led_priv->num_leds; 2229 // priv->led[0] = &(tmp_led_priv->leds[0].cdev); 2230 // priv->led[1] = &(tmp_led_priv->leds[1].cdev); 2231 // priv->led[2] = &(tmp_led_priv->leds[2].cdev); 2232 // priv->led[3] = &(tmp_led_priv->leds[3].cdev); 2233 2234 // snprintf(priv->led_name[0], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::radio", wiphy_name(dev->wiphy)); 2235 // snprintf(priv->led_name[1], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::assoc", wiphy_name(dev->wiphy)); 2236 // snprintf(priv->led_name[2], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::tx", wiphy_name(dev->wiphy)); 2237 // snprintf(priv->led_name[3], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::rx", wiphy_name(dev->wiphy)); 2238 2239 wiphy_info(dev->wiphy, "hwaddr %pm, %s + %s\n", 2240 priv->mac_addr, chip_name, priv->rf->name); 2241 2242 openwifi_rfkill_init(dev); 2243 return 0; 2244 2245 err_free_dev: 2246 ieee80211_free_hw(dev); 2247 2248 return err; 2249 } 2250 2251 static int openwifi_dev_remove(struct platform_device *pdev) 2252 { 2253 struct ieee80211_hw *dev = platform_get_drvdata(pdev); 2254 2255 if (!dev) { 2256 pr_info("%s openwifi_dev_remove: dev %p\n", sdr_compatible_str, (void*)dev); 2257 return(-1); 2258 } 2259 2260 openwifi_rfkill_exit(dev); 2261 ieee80211_unregister_hw(dev); 2262 ieee80211_free_hw(dev); 2263 return(0); 2264 } 2265 2266 static struct platform_driver openwifi_dev_driver = { 2267 .driver = { 2268 .name = "sdr,sdr", 2269 .owner = THIS_MODULE, 2270 .of_match_table = openwifi_dev_of_ids, 2271 }, 2272 .probe = openwifi_dev_probe, 2273 .remove = openwifi_dev_remove, 2274 }; 2275 2276 module_platform_driver(openwifi_dev_driver); 2277