1 // Author: Xianjun Jiao, Michael Mehari, Wei Liu 2 // SPDX-FileCopyrightText: 2019 UGent 3 // SPDX-License-Identifier: AGPL-3.0-or-later 4 5 #include <linux/bitops.h> 6 #include <linux/dmapool.h> 7 #include <linux/io.h> 8 #include <linux/iopoll.h> 9 #include <linux/of_address.h> 10 #include <linux/of_platform.h> 11 #include <linux/of_irq.h> 12 #include <linux/slab.h> 13 #include <linux/clk.h> 14 #include <linux/io-64-nonatomic-lo-hi.h> 15 16 #include <linux/delay.h> 17 #include <linux/interrupt.h> 18 19 #include <linux/dmaengine.h> 20 #include <linux/slab.h> 21 #include <linux/delay.h> 22 #include <linux/etherdevice.h> 23 24 #include <linux/init.h> 25 #include <linux/kthread.h> 26 #include <linux/module.h> 27 #include <linux/of_dma.h> 28 #include <linux/platform_device.h> 29 #include <linux/random.h> 30 #include <linux/slab.h> 31 #include <linux/wait.h> 32 #include <linux/sched/task.h> 33 #include <linux/dma/xilinx_dma.h> 34 #include <linux/spi/spi.h> 35 #include <net/mac80211.h> 36 37 #include <linux/clk.h> 38 #include <linux/clkdev.h> 39 #include <linux/clk-provider.h> 40 41 #include <linux/iio/iio.h> 42 #include <linux/iio/sysfs.h> 43 44 #include <linux/gpio.h> 45 #include <linux/leds.h> 46 47 #define IIO_AD9361_USE_PRIVATE_H_ 48 #include <../../drivers/iio/adc/ad9361_regs.h> 49 #include <../../drivers/iio/adc/ad9361.h> 50 #include <../../drivers/iio/adc/ad9361_private.h> 51 52 #include <../../drivers/iio/frequency/cf_axi_dds.h> 53 extern int ad9361_get_tx_atten(struct ad9361_rf_phy *phy, u32 tx_num); 54 extern int ad9361_set_tx_atten(struct ad9361_rf_phy *phy, u32 atten_mdb, 55 bool tx1, bool tx2, bool immed); 56 extern int ad9361_ctrl_outs_setup(struct ad9361_rf_phy *phy, 57 struct ctrl_outs_control *ctrl); 58 59 #include "../user_space/sdrctl_src/nl80211_testmode_def.h" 60 #include "hw_def.h" 61 #include "sdr.h" 62 #include "git_rev.h" 63 64 // driver API of component driver 65 extern struct tx_intf_driver_api *tx_intf_api; 66 extern struct rx_intf_driver_api *rx_intf_api; 67 extern struct openofdm_tx_driver_api *openofdm_tx_api; 68 extern struct openofdm_rx_driver_api *openofdm_rx_api; 69 extern struct xpu_driver_api *xpu_api; 70 71 static int test_mode = 0; // 0 normal; 1 rx test 72 73 MODULE_AUTHOR("Xianjun Jiao"); 74 MODULE_DESCRIPTION("SDR driver"); 75 MODULE_LICENSE("GPL v2"); 76 77 module_param(test_mode, int, 0); 78 MODULE_PARM_DESC(myint, "test_mode. 0 normal; 1 rx test"); 79 80 // ---------------rfkill--------------------------------------- 81 static bool openwifi_is_radio_enabled(struct openwifi_priv *priv) 82 { 83 int reg; 84 85 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) 86 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 87 else 88 reg = ad9361_get_tx_atten(priv->ad9361_phy, 1); 89 90 if (reg == AD9361_RADIO_ON_TX_ATT) 91 return true;// 0 off, 1 on 92 return false; 93 } 94 95 void openwifi_rfkill_init(struct ieee80211_hw *hw) 96 { 97 struct openwifi_priv *priv = hw->priv; 98 99 priv->rfkill_off = openwifi_is_radio_enabled(priv); 100 printk("%s openwifi_rfkill_init: wireless switch is %s\n", sdr_compatible_str, priv->rfkill_off ? "on" : "off"); 101 wiphy_rfkill_set_hw_state(hw->wiphy, !priv->rfkill_off); 102 wiphy_rfkill_start_polling(hw->wiphy); 103 } 104 105 void openwifi_rfkill_poll(struct ieee80211_hw *hw) 106 { 107 bool enabled; 108 struct openwifi_priv *priv = hw->priv; 109 110 enabled = openwifi_is_radio_enabled(priv); 111 // printk("%s openwifi_rfkill_poll: wireless radio switch turned %s\n", sdr_compatible_str, enabled ? "on" : "off"); 112 if (unlikely(enabled != priv->rfkill_off)) { 113 priv->rfkill_off = enabled; 114 printk("%s openwifi_rfkill_poll: WARNING wireless radio switch turned %s\n", sdr_compatible_str, enabled ? "on" : "off"); 115 wiphy_rfkill_set_hw_state(hw->wiphy, !enabled); 116 } 117 } 118 119 void openwifi_rfkill_exit(struct ieee80211_hw *hw) 120 { 121 printk("%s openwifi_rfkill_exit\n", sdr_compatible_str); 122 wiphy_rfkill_stop_polling(hw->wiphy); 123 } 124 //----------------rfkill end----------------------------------- 125 126 //static void ad9361_rf_init(void); 127 //static void ad9361_rf_stop(void); 128 //static void ad9361_rf_calc_rssi(void); 129 static void ad9361_rf_set_channel(struct ieee80211_hw *dev, 130 struct ieee80211_conf *conf) 131 { 132 struct openwifi_priv *priv = dev->priv; 133 u32 actual_rx_lo = conf->chandef.chan->center_freq - priv->rx_freq_offset_to_lo_MHz + priv->drv_rx_reg_val[DRV_RX_REG_IDX_EXTRA_FO]; 134 u32 actual_tx_lo; 135 bool change_flag = (actual_rx_lo != priv->actual_rx_lo); 136 int static_lbt_th, auto_lbt_th, fpga_lbt_th; 137 138 if (change_flag) { 139 priv->actual_rx_lo = actual_rx_lo; 140 141 actual_tx_lo = conf->chandef.chan->center_freq - priv->tx_freq_offset_to_lo_MHz; 142 143 clk_set_rate(priv->ad9361_phy->clks[RX_RFPLL], ( ((u64)1000000ull)*((u64)actual_rx_lo )>>1) ); 144 clk_set_rate(priv->ad9361_phy->clks[TX_RFPLL], ( ((u64)1000000ull)*((u64)actual_tx_lo )>>1) ); 145 146 if (actual_rx_lo<2412) { 147 priv->rssi_correction = 153; 148 } else if (actual_rx_lo<=2484) { 149 priv->rssi_correction = 153; 150 } else if (actual_rx_lo<5160) { 151 priv->rssi_correction = 153; 152 } else if (actual_rx_lo<=5240) { 153 priv->rssi_correction = 145; 154 } else if (actual_rx_lo<=5320) { 155 priv->rssi_correction = 148; 156 } else { 157 priv->rssi_correction = 148; 158 } 159 160 // xpu_api->XPU_REG_LBT_TH_write((priv->rssi_correction-62)<<1); // -62dBm 161 // xpu_api->XPU_REG_LBT_TH_write((priv->rssi_correction-62-16)<<1); // wei's magic value is 135, here is 134 @ ch 44 162 auto_lbt_th = ((priv->rssi_correction-62-16)<<1); 163 static_lbt_th = priv->drv_xpu_reg_val[DRV_XPU_REG_IDX_LBT_TH]; 164 fpga_lbt_th = (static_lbt_th==0?auto_lbt_th:static_lbt_th); 165 xpu_api->XPU_REG_LBT_TH_write(fpga_lbt_th); 166 167 priv->last_auto_fpga_lbt_th = auto_lbt_th; 168 169 if (actual_rx_lo < 2500) { 170 //priv->slot_time = 20; //20 is default slot time in ERP(OFDM)/11g 2.4G; short one is 9. 171 //xpu_api->XPU_REG_BAND_CHANNEL_write(BAND_2_4GHZ<<16); 172 if (priv->band != BAND_2_4GHZ) { 173 priv->band = BAND_2_4GHZ; 174 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 175 } 176 // //xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((45+2)*10)<<16) | 10 ); // high 16 bits to cover sig valid of ACK packet, low 16 bits is adjustment of fcs valid waiting time. let's add 2us for those device that is really "slow"! 177 // xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((45+2+2)*10)<<16) | 10 );//add 2us for longer fir. BUT corrding to FPGA probing test, we do not need this 178 // xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 0 ); 179 // tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write(((10)*10)<<16); 180 } 181 else { 182 //priv->slot_time = 9; //default slot time of OFDM PHY (OFDM by default means 5GHz) 183 // xpu_api->XPU_REG_BAND_CHANNEL_write(BAND_5_8GHZ<<16); 184 if (priv->band != BAND_5_8GHZ) { 185 priv->band = BAND_5_8GHZ; 186 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 187 } 188 // //xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((51+2)*10)<<16) | 10 ); // because 5GHz needs longer SIFS (16 instead of 10), we need 58 instead of 48 for XPU low mac setting. let's add 2us for those device that is really "slow"! 189 // xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((51+2+2)*10)<<16) | 10 );//add 2us for longer fir. BUT corrding to FPGA probing test, we do not need this 190 // //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 60*10 ); 191 // xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 50*10 );// for longer fir we need this delay 1us shorter 192 // tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write(((16)*10)<<16); 193 } 194 //printk("%s ad9361_rf_set_channel %dM rssi_correction %d\n", sdr_compatible_str,conf->chandef.chan->center_freq,priv->rssi_correction); 195 // //-- use less 196 //clk_prepare_enable(priv->ad9361_phy->clks[RX_RFPLL]); 197 //printk("%s ad9361_rf_set_channel tune to %d read back %llu\n", sdr_compatible_str,conf->chandef.chan->center_freq,2*priv->ad9361_phy->state->current_rx_lo_freq); 198 //ad9361_set_trx_clock_chain_default(priv->ad9361_phy); 199 //printk("%s ad9361_rf_set_channel tune to %d read back %llu\n", sdr_compatible_str,conf->chandef.chan->center_freq,2*priv->ad9361_phy->state->current_rx_lo_freq); 200 printk("%s ad9361_rf_set_channel %dM rssi_correction %d (change flag %d) fpga_lbt_th %d (auto %d static %d)\n", sdr_compatible_str,conf->chandef.chan->center_freq,priv->rssi_correction,change_flag,fpga_lbt_th,auto_lbt_th,static_lbt_th); 201 } 202 } 203 204 const struct openwifi_rf_ops ad9361_rf_ops = { 205 .name = "ad9361", 206 // .init = ad9361_rf_init, 207 // .stop = ad9361_rf_stop, 208 .set_chan = ad9361_rf_set_channel, 209 // .calc_rssi = ad9361_rf_calc_rssi, 210 }; 211 212 u16 reverse16(u16 d) { 213 union u16_byte2 tmp0, tmp1; 214 tmp0.a = d; 215 tmp1.c[0] = tmp0.c[1]; 216 tmp1.c[1] = tmp0.c[0]; 217 return(tmp1.a); 218 } 219 220 u32 reverse32(u32 d) { 221 union u32_byte4 tmp0, tmp1; 222 tmp0.a = d; 223 tmp1.c[0] = tmp0.c[3]; 224 tmp1.c[1] = tmp0.c[2]; 225 tmp1.c[2] = tmp0.c[1]; 226 tmp1.c[3] = tmp0.c[0]; 227 return(tmp1.a); 228 } 229 230 static int openwifi_init_tx_ring(struct openwifi_priv *priv, int ring_idx) 231 { 232 struct openwifi_ring *ring = &(priv->tx_ring[ring_idx]); 233 int i; 234 235 ring->stop_flag = 0; 236 ring->bd_wr_idx = 0; 237 ring->bd_rd_idx = 0; 238 ring->bds = kmalloc(sizeof(struct openwifi_buffer_descriptor)*NUM_TX_BD,GFP_KERNEL); 239 if (ring->bds==NULL) { 240 printk("%s openwifi_init_tx_ring: WARNING Cannot allocate TX ring\n",sdr_compatible_str); 241 return -ENOMEM; 242 } 243 244 for (i = 0; i < NUM_TX_BD; i++) { 245 ring->bds[i].skb_linked=0; // for tx, skb is from upper layer 246 //at first right after skb allocated, head, data, tail are the same. 247 ring->bds[i].dma_mapping_addr = 0; // for tx, mapping is done after skb is received from upper layer in tx routine 248 } 249 250 return 0; 251 } 252 253 static void openwifi_free_tx_ring(struct openwifi_priv *priv, int ring_idx) 254 { 255 struct openwifi_ring *ring = &(priv->tx_ring[ring_idx]); 256 int i; 257 258 ring->stop_flag = 0; 259 ring->bd_wr_idx = 0; 260 ring->bd_rd_idx = 0; 261 for (i = 0; i < NUM_TX_BD; i++) { 262 if (ring->bds[i].skb_linked == 0 && ring->bds[i].dma_mapping_addr == 0) 263 continue; 264 if (ring->bds[i].dma_mapping_addr != 0) 265 dma_unmap_single(priv->tx_chan->device->dev, ring->bds[i].dma_mapping_addr,ring->bds[i].skb_linked->len, DMA_MEM_TO_DEV); 266 // if (ring->bds[i].skb_linked!=NULL) 267 // dev_kfree_skb(ring->bds[i].skb_linked); // only use dev_kfree_skb when there is exception 268 if ( (ring->bds[i].dma_mapping_addr != 0 && ring->bds[i].skb_linked == 0) || 269 (ring->bds[i].dma_mapping_addr == 0 && ring->bds[i].skb_linked != 0)) 270 printk("%s openwifi_free_tx_ring: WARNING ring %d i %d skb_linked %p dma_mapping_addr %08x\n", sdr_compatible_str, 271 ring_idx, i, (void*)(ring->bds[i].skb_linked), (unsigned int)(ring->bds[i].dma_mapping_addr)); 272 273 ring->bds[i].skb_linked=0; 274 ring->bds[i].dma_mapping_addr = 0; 275 } 276 if (ring->bds) 277 kfree(ring->bds); 278 ring->bds = NULL; 279 } 280 281 static int openwifi_init_rx_ring(struct openwifi_priv *priv) 282 { 283 int i; 284 u8 *pdata_tmp; 285 286 priv->rx_cyclic_buf = dma_alloc_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,&priv->rx_cyclic_buf_dma_mapping_addr,GFP_KERNEL); 287 if (!priv->rx_cyclic_buf) { 288 printk("%s openwifi_init_rx_ring: WARNING dma_alloc_coherent failed!\n", sdr_compatible_str); 289 dma_free_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,priv->rx_cyclic_buf,priv->rx_cyclic_buf_dma_mapping_addr); 290 return(-1); 291 } 292 293 // Set tsft_low and tsft_high to 0. If they are not zero, it means there is a packet in the buffer by DMA 294 for (i=0; i<NUM_RX_BD; i++) { 295 pdata_tmp = priv->rx_cyclic_buf + i*RX_BD_BUF_SIZE; // our header insertion is at the beginning 296 (*((u32*)(pdata_tmp+0 ))) = 0; 297 (*((u32*)(pdata_tmp+4 ))) = 0; 298 } 299 printk("%s openwifi_init_rx_ring: tsft_low and tsft_high are cleared!\n", sdr_compatible_str); 300 301 return 0; 302 } 303 304 static void openwifi_free_rx_ring(struct openwifi_priv *priv) 305 { 306 if (priv->rx_cyclic_buf) 307 dma_free_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,priv->rx_cyclic_buf,priv->rx_cyclic_buf_dma_mapping_addr); 308 309 priv->rx_cyclic_buf_dma_mapping_addr = 0; 310 priv->rx_cyclic_buf = 0; 311 } 312 313 static int rx_dma_setup(struct ieee80211_hw *dev){ 314 struct openwifi_priv *priv = dev->priv; 315 struct dma_device *rx_dev = priv->rx_chan->device; 316 317 priv->rxd = rx_dev->device_prep_dma_cyclic(priv->rx_chan,priv->rx_cyclic_buf_dma_mapping_addr,RX_BD_BUF_SIZE*NUM_RX_BD,RX_BD_BUF_SIZE,DMA_DEV_TO_MEM,DMA_CTRL_ACK|DMA_PREP_INTERRUPT); 318 if (!(priv->rxd)) { 319 openwifi_free_rx_ring(priv); 320 printk("%s rx_dma_setup: WARNING rx_dev->device_prep_dma_cyclic %p\n", sdr_compatible_str, (void*)(priv->rxd)); 321 return(-1); 322 } 323 priv->rxd->callback = 0; 324 priv->rxd->callback_param = 0; 325 326 priv->rx_cookie = priv->rxd->tx_submit(priv->rxd); 327 328 if (dma_submit_error(priv->rx_cookie)) { 329 printk("%s rx_dma_setup: WARNING dma_submit_error(rx_cookie) %d\n", sdr_compatible_str, (u32)(priv->rx_cookie)); 330 return(-1); 331 } 332 333 dma_async_issue_pending(priv->rx_chan); 334 return(0); 335 } 336 337 static irqreturn_t openwifi_rx_interrupt(int irq, void *dev_id) 338 { 339 struct ieee80211_hw *dev = dev_id; 340 struct openwifi_priv *priv = dev->priv; 341 struct ieee80211_rx_status rx_status = {0}; 342 struct sk_buff *skb; 343 struct ieee80211_hdr *hdr; 344 u32 addr1_low32=0, addr2_low32=0, addr3_low32=0, len, rate_idx, tsft_low, tsft_high, loop_count=0;//, fc_di; 345 bool ht_flag, short_gi, ht_aggr, ht_aggr_last; 346 // u32 dma_driver_buf_idx_mod; 347 u8 *pdata_tmp, fcs_ok;//, target_buf_idx;//, phy_rx_sn_hw; 348 s8 signal; 349 u16 agc_status_and_pkt_exist_flag, rssi_val, addr1_high16=0, addr2_high16=0, addr3_high16=0, sc=0; 350 bool content_ok = false, len_overflow = false; 351 352 #ifdef USE_NEW_RX_INTERRUPT 353 int i; 354 spin_lock(&priv->lock); 355 for (i=0; i<NUM_RX_BD; i++) { 356 pdata_tmp = priv->rx_cyclic_buf + i*RX_BD_BUF_SIZE; 357 agc_status_and_pkt_exist_flag = (*((u16*)(pdata_tmp+10))); //check rx_intf_pl_to_m_axis.v. FPGA TODO: add pkt exist 1bit flag next to gpio_status_lock_by_sig_valid 358 if ( agc_status_and_pkt_exist_flag==0 ) // no packet in the buffer 359 continue; 360 #else 361 static u8 target_buf_idx_old = 0; 362 spin_lock(&priv->lock); 363 while(1) { // loop all rx buffers that have new rx packets 364 pdata_tmp = priv->rx_cyclic_buf + target_buf_idx_old*RX_BD_BUF_SIZE; // our header insertion is at the beginning 365 agc_status_and_pkt_exist_flag = (*((u16*)(pdata_tmp+10))); 366 if ( agc_status_and_pkt_exist_flag==0 ) // no packet in the buffer 367 break; 368 #endif 369 370 tsft_low = (*((u32*)(pdata_tmp+0 ))); 371 tsft_high = (*((u32*)(pdata_tmp+4 ))); 372 rssi_val = (*((u16*)(pdata_tmp+8 ))); 373 len = (*((u16*)(pdata_tmp+12))); 374 375 len_overflow = (len>(RX_BD_BUF_SIZE-16)?true:false); 376 377 rate_idx = (*((u16*)(pdata_tmp+14))); 378 ht_flag = ((rate_idx&0x10)!=0); 379 short_gi = ((rate_idx&0x20)!=0); 380 ht_aggr = (ht_flag & ((rate_idx&0x40)!=0)); 381 ht_aggr_last = (ht_flag & ((rate_idx&0x80)!=0)); 382 rate_idx = (rate_idx&0x1F); 383 384 fcs_ok = ( len_overflow?0:(*(( u8*)(pdata_tmp+16+len-1))) ); 385 386 //phy_rx_sn_hw = (fcs_ok&(NUM_RX_BD-1)); 387 // phy_rx_sn_hw = (fcs_ok&0x7f);//0x7f is FPGA limitation 388 // dma_driver_buf_idx_mod = (state.residue&0x7f); 389 fcs_ok = ((fcs_ok&0x80)!=0); 390 391 if ( (len>=14 && (!len_overflow)) && (rate_idx>=8 && rate_idx<=23)) { 392 // if ( phy_rx_sn_hw!=dma_driver_buf_idx_mod) { 393 // printk("%s openwifi_rx_interrupt: WARNING sn %d next buf_idx %d!\n", sdr_compatible_str,phy_rx_sn_hw,dma_driver_buf_idx_mod); 394 // } 395 content_ok = true; 396 } else { 397 printk("%s openwifi_rx_interrupt: WARNING content!\n", sdr_compatible_str); 398 content_ok = false; 399 } 400 401 rssi_val = (rssi_val>>1); 402 if ( (rssi_val+128)<priv->rssi_correction ) 403 signal = -128; 404 else 405 signal = rssi_val - priv->rssi_correction; 406 407 // fc_di = (*((u32*)(pdata_tmp+16))); 408 // addr1_high16 = (*((u16*)(pdata_tmp+16+4))); 409 // addr1_low32 = (*((u32*)(pdata_tmp+16+4+2))); 410 // addr2_high16 = (*((u16*)(pdata_tmp+16+6+4))); 411 // addr2_low32 = (*((u32*)(pdata_tmp+16+6+4+2))); 412 // addr3_high16 = (*((u16*)(pdata_tmp+16+12+4))); 413 // addr3_low32 = (*((u32*)(pdata_tmp+16+12+4+2))); 414 if ( (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&2) || ( (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&1) && fcs_ok==0 ) ) { 415 hdr = (struct ieee80211_hdr *)(pdata_tmp+16); 416 addr1_low32 = *((u32*)(hdr->addr1+2)); 417 addr1_high16 = *((u16*)(hdr->addr1)); 418 if (len>=20) { 419 addr2_low32 = *((u32*)(hdr->addr2+2)); 420 addr2_high16 = *((u16*)(hdr->addr2)); 421 } 422 if (len>=26) { 423 addr3_low32 = *((u32*)(hdr->addr3+2)); 424 addr3_high16 = *((u16*)(hdr->addr3)); 425 } 426 if (len>=28) 427 sc = hdr->seq_ctrl; 428 429 if ( (addr1_low32!=0xffffffff || addr1_high16!=0xffff) || (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&4) ) 430 printk("%s openwifi_rx_interrupt:%4dbytes ht%d aggr%d/%d sgi%d %3dM FC%04x DI%04x addr1/2/3:%04x%08x/%04x%08x/%04x%08x SC%04x fcs%d buf_idx%d %ddBm\n", sdr_compatible_str, 431 len, ht_flag, ht_aggr, ht_aggr_last, short_gi, wifi_rate_table[rate_idx], hdr->frame_control, hdr->duration_id, 432 reverse16(addr1_high16), reverse32(addr1_low32), reverse16(addr2_high16), reverse32(addr2_low32), reverse16(addr3_high16), reverse32(addr3_low32), 433 #ifdef USE_NEW_RX_INTERRUPT 434 sc, fcs_ok, i, signal); 435 #else 436 sc, fcs_ok, target_buf_idx_old, signal); 437 #endif 438 } 439 440 // priv->phy_rx_sn_hw_old = phy_rx_sn_hw; 441 if (content_ok) { 442 skb = dev_alloc_skb(len); 443 if (skb) { 444 skb_put_data(skb,pdata_tmp+16,len); 445 446 rx_status.antenna = 0; 447 // def in ieee80211_rate openwifi_rates 0~11. 0~3 11b(1M~11M), 4~11 11a/g(6M~54M) 448 rx_status.rate_idx = wifi_rate_table_mapping[rate_idx]; 449 rx_status.signal = signal; 450 rx_status.freq = dev->conf.chandef.chan->center_freq; 451 rx_status.band = dev->conf.chandef.chan->band; 452 rx_status.mactime = ( ( (u64)tsft_low ) | ( ((u64)tsft_high)<<32 ) ); 453 rx_status.flag |= RX_FLAG_MACTIME_START; 454 if (!fcs_ok) 455 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC; 456 if (rate_idx <= 15) 457 rx_status.encoding = RX_ENC_LEGACY; 458 else 459 rx_status.encoding = RX_ENC_HT; 460 rx_status.bw = RATE_INFO_BW_20; 461 if (short_gi) 462 rx_status.enc_flags |= RX_ENC_FLAG_SHORT_GI; 463 if(ht_aggr) 464 { 465 rx_status.ampdu_reference = priv->ampdu_reference; 466 rx_status.flag |= RX_FLAG_AMPDU_DETAILS | RX_FLAG_AMPDU_LAST_KNOWN; 467 if (ht_aggr_last) 468 rx_status.flag |= RX_FLAG_AMPDU_IS_LAST; 469 } 470 471 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status)); // put rx_status into skb->cb, from now on skb->cb is not dma_dsts any more. 472 ieee80211_rx_irqsafe(dev, skb); // call mac80211 function 473 } else 474 printk("%s openwifi_rx_interrupt: WARNING dev_alloc_skb failed!\n", sdr_compatible_str); 475 476 if(ht_aggr_last) 477 priv->ampdu_reference++; 478 } 479 (*((u16*)(pdata_tmp+10))) = 0; // clear the field (set by rx_intf_pl_to_m_axis.v) to indicate the packet has been processed 480 loop_count++; 481 #ifndef USE_NEW_RX_INTERRUPT 482 target_buf_idx_old=((target_buf_idx_old+1)&(NUM_RX_BD-1)); 483 #endif 484 } 485 486 if ( loop_count!=1 && (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&1) ) 487 printk("%s openwifi_rx_interrupt: WARNING loop_count %d\n", sdr_compatible_str,loop_count); 488 489 // openwifi_rx_interrupt_out: 490 spin_unlock(&priv->lock); 491 return IRQ_HANDLED; 492 } 493 494 static irqreturn_t openwifi_tx_interrupt(int irq, void *dev_id) 495 { 496 struct ieee80211_hw *dev = dev_id; 497 struct openwifi_priv *priv = dev->priv; 498 struct openwifi_ring *ring; 499 struct sk_buff *skb; 500 struct ieee80211_tx_info *info; 501 u32 reg_val, hw_queue_len, prio, queue_idx, dma_fifo_no_room_flag, num_slot_random, cw, loop_count=0;//, i; 502 u8 tx_result_report; 503 // u16 prio_rd_idx_store[64]={0}; 504 505 spin_lock(&priv->lock); 506 507 while(1) { // loop all packets that have been sent by FPGA 508 reg_val = tx_intf_api->TX_INTF_REG_PKT_INFO_read(); 509 if (reg_val!=0xFFFFFFFF) { 510 prio = ((0x7FFFF & reg_val)>>(5+NUM_BIT_MAX_PHY_TX_SN+NUM_BIT_MAX_NUM_HW_QUEUE)); 511 cw = ((0xF0000000 & reg_val) >> 28); 512 num_slot_random = ((0xFF80000 ®_val)>>(2+5+NUM_BIT_MAX_PHY_TX_SN+NUM_BIT_MAX_NUM_HW_QUEUE)); 513 if(cw > 10) { 514 cw = 10 ; 515 num_slot_random += 512 ; 516 } 517 518 ring = &(priv->tx_ring[prio]); 519 ring->bd_rd_idx = ((reg_val>>5)&MAX_PHY_TX_SN); 520 skb = ring->bds[ring->bd_rd_idx].skb_linked; 521 522 dma_unmap_single(priv->tx_chan->device->dev,ring->bds[ring->bd_rd_idx].dma_mapping_addr, 523 skb->len, DMA_MEM_TO_DEV); 524 525 if ( ring->stop_flag == 1) { 526 // Wake up Linux queue if FPGA and driver ring have room 527 queue_idx = ((reg_val>>(5+NUM_BIT_MAX_PHY_TX_SN))&(MAX_NUM_HW_QUEUE-1)); 528 dma_fifo_no_room_flag = tx_intf_api->TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read(); 529 hw_queue_len = tx_intf_api->TX_INTF_REG_QUEUE_FIFO_DATA_COUNT_read(); 530 531 // printk("%s openwifi_tx_interrupt: WARNING loop %d prio %d queue %d no room flag %x hw queue len %08x wr %d rd %d call %d\n", sdr_compatible_str, 532 // loop_count, prio, queue_idx, dma_fifo_no_room_flag, hw_queue_len, ring->bd_wr_idx, ring->bd_rd_idx, priv->call_counter); 533 534 if ( ((dma_fifo_no_room_flag>>queue_idx)&1)==0 && (NUM_TX_BD-((hw_queue_len>>(queue_idx*8))&0xFF))>=RING_ROOM_THRESHOLD ) { 535 // printk("%s openwifi_tx_interrupt: WARNING ieee80211_wake_queue loop %d call %d\n", sdr_compatible_str, loop_count, priv->call_counter); 536 printk("%s openwifi_tx_interrupt: WARNING ieee80211_wake_queue prio %d queue %d no room flag %x hw queue len %08x wr %d rd %d\n", sdr_compatible_str, 537 prio, queue_idx, dma_fifo_no_room_flag, hw_queue_len, ring->bd_wr_idx, ring->bd_rd_idx); 538 ieee80211_wake_queue(dev, prio); 539 ring->stop_flag = 0; 540 } 541 } 542 543 if ( (*(u32*)(&(skb->data[4]))) || ((*(u32*)(&(skb->data[12])))&0xFFFF0000) ) { 544 printk("%s openwifi_tx_interrupt: WARNING %08x %08x %08x %08x\n", sdr_compatible_str, *(u32*)(&(skb->data[12])), *(u32*)(&(skb->data[8])), *(u32*)(&(skb->data[4])), *(u32*)(&(skb->data[0]))); 545 continue; 546 } 547 548 skb_pull(skb, LEN_PHY_HEADER); 549 //skb_trim(skb, num_byte_pad_skb); 550 info = IEEE80211_SKB_CB(skb); 551 ieee80211_tx_info_clear_status(info); 552 553 tx_result_report = (reg_val&0x1F); 554 if ( !(info->flags & IEEE80211_TX_CTL_NO_ACK) ) { 555 if ((tx_result_report&0x10)==0) 556 info->flags |= IEEE80211_TX_STAT_ACK; 557 558 // printk("%s openwifi_tx_interrupt: rate&try: %d %d %03x; %d %d %03x; %d %d %03x; %d %d %03x\n", sdr_compatible_str, 559 // info->status.rates[0].idx,info->status.rates[0].count,info->status.rates[0].flags, 560 // info->status.rates[1].idx,info->status.rates[1].count,info->status.rates[1].flags, 561 // info->status.rates[2].idx,info->status.rates[2].count,info->status.rates[2].flags, 562 // info->status.rates[3].idx,info->status.rates[3].count,info->status.rates[3].flags); 563 } 564 565 info->status.rates[0].count = (tx_result_report&0xF) + 1; //according to our test, the 1st rate is the most important. we only do retry on the 1st rate 566 info->status.rates[1].idx = -1; 567 info->status.rates[2].idx = -1; 568 info->status.rates[3].idx = -1;//in mac80211.h: #define IEEE80211_TX_MAX_RATES 4 569 570 if ( (tx_result_report&0x10) && ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&1) ) 571 printk("%s openwifi_tx_interrupt: WARNING tx_result %02x prio%d wr%d rd%d\n", sdr_compatible_str, tx_result_report, prio, ring->bd_wr_idx, ring->bd_rd_idx); 572 if ( ( (!(info->flags & IEEE80211_TX_CTL_NO_ACK))||(priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG]&4) ) && ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&2) ) 573 printk("%s openwifi_tx_interrupt: tx_result %02x prio%d wr%d rd%d num_rand_slot %d cw %d \n", sdr_compatible_str, tx_result_report, prio, ring->bd_wr_idx, ring->bd_rd_idx, num_slot_random,cw); 574 575 ieee80211_tx_status_irqsafe(dev, skb); 576 577 loop_count++; 578 579 // printk("%s openwifi_tx_interrupt: loop %d prio %d rd %d\n", sdr_compatible_str, loop_count, prio, ring->bd_rd_idx); 580 581 } else 582 break; 583 } 584 if ( loop_count!=1 && ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&1) ) 585 printk("%s openwifi_tx_interrupt: WARNING loop_count %d\n", sdr_compatible_str, loop_count); 586 587 spin_unlock(&priv->lock); 588 return IRQ_HANDLED; 589 } 590 591 u32 gen_parity(u32 v){ 592 v ^= v >> 1; 593 v ^= v >> 2; 594 v = (v & 0x11111111U) * 0x11111111U; 595 return (v >> 28) & 1; 596 } 597 598 u8 gen_ht_sig_crc(u64 m) 599 { 600 u8 i, temp, c[8] = {1, 1, 1, 1, 1, 1, 1, 1}, ht_sig_crc; 601 602 for (i = 0; i < 34; i++) 603 { 604 temp = c[7] ^ ((m >> i) & 0x01); 605 606 c[7] = c[6]; 607 c[6] = c[5]; 608 c[5] = c[4]; 609 c[4] = c[3]; 610 c[3] = c[2]; 611 c[2] = c[1] ^ temp; 612 c[1] = c[0] ^ temp; 613 c[0] = temp; 614 } 615 ht_sig_crc = ((~c[7] & 0x01) << 0) | ((~c[6] & 0x01) << 1) | ((~c[5] & 0x01) << 2) | ((~c[4] & 0x01) << 3) | ((~c[3] & 0x01) << 4) | ((~c[2] & 0x01) << 5) | ((~c[1] & 0x01) << 6) | ((~c[0] & 0x01) << 7); 616 617 return ht_sig_crc; 618 } 619 620 u32 calc_phy_header(u8 rate_hw_value, bool use_ht_rate, bool use_short_gi, u32 len, u8 *bytes){ 621 //u32 signal_word = 0 ; 622 u8 SIG_RATE = 0, HT_SIG_RATE; 623 u8 len_2to0, len_10to3, len_msb,b0,b1,b2, header_parity ; 624 u32 l_len, ht_len, ht_sig1, ht_sig2; 625 626 // printk("rate_hw_value=%u\tuse_ht_rate=%u\tuse_short_gi=%u\tlen=%u\n", rate_hw_value, use_ht_rate, use_short_gi, len); 627 628 // HT-mixed mode ht signal 629 630 if(use_ht_rate) 631 { 632 SIG_RATE = wifi_mcs_table_11b_force_up[4]; 633 HT_SIG_RATE = rate_hw_value; 634 l_len = 24 * len / wifi_n_dbps_ht_table[rate_hw_value]; 635 ht_len = len; 636 } 637 else 638 { 639 // rate_hw_value = (rate_hw_value<=4?0:(rate_hw_value-4)); 640 // SIG_RATE = wifi_mcs_table_phy_tx[rate_hw_value]; 641 SIG_RATE = wifi_mcs_table_11b_force_up[rate_hw_value]; 642 l_len = len; 643 } 644 645 len_2to0 = l_len & 0x07 ; 646 len_10to3 = (l_len >> 3 ) & 0xFF ; 647 len_msb = (l_len >> 11) & 0x01 ; 648 649 b0=SIG_RATE | (len_2to0 << 5) ; 650 b1 = len_10to3 ; 651 header_parity = gen_parity((len_msb << 16)| (b1<<8) | b0) ; 652 b2 = ( len_msb | (header_parity << 1) ) ; 653 654 memset(bytes,0,16); 655 bytes[0] = b0 ; 656 bytes[1] = b1 ; 657 bytes[2] = b2; 658 659 // HT-mixed mode signal 660 if(use_ht_rate) 661 { 662 ht_sig1 = (HT_SIG_RATE & 0x7F) | ((ht_len << 8) & 0xFFFF00); 663 ht_sig2 = 0x04 | (use_short_gi << 7); 664 ht_sig2 = ht_sig2 | (gen_ht_sig_crc(ht_sig1 | ht_sig2 << 24) << 10); 665 666 bytes[3] = 1; 667 bytes[8] = (ht_sig1 & 0xFF); 668 bytes[9] = (ht_sig1 >> 8) & 0xFF; 669 bytes[10] = (ht_sig1 >> 16) & 0xFF; 670 bytes[11] = (ht_sig2 & 0xFF); 671 bytes[12] = (ht_sig2 >> 8) & 0xFF; 672 bytes[13] = (ht_sig2 >> 16) & 0xFF; 673 674 return(HT_SIG_RATE); 675 } 676 else 677 { 678 //signal_word = b0+(b1<<8)+(b2<<16) ; 679 //return signal_word; 680 return(SIG_RATE); 681 } 682 } 683 684 static inline struct gpio_led_data * //please align with the implementation in leds-gpio.c 685 cdev_to_gpio_led_data(struct led_classdev *led_cdev) 686 { 687 return container_of(led_cdev, struct gpio_led_data, cdev); 688 } 689 690 static void openwifi_tx(struct ieee80211_hw *dev, 691 struct ieee80211_tx_control *control, 692 struct sk_buff *skb) 693 { 694 struct openwifi_priv *priv = dev->priv; 695 unsigned long flags; 696 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 697 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 698 struct openwifi_ring *ring; 699 dma_addr_t dma_mapping_addr; 700 unsigned int prio, i; 701 u32 num_dma_symbol, len_mac_pdu, num_dma_byte, len_phy_packet, num_byte_pad; 702 u32 rate_signal_value,rate_hw_value,ack_flag; 703 u32 pkt_need_ack, addr1_low32=0, addr2_low32=0, addr3_low32=0, queue_idx=2, dma_reg, cts_reg;//, openofdm_state_history; 704 u16 addr1_high16=0, addr2_high16=0, addr3_high16=0, sc=0, cts_duration=0, cts_rate_hw_value = 0, cts_rate_signal_value=0, sifs, ack_duration=0, traffic_pkt_duration; 705 u8 fc_flag,fc_type,fc_subtype,retry_limit_raw,*dma_buf,retry_limit_hw_value,rc_flags; 706 bool use_rts_cts, use_cts_protect, use_ht_rate=false, use_short_gi, addr_flag, cts_use_traffic_rate=false, force_use_cts_protect=false; 707 __le16 frame_control,duration_id; 708 u32 dma_fifo_no_room_flag, hw_queue_len; 709 enum dma_status status; 710 // static bool led_status=0; 711 // struct gpio_led_data *led_dat = cdev_to_gpio_led_data(priv->led[3]); 712 713 // if ( (priv->phy_tx_sn&7) ==0 ) { 714 // openofdm_state_history = openofdm_rx_api->OPENOFDM_RX_REG_STATE_HISTORY_read(); 715 // if (openofdm_state_history!=openofdm_state_history_old){ 716 // led_status = (~led_status); 717 // openofdm_state_history_old = openofdm_state_history; 718 // gpiod_set_value(led_dat->gpiod, led_status); 719 // } 720 // } 721 722 if (test_mode==1){ 723 printk("%s openwifi_tx: WARNING test_mode==1\n", sdr_compatible_str); 724 goto openwifi_tx_early_out; 725 } 726 727 if (skb->data_len>0) {// more data are not in linear data area skb->data 728 printk("%s openwifi_tx: WARNING skb->data_len>0\n", sdr_compatible_str); 729 goto openwifi_tx_early_out; 730 } 731 732 len_mac_pdu = skb->len; 733 len_phy_packet = len_mac_pdu + LEN_PHY_HEADER; 734 num_dma_symbol = (len_phy_packet>>TX_INTF_NUM_BYTE_PER_DMA_SYMBOL_IN_BITS) + ((len_phy_packet&(TX_INTF_NUM_BYTE_PER_DMA_SYMBOL-1))!=0); 735 736 // get Linux priority/queue setting info and target mac address 737 prio = skb_get_queue_mapping(skb); 738 addr1_low32 = *((u32*)(hdr->addr1+2)); 739 ring = &(priv->tx_ring[prio]); 740 741 // -------------- DO your idea here! Map Linux/SW "prio" to hardware "queue_idx" ----------- 742 if (priv->slice_idx == 0xFFFFFFFF) {// use Linux default prio setting, if there isn't any slice config 743 queue_idx = prio; 744 } else {// customized prio to queue_idx mapping 745 //if (fc_type==2 && fc_subtype==0 && (!addr_flag)) { // for unicast data packet only 746 // check current packet belonging to which slice/hw-queue 747 for (i=0; i<MAX_NUM_HW_QUEUE; i++) { 748 if ( priv->dest_mac_addr_queue_map[i] == addr1_low32 ) { 749 break; 750 } 751 } 752 //} 753 queue_idx = (i>=MAX_NUM_HW_QUEUE?2:i); // if no address is hit, use FPGA queue 2. because the queue 2 is the longest. 754 } 755 // -------------------- end of Map Linux/SW "prio" to hardware "queue_idx" ------------------ 756 757 // check whether the packet is bigger than DMA buffer size 758 num_dma_byte = (num_dma_symbol<<TX_INTF_NUM_BYTE_PER_DMA_SYMBOL_IN_BITS); 759 if (num_dma_byte > TX_BD_BUF_SIZE) { 760 // dev_err(priv->tx_chan->device->dev, "sdr,sdr openwifi_tx: WARNING num_dma_byte > TX_BD_BUF_SIZE\n"); 761 printk("%s openwifi_tx: WARNING sn %d num_dma_byte > TX_BD_BUF_SIZE\n", sdr_compatible_str, ring->bd_wr_idx); 762 goto openwifi_tx_early_out; 763 } 764 num_byte_pad = num_dma_byte-len_phy_packet; 765 766 // get other info from packet header 767 addr1_high16 = *((u16*)(hdr->addr1)); 768 if (len_mac_pdu>=20) { 769 addr2_low32 = *((u32*)(hdr->addr2+2)); 770 addr2_high16 = *((u16*)(hdr->addr2)); 771 } 772 if (len_mac_pdu>=26) { 773 addr3_low32 = *((u32*)(hdr->addr3+2)); 774 addr3_high16 = *((u16*)(hdr->addr3)); 775 } 776 777 duration_id = hdr->duration_id; 778 frame_control=hdr->frame_control; 779 ack_flag = (info->flags&IEEE80211_TX_CTL_NO_ACK); 780 fc_type = ((frame_control)>>2)&3; 781 fc_subtype = ((frame_control)>>4)&0xf; 782 fc_flag = ( fc_type==2 || fc_type==0 || (fc_type==1 && (fc_subtype==8 || fc_subtype==9 || fc_subtype==10) ) ); 783 //if it is broadcasting or multicasting addr 784 addr_flag = ( (addr1_low32==0 && addr1_high16==0) || 785 (addr1_low32==0xFFFFFFFF && addr1_high16==0xFFFF) || 786 (addr1_high16==0x3333) || 787 (addr1_high16==0x0001 && hdr->addr1[2]==0x5E) ); 788 if ( fc_flag && ( !addr_flag ) && (!ack_flag) ) { // unicast data frame 789 pkt_need_ack = 1; //FPGA need to wait ACK after this pkt sent 790 } else { 791 pkt_need_ack = 0; 792 } 793 794 // get Linux rate (MCS) setting 795 rate_hw_value = ieee80211_get_tx_rate(dev, info)->hw_value; 796 //rate_hw_value = 10; //4:6M, 5:9M, 6:12M, 7:18M, 8:24M, 9:36M, 10:48M, 11:54M 797 if (priv->drv_tx_reg_val[DRV_TX_REG_IDX_RATE]>0 && fc_type==2 && (!addr_flag)) //rate override command 798 rate_hw_value = priv->drv_tx_reg_val[DRV_TX_REG_IDX_RATE]; 799 800 retry_limit_raw = info->control.rates[0].count; 801 802 rc_flags = info->control.rates[0].flags; 803 use_rts_cts = ((rc_flags&IEEE80211_TX_RC_USE_RTS_CTS)!=0); 804 use_cts_protect = ((rc_flags&IEEE80211_TX_RC_USE_CTS_PROTECT)!=0); 805 use_ht_rate = ((rc_flags&IEEE80211_TX_RC_MCS)!=0); 806 use_short_gi = ((rc_flags&IEEE80211_TX_RC_SHORT_GI)!=0); 807 808 if (use_rts_cts) 809 printk("%s openwifi_tx: WARNING sn %d use_rts_cts is not supported!\n", sdr_compatible_str, ring->bd_wr_idx); 810 811 if (use_cts_protect) { 812 cts_rate_hw_value = ieee80211_get_rts_cts_rate(dev, info)->hw_value; 813 cts_duration = le16_to_cpu(ieee80211_ctstoself_duration(dev,info->control.vif,len_mac_pdu,info)); 814 } else if (force_use_cts_protect) { // could override mac80211 setting here. 815 cts_rate_hw_value = 4; //wifi_mcs_table_11b_force_up[] translate it to 1011(6M) 816 sifs = (priv->actual_rx_lo<2500?10:16); 817 if (pkt_need_ack) 818 ack_duration = 44;//assume the ack we wait use 6Mbps: 4*ceil((22+14*8)/24) + 20(preamble+SIGNAL) 819 traffic_pkt_duration = 20 + 4*(((22+len_mac_pdu*8)/wifi_n_dbps_table[rate_hw_value])+1); 820 cts_duration = traffic_pkt_duration + sifs + pkt_need_ack*(sifs+ack_duration); 821 } 822 823 // this is 11b stuff 824 // if (info->flags&IEEE80211_TX_RC_USE_SHORT_PREAMBLE) 825 // printk("%s openwifi_tx: WARNING IEEE80211_TX_RC_USE_SHORT_PREAMBLE\n", sdr_compatible_str); 826 827 if (len_mac_pdu>=28) { 828 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { 829 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) 830 priv->seqno += 0x10; 831 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); 832 hdr->seq_ctrl |= cpu_to_le16(priv->seqno); 833 } 834 sc = hdr->seq_ctrl; 835 } 836 837 if ( ( (!addr_flag)||(priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG]&4) ) && (priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG]&2) ) 838 printk("%s openwifi_tx: %4dbytes ht%d %3dM FC%04x DI%04x addr1/2/3:%04x%08x/%04x%08x/%04x%08x SC%04x flag%08x retr%d ack%d prio%d q%d wr%d rd%d\n", sdr_compatible_str, 839 len_mac_pdu, (use_ht_rate == false ? 0 : 1), (use_ht_rate == false ? wifi_rate_all[rate_hw_value] : wifi_rate_all[rate_hw_value + 12]),frame_control,duration_id, 840 reverse16(addr1_high16), reverse32(addr1_low32), reverse16(addr2_high16), reverse32(addr2_low32), reverse16(addr3_high16), reverse32(addr3_low32), 841 sc, info->flags, retry_limit_raw, pkt_need_ack, prio, queue_idx, 842 // use_rts_cts,use_cts_protect|force_use_cts_protect,wifi_rate_all[cts_rate_hw_value],cts_duration, 843 ring->bd_wr_idx,ring->bd_rd_idx); 844 845 // printk("%s openwifi_tx: rate&try: %d %d %03x; %d %d %03x; %d %d %03x; %d %d %03x\n", sdr_compatible_str, 846 // info->status.rates[0].idx,info->status.rates[0].count,info->status.rates[0].flags, 847 // info->status.rates[1].idx,info->status.rates[1].count,info->status.rates[1].flags, 848 // info->status.rates[2].idx,info->status.rates[2].count,info->status.rates[2].flags, 849 // info->status.rates[3].idx,info->status.rates[3].count,info->status.rates[3].flags); 850 851 // -----------end of preprocess some info from header and skb---------------- 852 853 // /* HW will perform RTS-CTS when only RTS flags is set. 854 // * HW will perform CTS-to-self when both RTS and CTS flags are set. 855 // * RTS rate and RTS duration will be used also for CTS-to-self. 856 // */ 857 // if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) { 858 // tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; 859 // rts_duration = ieee80211_rts_duration(dev, priv->vif[0], // assume all vif have the same config 860 // len_mac_pdu, info); 861 // printk("%s openwifi_tx: rc_flags & IEEE80211_TX_RC_USE_RTS_CTS\n", sdr_compatible_str); 862 // } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { 863 // tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; 864 // rts_duration = ieee80211_ctstoself_duration(dev, priv->vif[0], // assume all vif have the same config 865 // len_mac_pdu, info); 866 // printk("%s openwifi_tx: rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT\n", sdr_compatible_str); 867 // } 868 869 // when skb does not have enough headroom, skb_push will cause kernel panic. headroom needs to be extended if necessary 870 if (skb_headroom(skb)<LEN_PHY_HEADER) { 871 struct sk_buff *skb_new; // in case original skb headroom is not enough to host phy header needed by FPGA IP core 872 printk("%s openwifi_tx: WARNING sn %d skb_headroom(skb)<LEN_PHY_HEADER\n", sdr_compatible_str, ring->bd_wr_idx); 873 if ((skb_new = skb_realloc_headroom(skb, LEN_PHY_HEADER)) == NULL) { 874 printk("%s openwifi_tx: WARNING sn %d skb_realloc_headroom failed!\n", sdr_compatible_str, ring->bd_wr_idx); 875 goto openwifi_tx_early_out; 876 } 877 if (skb->sk != NULL) 878 skb_set_owner_w(skb_new, skb->sk); 879 dev_kfree_skb(skb); 880 skb = skb_new; 881 } 882 883 skb_push( skb, LEN_PHY_HEADER ); 884 rate_signal_value = calc_phy_header(rate_hw_value, use_ht_rate, use_short_gi, len_mac_pdu+LEN_PHY_CRC, skb->data); //fill the phy header 885 886 //make sure dma length is integer times of DDC_NUM_BYTE_PER_DMA_SYMBOL 887 if (skb_tailroom(skb)<num_byte_pad) { 888 printk("%s openwifi_tx: WARNING sn %d skb_tailroom(skb)<num_byte_pad!\n", sdr_compatible_str, ring->bd_wr_idx); 889 // skb_pull(skb, LEN_PHY_HEADER); 890 goto openwifi_tx_early_out; 891 } 892 skb_put( skb, num_byte_pad ); 893 894 retry_limit_hw_value = ( retry_limit_raw==0?0:((retry_limit_raw - 1)&0xF) ); 895 dma_buf = skb->data; 896 897 cts_rate_signal_value = wifi_mcs_table_11b_force_up[cts_rate_hw_value]; 898 cts_reg = (((use_cts_protect|force_use_cts_protect)<<31)|(cts_use_traffic_rate<<30)|(cts_duration<<8)|(cts_rate_signal_value<<4)|rate_signal_value); 899 dma_reg = ( (( ((prio<<(NUM_BIT_MAX_NUM_HW_QUEUE+NUM_BIT_MAX_PHY_TX_SN))|(ring->bd_wr_idx<<NUM_BIT_MAX_NUM_HW_QUEUE)|queue_idx) )<<18)|(retry_limit_hw_value<<14)|(pkt_need_ack<<13)|num_dma_symbol ); 900 901 /* We must be sure that tx_flags is written last because the HW 902 * looks at it to check if the rest of data is valid or not 903 */ 904 //wmb(); 905 // entry->flags = cpu_to_le32(tx_flags); 906 /* We must be sure this has been written before following HW 907 * register write, because this write will make the HW attempts 908 * to DMA the just-written data 909 */ 910 //wmb(); 911 912 spin_lock_irqsave(&priv->lock, flags); // from now on, we'd better avoid interrupt because ring->stop_flag is shared with interrupt 913 914 // -------------check whether FPGA dma fifo and queue (queue_idx) has enough room------------- 915 dma_fifo_no_room_flag = tx_intf_api->TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read(); 916 hw_queue_len = tx_intf_api->TX_INTF_REG_QUEUE_FIFO_DATA_COUNT_read(); 917 if ( ((dma_fifo_no_room_flag>>queue_idx)&1) || ((NUM_TX_BD-((hw_queue_len>>(queue_idx*8))&0xFF))<RING_ROOM_THRESHOLD) || ring->stop_flag==1 ) { 918 ieee80211_stop_queue(dev, prio); // here we should stop those prio related to the queue idx flag set in TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read 919 printk("%s openwifi_tx: WARNING ieee80211_stop_queue prio %d queue %d no room flag %x hw queue len %08x request %d wr %d rd %d\n", sdr_compatible_str, 920 prio, queue_idx, dma_fifo_no_room_flag, hw_queue_len, num_dma_symbol, ring->bd_wr_idx, ring->bd_rd_idx); 921 ring->stop_flag = 1; 922 goto openwifi_tx_early_out_after_lock; 923 } 924 // --------end of check whether FPGA fifo (queue_idx) has enough room------------ 925 926 status = dma_async_is_tx_complete(priv->tx_chan, priv->tx_cookie, NULL, NULL); 927 if (status!=DMA_COMPLETE) { 928 printk("%s openwifi_tx: WARNING status!=DMA_COMPLETE\n", sdr_compatible_str); 929 goto openwifi_tx_early_out_after_lock; 930 } 931 932 if ( (*(u32*)(&(skb->data[4]))) || ((*(u32*)(&(skb->data[12])))&0xFFFF0000) ) { 933 printk("%s openwifi_tx: WARNING 1 %d %08x %08x %08x %08x\n", sdr_compatible_str, num_byte_pad, *(u32*)(&(skb->data[12])), *(u32*)(&(skb->data[8])), *(u32*)(&(skb->data[4])), *(u32*)(&(skb->data[0]))); 934 goto openwifi_tx_early_out_after_lock; 935 } 936 937 //-------------------------fire skb DMA to hardware---------------------------------- 938 dma_mapping_addr = dma_map_single(priv->tx_chan->device->dev, dma_buf, 939 num_dma_byte, DMA_MEM_TO_DEV); 940 941 if (dma_mapping_error(priv->tx_chan->device->dev,dma_mapping_addr)) { 942 // dev_err(priv->tx_chan->device->dev, "sdr,sdr openwifi_tx: WARNING TX DMA mapping error\n"); 943 printk("%s openwifi_tx: WARNING sn %d TX DMA mapping error\n", sdr_compatible_str, ring->bd_wr_idx); 944 goto openwifi_tx_early_out_after_lock; 945 } 946 947 sg_init_table(&(priv->tx_sg), 1); // only need to be initialized once in openwifi_start 948 sg_dma_address( &(priv->tx_sg) ) = dma_mapping_addr; 949 sg_dma_len( &(priv->tx_sg) ) = num_dma_byte; 950 951 tx_intf_api->TX_INTF_REG_CTS_TOSELF_CONFIG_write(cts_reg); 952 tx_intf_api->TX_INTF_REG_NUM_DMA_SYMBOL_TO_PL_write(dma_reg); 953 priv->txd = priv->tx_chan->device->device_prep_slave_sg(priv->tx_chan, &(priv->tx_sg),1,DMA_MEM_TO_DEV, DMA_CTRL_ACK | DMA_PREP_INTERRUPT, NULL); 954 if (!(priv->txd)) { 955 printk("%s openwifi_tx: WARNING sn %d device_prep_slave_sg %p\n", sdr_compatible_str, ring->bd_wr_idx, (void*)(priv->txd)); 956 goto openwifi_tx_after_dma_mapping; 957 } 958 959 priv->tx_cookie = priv->txd->tx_submit(priv->txd); 960 961 if (dma_submit_error(priv->tx_cookie)) { 962 printk("%s openwifi_tx: WARNING sn %d dma_submit_error(tx_cookie) %d\n", sdr_compatible_str, ring->bd_wr_idx, (u32)(priv->tx_cookie)); 963 goto openwifi_tx_after_dma_mapping; 964 } 965 966 // seems everything is ok. let's mark this pkt in bd descriptor ring 967 ring->bds[ring->bd_wr_idx].skb_linked = skb; 968 ring->bds[ring->bd_wr_idx].dma_mapping_addr = dma_mapping_addr; 969 970 ring->bd_wr_idx = ((ring->bd_wr_idx+1)&(NUM_TX_BD-1)); 971 972 dma_async_issue_pending(priv->tx_chan); 973 974 if ( (*(u32*)(&(skb->data[4]))) || ((*(u32*)(&(skb->data[12])))&0xFFFF0000) ) 975 printk("%s openwifi_tx: WARNING 2 %08x %08x %08x %08x\n", sdr_compatible_str, *(u32*)(&(skb->data[12])), *(u32*)(&(skb->data[8])), *(u32*)(&(skb->data[4])), *(u32*)(&(skb->data[0]))); 976 977 spin_unlock_irqrestore(&priv->lock, flags); 978 979 return; 980 981 openwifi_tx_after_dma_mapping: 982 dma_unmap_single(priv->tx_chan->device->dev, dma_mapping_addr, num_dma_byte, DMA_MEM_TO_DEV); 983 984 openwifi_tx_early_out_after_lock: 985 // skb_pull(skb, LEN_PHY_HEADER); 986 dev_kfree_skb(skb); 987 spin_unlock_irqrestore(&priv->lock, flags); 988 // printk("%s openwifi_tx: WARNING openwifi_tx_after_dma_mapping phy_tx_sn %d queue %d\n", sdr_compatible_str,priv->phy_tx_sn,queue_idx); 989 return; 990 991 openwifi_tx_early_out: 992 dev_kfree_skb(skb); 993 // printk("%s openwifi_tx: WARNING openwifi_tx_early_out phy_tx_sn %d queue %d\n", sdr_compatible_str,priv->phy_tx_sn,queue_idx); 994 } 995 996 static int openwifi_start(struct ieee80211_hw *dev) 997 { 998 struct openwifi_priv *priv = dev->priv; 999 int ret, i, rssi_half_db_offset, agc_gain_delay;//rssi_half_db_th, 1000 u32 reg; 1001 1002 for (i=0; i<MAX_NUM_VIF; i++) { 1003 priv->vif[i] = NULL; 1004 } 1005 1006 memset(priv->drv_tx_reg_val, 0, sizeof(priv->drv_tx_reg_val)); 1007 memset(priv->drv_rx_reg_val, 0, sizeof(priv->drv_rx_reg_val)); 1008 memset(priv->drv_xpu_reg_val, 0, sizeof(priv->drv_xpu_reg_val)); 1009 priv->drv_xpu_reg_val[DRV_XPU_REG_IDX_GIT_REV] = GIT_REV; 1010 1011 //turn on radio 1012 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) { 1013 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, false, true, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 1014 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 1015 } else { 1016 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, true, false, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 1017 reg = ad9361_get_tx_atten(priv->ad9361_phy, 1); 1018 } 1019 if (reg == AD9361_RADIO_ON_TX_ATT) { 1020 priv->rfkill_off = 1;// 0 off, 1 on 1021 printk("%s openwifi_start: rfkill radio on\n",sdr_compatible_str); 1022 } 1023 else 1024 printk("%s openwifi_start: WARNING rfkill radio on failed. tx att read %d require %d\n",sdr_compatible_str, reg, AD9361_RADIO_ON_TX_ATT); 1025 1026 if (priv->rx_intf_cfg == RX_INTF_BW_20MHZ_AT_0MHZ_ANT0) 1027 priv->ctrl_out.index=0x16; 1028 else 1029 priv->ctrl_out.index=0x17; 1030 1031 ret = ad9361_ctrl_outs_setup(priv->ad9361_phy, &(priv->ctrl_out)); 1032 if (ret < 0) { 1033 printk("%s openwifi_start: WARNING ad9361_ctrl_outs_setup %d\n",sdr_compatible_str, ret); 1034 } else { 1035 printk("%s openwifi_start: ad9361_ctrl_outs_setup en_mask 0x%02x index 0x%02x\n",sdr_compatible_str, priv->ctrl_out.en_mask, priv->ctrl_out.index); 1036 } 1037 1038 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1039 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1040 1041 rx_intf_api->hw_init(priv->rx_intf_cfg,8,8); 1042 tx_intf_api->hw_init(priv->tx_intf_cfg,8,8,priv->fpga_type); 1043 openofdm_tx_api->hw_init(priv->openofdm_tx_cfg); 1044 openofdm_rx_api->hw_init(priv->openofdm_rx_cfg); 1045 xpu_api->hw_init(priv->xpu_cfg); 1046 1047 agc_gain_delay = 50; //samples 1048 rssi_half_db_offset = 150; // to be consistent 1049 xpu_api->XPU_REG_RSSI_DB_CFG_write(0x80000000|((rssi_half_db_offset<<16)|agc_gain_delay) ); 1050 xpu_api->XPU_REG_RSSI_DB_CFG_write((~0x80000000)&((rssi_half_db_offset<<16)|agc_gain_delay) ); 1051 1052 openofdm_rx_api->OPENOFDM_RX_REG_POWER_THRES_write(0); 1053 // rssi_half_db_th = 87<<1; // -62dBm // will setup in runtime in _rf_set_channel 1054 // xpu_api->XPU_REG_LBT_TH_write(rssi_half_db_th); // set IQ rssi th step .5dB to xxx and enable it 1055 xpu_api->XPU_REG_FORCE_IDLE_MISC_write(75); //control the duration to force ch_idle after decoding a packet due to imperfection of agc and signals 1056 1057 //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((40)<<16)|0 );//high 16bit 5GHz; low 16 bit 2.4GHz (Attention, current tx core has around 1.19us starting delay that makes the ack fall behind 10us SIFS in 2.4GHz! Need to improve TX in 2.4GHz!) 1058 //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((51)<<16)|0 );//now our tx send out I/Q immediately 1059 xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((51+23)<<16)|(0+23) );//we have more time when we use FIR in AD9361 1060 1061 xpu_api->XPU_REG_RECV_ACK_COUNT_TOP0_write( (1<<31) | (((45+2+2)*10 + 15)<<16) | 10 );//2.4GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M) 1062 xpu_api->XPU_REG_RECV_ACK_COUNT_TOP1_write( (1<<31) | (((51+2+2)*10 + 15)<<16) | 10 );//5GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M) 1063 1064 tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write( ((16*10)<<16)|(10*10) );//high 16bit 5GHz; low 16 bit 2.4GHz. counter speed 10MHz is assumed 1065 1066 // //xpu_api->XPU_REG_BB_RF_DELAY_write(51); // fine tuned value at 0.005us. old: dac-->ant port: 0.6us, 57 taps fir at 40MHz: 1.425us; round trip: 2*(0.6+1.425)=4.05us; 4.05*10=41 1067 // xpu_api->XPU_REG_BB_RF_DELAY_write(47);//add .5us for slightly longer fir -- already in xpu.c 1068 xpu_api->XPU_REG_MAC_ADDR_write(priv->mac_addr); 1069 1070 // setup time schedule of 4 slices 1071 // slice 0 1072 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write(50000-1); // total 50ms 1073 xpu_api->XPU_REG_SLICE_COUNT_START_write(0); //start 0ms 1074 xpu_api->XPU_REG_SLICE_COUNT_END_write(50000-1); //end 50ms 1075 1076 // slice 1 1077 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((1<<20)|(50000-1)); // total 50ms 1078 xpu_api->XPU_REG_SLICE_COUNT_START_write((1<<20)|(0)); //start 0ms 1079 //xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(20000-1)); //end 20ms 1080 xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(50000-1)); //end 20ms 1081 1082 // slice 2 1083 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((2<<20)|(50000-1)); // total 50ms 1084 //xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(20000)); //start 20ms 1085 xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(0)); //start 20ms 1086 //xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(40000-1)); //end 20ms 1087 xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(50000-1)); //end 20ms 1088 1089 // slice 3 1090 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((3<<20)|(50000-1)); // total 50ms 1091 //xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(40000)); //start 40ms 1092 xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(0)); //start 40ms 1093 //xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms 1094 xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms 1095 1096 // all slice sync rest 1097 xpu_api->XPU_REG_MULTI_RST_write(1<<7); //bit7 reset the counter for all queues at the same time 1098 xpu_api->XPU_REG_MULTI_RST_write(0<<7); 1099 1100 //xpu_api->XPU_REG_MAC_ADDR_HIGH_write( (*( (u16*)(priv->mac_addr + 4) )) ); 1101 printk("%s openwifi_start: rx_intf_cfg %d openofdm_rx_cfg %d tx_intf_cfg %d openofdm_tx_cfg %d\n",sdr_compatible_str, priv->rx_intf_cfg, priv->openofdm_rx_cfg, priv->tx_intf_cfg, priv->openofdm_tx_cfg); 1102 printk("%s openwifi_start: rx_freq_offset_to_lo_MHz %d tx_freq_offset_to_lo_MHz %d\n",sdr_compatible_str, priv->rx_freq_offset_to_lo_MHz, priv->tx_freq_offset_to_lo_MHz); 1103 1104 tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x30004); //disable tx interrupt 1105 rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x100); // disable rx interrupt by interrupt test mode 1106 rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(1); // hold M AXIS in reset status 1107 1108 if (test_mode==1) { 1109 printk("%s openwifi_start: test_mode==1\n",sdr_compatible_str); 1110 goto normal_out; 1111 } 1112 1113 priv->rx_chan = dma_request_slave_channel(&(priv->pdev->dev), "rx_dma_s2mm"); 1114 if (IS_ERR(priv->rx_chan) || priv->rx_chan==NULL) { 1115 ret = PTR_ERR(priv->rx_chan); 1116 pr_err("%s openwifi_start: No Rx channel ret %d priv->rx_chan 0x%p\n",sdr_compatible_str, ret, priv->rx_chan); 1117 goto err_dma; 1118 } 1119 1120 priv->tx_chan = dma_request_slave_channel(&(priv->pdev->dev), "tx_dma_mm2s"); 1121 if (IS_ERR(priv->tx_chan) || priv->tx_chan==NULL) { 1122 ret = PTR_ERR(priv->tx_chan); 1123 pr_err("%s openwifi_start: No Tx channel ret %d priv->tx_chan 0x%p\n",sdr_compatible_str, ret, priv->tx_chan); 1124 goto err_dma; 1125 } 1126 printk("%s openwifi_start: DMA channel setup successfully. priv->rx_chan 0x%p priv->tx_chan 0x%p\n",sdr_compatible_str, priv->rx_chan, priv->tx_chan); 1127 1128 ret = openwifi_init_rx_ring(priv); 1129 if (ret) { 1130 printk("%s openwifi_start: openwifi_init_rx_ring ret %d\n", sdr_compatible_str,ret); 1131 goto err_free_rings; 1132 } 1133 1134 priv->seqno=0; 1135 for (i=0; i<MAX_NUM_SW_QUEUE; i++) { 1136 if ((ret = openwifi_init_tx_ring(priv, i))) { 1137 printk("%s openwifi_start: openwifi_init_tx_ring %d ret %d\n", sdr_compatible_str, i, ret); 1138 goto err_free_rings; 1139 } 1140 } 1141 1142 if ( (ret = rx_dma_setup(dev)) ) { 1143 printk("%s openwifi_start: rx_dma_setup ret %d\n", sdr_compatible_str,ret); 1144 goto err_free_rings; 1145 } 1146 1147 priv->irq_rx = irq_of_parse_and_map(priv->pdev->dev.of_node, 1); 1148 ret = request_irq(priv->irq_rx, openwifi_rx_interrupt, 1149 IRQF_SHARED, "sdr,rx_pkt_intr", dev); 1150 if (ret) { 1151 wiphy_err(dev->wiphy, "openwifi_start:failed to register IRQ handler openwifi_rx_interrupt\n"); 1152 goto err_free_rings; 1153 } else { 1154 printk("%s openwifi_start: irq_rx %d\n", sdr_compatible_str, priv->irq_rx); 1155 } 1156 1157 priv->irq_tx = irq_of_parse_and_map(priv->pdev->dev.of_node, 3); 1158 ret = request_irq(priv->irq_tx, openwifi_tx_interrupt, 1159 IRQF_SHARED, "sdr,tx_itrpt", dev); 1160 if (ret) { 1161 wiphy_err(dev->wiphy, "openwifi_start: failed to register IRQ handler openwifi_tx_interrupt\n"); 1162 goto err_free_rings; 1163 } else { 1164 printk("%s openwifi_start: irq_tx %d\n", sdr_compatible_str, priv->irq_tx); 1165 } 1166 1167 rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x000); // enable rx interrupt get normal fcs valid pass through ddc to ARM 1168 tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x4); //enable tx interrupt 1169 rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(0); // release M AXIS 1170 xpu_api->XPU_REG_TSF_LOAD_VAL_write(0,0); // reset tsf timer 1171 1172 //ieee80211_wake_queue(dev, 0); 1173 1174 normal_out: 1175 printk("%s openwifi_start: normal end\n", sdr_compatible_str); 1176 return 0; 1177 1178 err_free_rings: 1179 openwifi_free_rx_ring(priv); 1180 for (i=0; i<MAX_NUM_SW_QUEUE; i++) 1181 openwifi_free_tx_ring(priv, i); 1182 1183 err_dma: 1184 ret = -1; 1185 printk("%s openwifi_start: abnormal end ret %d\n", sdr_compatible_str, ret); 1186 return ret; 1187 } 1188 1189 static void openwifi_stop(struct ieee80211_hw *dev) 1190 { 1191 struct openwifi_priv *priv = dev->priv; 1192 u32 reg, reg1; 1193 int i; 1194 1195 if (test_mode==1){ 1196 pr_info("%s openwifi_stop: test_mode==1\n", sdr_compatible_str); 1197 goto normal_out; 1198 } 1199 1200 //turn off radio 1201 #if 1 1202 ad9361_tx_mute(priv->ad9361_phy, 1); 1203 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 1204 reg1 = ad9361_get_tx_atten(priv->ad9361_phy, 1); 1205 if (reg == AD9361_RADIO_OFF_TX_ATT && reg1 == AD9361_RADIO_OFF_TX_ATT ) { 1206 priv->rfkill_off = 0;// 0 off, 1 on 1207 printk("%s openwifi_stop: rfkill radio off\n",sdr_compatible_str); 1208 } 1209 else 1210 printk("%s openwifi_stop: WARNING rfkill radio off failed. tx att read %d %d require %d\n",sdr_compatible_str, reg, reg1, AD9361_RADIO_OFF_TX_ATT); 1211 #endif 1212 1213 //ieee80211_stop_queue(dev, 0); 1214 1215 tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x30004); //disable tx interrupt 1216 rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x100); // disable fcs_valid by interrupt test mode 1217 rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(1); // hold M AXIS in reset status 1218 1219 for (i=0; i<MAX_NUM_VIF; i++) { 1220 priv->vif[i] = NULL; 1221 } 1222 1223 openwifi_free_rx_ring(priv); 1224 for (i=0; i<MAX_NUM_SW_QUEUE; i++) 1225 openwifi_free_tx_ring(priv, i); 1226 1227 pr_info("%s openwifi_stop: dropped channel %s\n", sdr_compatible_str, dma_chan_name(priv->rx_chan)); 1228 dmaengine_terminate_all(priv->rx_chan); 1229 dma_release_channel(priv->rx_chan); 1230 pr_info("%s openwifi_stop: dropped channel %s\n", sdr_compatible_str, dma_chan_name(priv->tx_chan)); 1231 dmaengine_terminate_all(priv->tx_chan); 1232 dma_release_channel(priv->tx_chan); 1233 1234 //priv->rf->stop(dev); 1235 1236 free_irq(priv->irq_rx, dev); 1237 free_irq(priv->irq_tx, dev); 1238 1239 normal_out: 1240 printk("%s openwifi_stop\n", sdr_compatible_str); 1241 } 1242 1243 static u64 openwifi_get_tsf(struct ieee80211_hw *dev, 1244 struct ieee80211_vif *vif) 1245 { 1246 u32 tsft_low, tsft_high; 1247 1248 tsft_low = xpu_api->XPU_REG_TSF_RUNTIME_VAL_LOW_read(); 1249 tsft_high = xpu_api->XPU_REG_TSF_RUNTIME_VAL_HIGH_read(); 1250 //printk("%s openwifi_get_tsf: %08x%08x\n", sdr_compatible_str,tsft_high,tsft_low); 1251 return( ( (u64)tsft_low ) | ( ((u64)tsft_high)<<32 ) ); 1252 } 1253 1254 static void openwifi_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u64 tsf) 1255 { 1256 u32 tsft_high = ((tsf >> 32)&0xffffffff); 1257 u32 tsft_low = (tsf&0xffffffff); 1258 xpu_api->XPU_REG_TSF_LOAD_VAL_write(tsft_high,tsft_low); 1259 printk("%s openwifi_set_tsf: %08x%08x\n", sdr_compatible_str,tsft_high,tsft_low); 1260 } 1261 1262 static void openwifi_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 1263 { 1264 xpu_api->XPU_REG_TSF_LOAD_VAL_write(0,0); 1265 printk("%s openwifi_reset_tsf\n", sdr_compatible_str); 1266 } 1267 1268 static int openwifi_set_rts_threshold(struct ieee80211_hw *hw, u32 value) 1269 { 1270 printk("%s openwifi_set_rts_threshold WARNING value %d\n", sdr_compatible_str,value); 1271 return(0); 1272 } 1273 1274 static void openwifi_beacon_work(struct work_struct *work) 1275 { 1276 struct openwifi_vif *vif_priv = 1277 container_of(work, struct openwifi_vif, beacon_work.work); 1278 struct ieee80211_vif *vif = 1279 container_of((void *)vif_priv, struct ieee80211_vif, drv_priv); 1280 struct ieee80211_hw *dev = vif_priv->dev; 1281 struct ieee80211_mgmt *mgmt; 1282 struct sk_buff *skb; 1283 1284 /* don't overflow the tx ring */ 1285 if (ieee80211_queue_stopped(dev, 0)) 1286 goto resched; 1287 1288 /* grab a fresh beacon */ 1289 skb = ieee80211_beacon_get(dev, vif); 1290 if (!skb) 1291 goto resched; 1292 1293 /* 1294 * update beacon timestamp w/ TSF value 1295 * TODO: make hardware update beacon timestamp 1296 */ 1297 mgmt = (struct ieee80211_mgmt *)skb->data; 1298 mgmt->u.beacon.timestamp = cpu_to_le64(openwifi_get_tsf(dev, vif)); 1299 1300 /* TODO: use actual beacon queue */ 1301 skb_set_queue_mapping(skb, 0); 1302 openwifi_tx(dev, NULL, skb); 1303 1304 resched: 1305 /* 1306 * schedule next beacon 1307 * TODO: use hardware support for beacon timing 1308 */ 1309 schedule_delayed_work(&vif_priv->beacon_work, 1310 usecs_to_jiffies(1024 * vif->bss_conf.beacon_int)); 1311 } 1312 1313 static int openwifi_add_interface(struct ieee80211_hw *dev, 1314 struct ieee80211_vif *vif) 1315 { 1316 int i; 1317 struct openwifi_priv *priv = dev->priv; 1318 struct openwifi_vif *vif_priv; 1319 1320 switch (vif->type) { 1321 case NL80211_IFTYPE_AP: 1322 case NL80211_IFTYPE_STATION: 1323 case NL80211_IFTYPE_ADHOC: 1324 case NL80211_IFTYPE_MONITOR: 1325 case NL80211_IFTYPE_MESH_POINT: 1326 break; 1327 default: 1328 return -EOPNOTSUPP; 1329 } 1330 // let's support more than 1 interface 1331 for (i=0; i<MAX_NUM_VIF; i++) { 1332 if (priv->vif[i] == NULL) 1333 break; 1334 } 1335 1336 printk("%s openwifi_add_interface start. vif for loop result %d\n", sdr_compatible_str, i); 1337 1338 if (i==MAX_NUM_VIF) 1339 return -EBUSY; 1340 1341 priv->vif[i] = vif; 1342 1343 /* Initialize driver private area */ 1344 vif_priv = (struct openwifi_vif *)&vif->drv_priv; 1345 vif_priv->idx = i; 1346 1347 vif_priv->dev = dev; 1348 INIT_DELAYED_WORK(&vif_priv->beacon_work, openwifi_beacon_work); 1349 vif_priv->enable_beacon = false; 1350 1351 printk("%s openwifi_add_interface end with vif idx %d\n", sdr_compatible_str,vif_priv->idx); 1352 1353 return 0; 1354 } 1355 1356 static void openwifi_remove_interface(struct ieee80211_hw *dev, 1357 struct ieee80211_vif *vif) 1358 { 1359 struct openwifi_vif *vif_priv; 1360 struct openwifi_priv *priv = dev->priv; 1361 1362 vif_priv = (struct openwifi_vif *)&vif->drv_priv; 1363 priv->vif[vif_priv->idx] = NULL; 1364 printk("%s openwifi_remove_interface vif idx %d\n", sdr_compatible_str, vif_priv->idx); 1365 } 1366 1367 static int openwifi_config(struct ieee80211_hw *dev, u32 changed) 1368 { 1369 struct openwifi_priv *priv = dev->priv; 1370 struct ieee80211_conf *conf = &dev->conf; 1371 1372 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) 1373 priv->rf->set_chan(dev, conf); 1374 else 1375 printk("%s openwifi_config changed flag %08x\n", sdr_compatible_str, changed); 1376 1377 return 0; 1378 } 1379 1380 static void openwifi_bss_info_changed(struct ieee80211_hw *dev, 1381 struct ieee80211_vif *vif, 1382 struct ieee80211_bss_conf *info, 1383 u32 changed) 1384 { 1385 struct openwifi_priv *priv = dev->priv; 1386 struct openwifi_vif *vif_priv; 1387 u32 bssid_low, bssid_high; 1388 1389 vif_priv = (struct openwifi_vif *)&vif->drv_priv; 1390 1391 //be careful: we don have valid chip, so registers addresses in priv->map->BSSID[0] are not valid! should not print it! 1392 //printk("%s openwifi_bss_info_changed map bssid %02x%02x%02x%02x%02x%02x\n",sdr_compatible_str,priv->map->BSSID[0],priv->map->BSSID[1],priv->map->BSSID[2],priv->map->BSSID[3],priv->map->BSSID[4],priv->map->BSSID[5]); 1393 if (changed & BSS_CHANGED_BSSID) { 1394 printk("%s openwifi_bss_info_changed BSS_CHANGED_BSSID %02x%02x%02x%02x%02x%02x\n",sdr_compatible_str,info->bssid[0],info->bssid[1],info->bssid[2],info->bssid[3],info->bssid[4],info->bssid[5]); 1395 // write new bssid to our HW, and do not change bssid filter 1396 //u32 bssid_filter_high = xpu_api->XPU_REG_BSSID_FILTER_HIGH_read(); 1397 bssid_low = ( *( (u32*)(info->bssid) ) ); 1398 bssid_high = ( *( (u16*)(info->bssid+4) ) ); 1399 1400 //bssid_filter_high = (bssid_filter_high&0x80000000); 1401 //bssid_high = (bssid_high|bssid_filter_high); 1402 xpu_api->XPU_REG_BSSID_FILTER_LOW_write(bssid_low); 1403 xpu_api->XPU_REG_BSSID_FILTER_HIGH_write(bssid_high); 1404 } 1405 1406 if (changed & BSS_CHANGED_BEACON_INT) { 1407 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BEACON_INT %x\n",sdr_compatible_str,info->beacon_int); 1408 } 1409 1410 if (changed & BSS_CHANGED_TXPOWER) 1411 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_TXPOWER %x\n",sdr_compatible_str,info->txpower); 1412 1413 if (changed & BSS_CHANGED_ERP_CTS_PROT) 1414 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_ERP_CTS_PROT %x\n",sdr_compatible_str,info->use_cts_prot); 1415 1416 if (changed & BSS_CHANGED_BASIC_RATES) 1417 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BASIC_RATES %x\n",sdr_compatible_str,info->basic_rates); 1418 1419 if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE)) { 1420 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_ERP_SLOT %d BSS_CHANGED_ERP_PREAMBLE %d short slot %d\n",sdr_compatible_str, 1421 changed&BSS_CHANGED_ERP_SLOT,changed&BSS_CHANGED_ERP_PREAMBLE,info->use_short_slot); 1422 if (info->use_short_slot && priv->use_short_slot==false) { 1423 priv->use_short_slot=true; 1424 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 1425 } else if ((!info->use_short_slot) && priv->use_short_slot==true) { 1426 priv->use_short_slot=false; 1427 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 1428 } 1429 } 1430 1431 if (changed & BSS_CHANGED_BEACON_ENABLED) { 1432 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BEACON_ENABLED\n",sdr_compatible_str); 1433 vif_priv->enable_beacon = info->enable_beacon; 1434 } 1435 1436 if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON)) { 1437 cancel_delayed_work_sync(&vif_priv->beacon_work); 1438 if (vif_priv->enable_beacon) 1439 schedule_work(&vif_priv->beacon_work.work); 1440 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BEACON_ENABLED %d BSS_CHANGED_BEACON %d\n",sdr_compatible_str, 1441 changed&BSS_CHANGED_BEACON_ENABLED,changed&BSS_CHANGED_BEACON); 1442 } 1443 } 1444 // helper function 1445 u32 log2val(u32 val){ 1446 u32 ret_val = 0 ; 1447 while(val>1){ 1448 val = val >> 1 ; 1449 ret_val ++ ; 1450 } 1451 return ret_val ; 1452 } 1453 1454 static int openwifi_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue, 1455 const struct ieee80211_tx_queue_params *params) 1456 { 1457 u32 reg_val, cw_min_exp, cw_max_exp; 1458 1459 printk("%s openwifi_conf_tx: [queue %d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d, aifs and txop ignored\n", 1460 sdr_compatible_str,queue,params->aifs,params->cw_min,params->cw_max,params->txop); 1461 1462 reg_val=xpu_api->XPU_REG_CSMA_CFG_read(); 1463 cw_min_exp = (log2val(params->cw_min + 1) & 0x0F); 1464 cw_max_exp = (log2val(params->cw_max + 1) & 0x0F); 1465 switch(queue){ 1466 case 0: reg_val = ( (reg_val & 0xFFFFFF00) | ((cw_min_exp | (cw_max_exp << 4)) << 0) ); break; 1467 case 1: reg_val = ( (reg_val & 0xFFFF00FF) | ((cw_min_exp | (cw_max_exp << 4)) << 8) ); break; 1468 case 2: reg_val = ( (reg_val & 0xFF00FFFF) | ((cw_min_exp | (cw_max_exp << 4)) << 16) ); break; 1469 case 3: reg_val = ( (reg_val & 0x00FFFFFF) | ((cw_min_exp | (cw_max_exp << 4)) << 24) ); break; 1470 default: printk("%s openwifi_conf_tx: WARNING queue %d does not exist",sdr_compatible_str, queue); return(0); 1471 } 1472 xpu_api->XPU_REG_CSMA_CFG_write(reg_val); 1473 return(0); 1474 } 1475 1476 static u64 openwifi_prepare_multicast(struct ieee80211_hw *dev, 1477 struct netdev_hw_addr_list *mc_list) 1478 { 1479 printk("%s openwifi_prepare_multicast\n", sdr_compatible_str); 1480 return netdev_hw_addr_list_count(mc_list); 1481 } 1482 1483 static void openwifi_configure_filter(struct ieee80211_hw *dev, 1484 unsigned int changed_flags, 1485 unsigned int *total_flags, 1486 u64 multicast) 1487 { 1488 u32 filter_flag; 1489 1490 (*total_flags) &= SDR_SUPPORTED_FILTERS; 1491 (*total_flags) |= FIF_ALLMULTI; //because we need to pass all multicast (no matter it is for us or not) to upper layer 1492 1493 filter_flag = (*total_flags); 1494 1495 filter_flag = (filter_flag|UNICAST_FOR_US|BROADCAST_ALL_ONE|BROADCAST_ALL_ZERO); 1496 //filter_flag = (filter_flag|UNICAST_FOR_US|BROADCAST_ALL_ONE|BROADCAST_ALL_ZERO|MONITOR_ALL); // all pkt will be delivered to arm 1497 1498 //if (priv->vif[0]->type == NL80211_IFTYPE_MONITOR) 1499 if ((filter_flag&0xf0) == 0xf0) //FIF_BCN_PRBRESP_PROMISC/FIF_CONTROL/FIF_OTHER_BSS/FIF_PSPOLL are set means monitor mode 1500 filter_flag = (filter_flag|MONITOR_ALL); 1501 else 1502 filter_flag = (filter_flag&(~MONITOR_ALL)); 1503 1504 if ( !(filter_flag&FIF_BCN_PRBRESP_PROMISC) ) 1505 filter_flag = (filter_flag|MY_BEACON); 1506 1507 filter_flag = (filter_flag|FIF_PSPOLL); 1508 1509 xpu_api->XPU_REG_FILTER_FLAG_write(filter_flag|HIGH_PRIORITY_DISCARD_FLAG); 1510 //xpu_api->XPU_REG_FILTER_FLAG_write(filter_flag); //do not discard any pkt 1511 1512 printk("%s openwifi_configure_filter MON %d M_BCN %d BST0 %d BST1 %d UST %d PB_RQ %d PS_PL %d O_BSS %d CTL %d BCN_PRP %d PCP_FL %d FCS_FL %d ALL_MUT %d\n", sdr_compatible_str, 1513 (filter_flag>>13)&1,(filter_flag>>12)&1,(filter_flag>>11)&1,(filter_flag>>10)&1,(filter_flag>>9)&1,(filter_flag>>8)&1,(filter_flag>>7)&1,(filter_flag>>6)&1,(filter_flag>>5)&1,(filter_flag>>4)&1,(filter_flag>>3)&1,(filter_flag>>2)&1,(filter_flag>>1)&1); 1514 } 1515 1516 static int openwifi_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_ampdu_params *params) 1517 { 1518 struct ieee80211_sta *sta = params->sta; 1519 enum ieee80211_ampdu_mlme_action action = params->action; 1520 struct openwifi_priv *priv = hw->priv; 1521 1522 switch (action) 1523 { 1524 case IEEE80211_AMPDU_TX_START: 1525 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, params->tid); 1526 break; 1527 case IEEE80211_AMPDU_TX_STOP_CONT: 1528 case IEEE80211_AMPDU_TX_STOP_FLUSH: 1529 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT: 1530 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, params->tid); 1531 break; 1532 case IEEE80211_AMPDU_TX_OPERATIONAL: 1533 break; 1534 case IEEE80211_AMPDU_RX_START: 1535 xpu_api->XPU_REG_AMPDU_ACTION_write((params->tid & 0x000F)<<1 | 1); 1536 break; 1537 case IEEE80211_AMPDU_RX_STOP: 1538 xpu_api->XPU_REG_AMPDU_ACTION_write((params->tid & 0x000F)<<1 | 0); 1539 break; 1540 default: 1541 return -EOPNOTSUPP; 1542 } 1543 1544 return 0; 1545 } 1546 1547 static int openwifi_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, void *data, int len) 1548 { 1549 struct openwifi_priv *priv = hw->priv; 1550 struct nlattr *tb[OPENWIFI_ATTR_MAX + 1]; 1551 struct sk_buff *skb; 1552 int err; 1553 u32 tmp=-1, reg_cat, reg_addr, reg_val, reg_addr_idx, tsft_high, tsft_low; 1554 1555 err = nla_parse(tb, OPENWIFI_ATTR_MAX, data, len, openwifi_testmode_policy, NULL); 1556 if (err) 1557 return err; 1558 1559 if (!tb[OPENWIFI_ATTR_CMD]) 1560 return -EINVAL; 1561 1562 switch (nla_get_u32(tb[OPENWIFI_ATTR_CMD])) { 1563 case OPENWIFI_CMD_SET_GAP: 1564 if (!tb[OPENWIFI_ATTR_GAP]) 1565 return -EINVAL; 1566 tmp = nla_get_u32(tb[OPENWIFI_ATTR_GAP]); 1567 printk("%s openwifi radio inter frame gap set to %d usec\n", sdr_compatible_str, tmp); 1568 xpu_api->XPU_REG_CSMA_CFG_write(tmp); // unit us 1569 return 0; 1570 case OPENWIFI_CMD_GET_GAP: 1571 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1572 if (!skb) 1573 return -ENOMEM; 1574 tmp = xpu_api->XPU_REG_CSMA_CFG_read(); 1575 if (nla_put_u32(skb, OPENWIFI_ATTR_GAP, tmp)) 1576 goto nla_put_failure; 1577 return cfg80211_testmode_reply(skb); 1578 case OPENWIFI_CMD_SET_SLICE_IDX: 1579 if (!tb[OPENWIFI_ATTR_SLICE_IDX]) 1580 return -EINVAL; 1581 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_IDX]); 1582 printk("%s set openwifi slice_idx in hex: %08x\n", sdr_compatible_str, tmp); 1583 if (tmp == MAX_NUM_HW_QUEUE) { 1584 printk("%s set openwifi slice_idx reset all queue counter.\n", sdr_compatible_str); 1585 xpu_api->XPU_REG_MULTI_RST_write(1<<7); //bit7 reset the counter for all queues at the same time 1586 xpu_api->XPU_REG_MULTI_RST_write(0<<7); 1587 } else { 1588 priv->slice_idx = tmp; 1589 } 1590 return 0; 1591 case OPENWIFI_CMD_GET_SLICE_IDX: 1592 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1593 if (!skb) 1594 return -ENOMEM; 1595 tmp = priv->slice_idx; 1596 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_IDX, tmp)) 1597 goto nla_put_failure; 1598 printk("%s get openwifi slice_idx in hex: %08x\n", sdr_compatible_str, tmp); 1599 return cfg80211_testmode_reply(skb); 1600 case OPENWIFI_CMD_SET_ADDR: 1601 if (!tb[OPENWIFI_ATTR_ADDR]) 1602 return -EINVAL; 1603 tmp = nla_get_u32(tb[OPENWIFI_ATTR_ADDR]); 1604 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1605 printk("%s set openwifi slice_target_mac_addr(low32) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1606 } else { 1607 printk("%s set openwifi slice_target_mac_addr(low32) in hex: %08x to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1608 priv->dest_mac_addr_queue_map[priv->slice_idx] = reverse32(tmp); 1609 } 1610 return 0; 1611 case OPENWIFI_CMD_GET_ADDR: 1612 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1613 if (!skb) 1614 return -ENOMEM; 1615 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1616 tmp = -1; 1617 } else { 1618 tmp = reverse32(priv->dest_mac_addr_queue_map[priv->slice_idx]); 1619 } 1620 if (nla_put_u32(skb, OPENWIFI_ATTR_ADDR, tmp)) 1621 goto nla_put_failure; 1622 printk("%s get openwifi slice_target_mac_addr(low32) in hex: %08x of slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1623 return cfg80211_testmode_reply(skb); 1624 1625 case OPENWIFI_CMD_SET_SLICE_TOTAL: 1626 if (!tb[OPENWIFI_ATTR_SLICE_TOTAL]) 1627 return -EINVAL; 1628 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_TOTAL]); 1629 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1630 printk("%s set SLICE_TOTAL(duration) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1631 } else { 1632 printk("%s set SLICE_TOTAL(duration) %d usec to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1633 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((priv->slice_idx<<20)|tmp); 1634 } 1635 return 0; 1636 case OPENWIFI_CMD_GET_SLICE_TOTAL: 1637 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1638 if (!skb) 1639 return -ENOMEM; 1640 tmp = (xpu_api->XPU_REG_SLICE_COUNT_TOTAL_read()); 1641 printk("%s get SLICE_TOTAL(duration) %d usec of slice %d\n", sdr_compatible_str, tmp&0xFFFFF, tmp>>20); 1642 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_TOTAL, tmp)) 1643 goto nla_put_failure; 1644 return cfg80211_testmode_reply(skb); 1645 1646 case OPENWIFI_CMD_SET_SLICE_START: 1647 if (!tb[OPENWIFI_ATTR_SLICE_START]) 1648 return -EINVAL; 1649 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_START]); 1650 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1651 printk("%s set SLICE_START(duration) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1652 } else { 1653 printk("%s set SLICE_START(duration) %d usec to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1654 xpu_api->XPU_REG_SLICE_COUNT_START_write((priv->slice_idx<<20)|tmp); 1655 } 1656 return 0; 1657 case OPENWIFI_CMD_GET_SLICE_START: 1658 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1659 if (!skb) 1660 return -ENOMEM; 1661 tmp = (xpu_api->XPU_REG_SLICE_COUNT_START_read()); 1662 printk("%s get SLICE_START(duration) %d usec of slice %d\n", sdr_compatible_str, tmp&0xFFFFF, tmp>>20); 1663 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_START, tmp)) 1664 goto nla_put_failure; 1665 return cfg80211_testmode_reply(skb); 1666 1667 case OPENWIFI_CMD_SET_SLICE_END: 1668 if (!tb[OPENWIFI_ATTR_SLICE_END]) 1669 return -EINVAL; 1670 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_END]); 1671 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1672 printk("%s set SLICE_END(duration) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1673 } else { 1674 printk("%s set SLICE_END(duration) %d usec to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1675 xpu_api->XPU_REG_SLICE_COUNT_END_write((priv->slice_idx<<20)|tmp); 1676 } 1677 return 0; 1678 case OPENWIFI_CMD_GET_SLICE_END: 1679 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1680 if (!skb) 1681 return -ENOMEM; 1682 tmp = (xpu_api->XPU_REG_SLICE_COUNT_END_read()); 1683 printk("%s get SLICE_END(duration) %d usec of slice %d\n", sdr_compatible_str, tmp&0xFFFFF, tmp>>20); 1684 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_END, tmp)) 1685 goto nla_put_failure; 1686 return cfg80211_testmode_reply(skb); 1687 1688 // case OPENWIFI_CMD_SET_SLICE_TOTAL1: 1689 // if (!tb[OPENWIFI_ATTR_SLICE_TOTAL1]) 1690 // return -EINVAL; 1691 // tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_TOTAL1]); 1692 // printk("%s set SLICE_TOTAL1(duration) to %d usec\n", sdr_compatible_str, tmp); 1693 // // xpu_api->XPU_REG_SLICE_COUNT_TOTAL1_write(tmp); 1694 // return 0; 1695 // case OPENWIFI_CMD_GET_SLICE_TOTAL1: 1696 // skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1697 // if (!skb) 1698 // return -ENOMEM; 1699 // // tmp = (xpu_api->XPU_REG_SLICE_COUNT_TOTAL1_read()); 1700 // if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_TOTAL1, tmp)) 1701 // goto nla_put_failure; 1702 // return cfg80211_testmode_reply(skb); 1703 1704 // case OPENWIFI_CMD_SET_SLICE_START1: 1705 // if (!tb[OPENWIFI_ATTR_SLICE_START1]) 1706 // return -EINVAL; 1707 // tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_START1]); 1708 // printk("%s set SLICE_START1(duration) to %d usec\n", sdr_compatible_str, tmp); 1709 // // xpu_api->XPU_REG_SLICE_COUNT_START1_write(tmp); 1710 // return 0; 1711 // case OPENWIFI_CMD_GET_SLICE_START1: 1712 // skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1713 // if (!skb) 1714 // return -ENOMEM; 1715 // // tmp = (xpu_api->XPU_REG_SLICE_COUNT_START1_read()); 1716 // if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_START1, tmp)) 1717 // goto nla_put_failure; 1718 // return cfg80211_testmode_reply(skb); 1719 1720 // case OPENWIFI_CMD_SET_SLICE_END1: 1721 // if (!tb[OPENWIFI_ATTR_SLICE_END1]) 1722 // return -EINVAL; 1723 // tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_END1]); 1724 // printk("%s set SLICE_END1(duration) to %d usec\n", sdr_compatible_str, tmp); 1725 // // xpu_api->XPU_REG_SLICE_COUNT_END1_write(tmp); 1726 // return 0; 1727 // case OPENWIFI_CMD_GET_SLICE_END1: 1728 // skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1729 // if (!skb) 1730 // return -ENOMEM; 1731 // // tmp = (xpu_api->XPU_REG_SLICE_COUNT_END1_read()); 1732 // if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_END1, tmp)) 1733 // goto nla_put_failure; 1734 // return cfg80211_testmode_reply(skb); 1735 1736 case OPENWIFI_CMD_SET_RSSI_TH: 1737 if (!tb[OPENWIFI_ATTR_RSSI_TH]) 1738 return -EINVAL; 1739 tmp = nla_get_u32(tb[OPENWIFI_ATTR_RSSI_TH]); 1740 // printk("%s set RSSI_TH to %d\n", sdr_compatible_str, tmp); 1741 // xpu_api->XPU_REG_LBT_TH_write(tmp); 1742 // return 0; 1743 printk("%s WARNING Please use command: sdrctl dev sdr0 set reg drv_xpu 0 reg_value! (1~2047, 0 means AUTO)!\n", sdr_compatible_str); 1744 return -EOPNOTSUPP; 1745 case OPENWIFI_CMD_GET_RSSI_TH: 1746 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1747 if (!skb) 1748 return -ENOMEM; 1749 tmp = xpu_api->XPU_REG_LBT_TH_read(); 1750 if (nla_put_u32(skb, OPENWIFI_ATTR_RSSI_TH, tmp)) 1751 goto nla_put_failure; 1752 return cfg80211_testmode_reply(skb); 1753 1754 case OPENWIFI_CMD_SET_TSF: 1755 printk("openwifi_set_tsf_1"); 1756 if ( (!tb[OPENWIFI_ATTR_HIGH_TSF]) || (!tb[OPENWIFI_ATTR_LOW_TSF]) ) 1757 return -EINVAL; 1758 printk("openwifi_set_tsf_2"); 1759 tsft_high = nla_get_u32(tb[OPENWIFI_ATTR_HIGH_TSF]); 1760 tsft_low = nla_get_u32(tb[OPENWIFI_ATTR_LOW_TSF]); 1761 xpu_api->XPU_REG_TSF_LOAD_VAL_write(tsft_high,tsft_low); 1762 printk("%s openwifi_set_tsf: %08x%08x\n", sdr_compatible_str,tsft_high,tsft_low); 1763 return 0; 1764 1765 case REG_CMD_SET: 1766 if ( (!tb[REG_ATTR_ADDR]) || (!tb[REG_ATTR_VAL]) ) 1767 return -EINVAL; 1768 reg_addr = nla_get_u32(tb[REG_ATTR_ADDR]); 1769 reg_val = nla_get_u32(tb[REG_ATTR_VAL]); 1770 reg_cat = ((reg_addr>>16)&0xFFFF); 1771 reg_addr = (reg_addr&0xFFFF); 1772 reg_addr_idx = (reg_addr>>2); 1773 printk("%s recv set cmd reg cat %d addr %08x val %08x idx %d\n", sdr_compatible_str, reg_cat, reg_addr, reg_val, reg_addr_idx); 1774 if (reg_cat==1) 1775 printk("%s WARNING reg cat 1 (rf) is not supported yet!\n", sdr_compatible_str); 1776 else if (reg_cat==2) 1777 rx_intf_api->reg_write(reg_addr,reg_val); 1778 else if (reg_cat==3) 1779 tx_intf_api->reg_write(reg_addr,reg_val); 1780 else if (reg_cat==4) 1781 openofdm_rx_api->reg_write(reg_addr,reg_val); 1782 else if (reg_cat==5) 1783 openofdm_tx_api->reg_write(reg_addr,reg_val); 1784 else if (reg_cat==6) 1785 xpu_api->reg_write(reg_addr,reg_val); 1786 else if (reg_cat==7) { 1787 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1788 priv->drv_rx_reg_val[reg_addr_idx]=reg_val; 1789 if (reg_addr_idx==DRV_RX_REG_IDX_FREQ_BW_CFG) { 1790 if (reg_val==0) 1791 priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT0; 1792 else 1793 priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT1; 1794 1795 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1796 //priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1797 } 1798 } else 1799 printk("%s WARNING reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1800 } 1801 else if (reg_cat==8) { 1802 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1803 priv->drv_tx_reg_val[reg_addr_idx]=reg_val; 1804 if (reg_addr_idx==DRV_TX_REG_IDX_FREQ_BW_CFG) { 1805 if (reg_val==0) { 1806 priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0; 1807 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, true, false, true); 1808 } else { 1809 priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1; 1810 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, false, true, true); 1811 } 1812 1813 //priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1814 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1815 } 1816 } else 1817 printk("%s WARNING reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1818 } 1819 else if (reg_cat==9) { 1820 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1821 priv->drv_xpu_reg_val[reg_addr_idx]=reg_val; 1822 if (reg_addr_idx==DRV_XPU_REG_IDX_LBT_TH) { 1823 if (reg_val) { 1824 xpu_api->XPU_REG_LBT_TH_write(reg_val); 1825 printk("%s override FPGA LBT threshold to %d. The last_auto_fpga_lbt_th %d\n", sdr_compatible_str, reg_val, priv->last_auto_fpga_lbt_th); 1826 } else { 1827 xpu_api->XPU_REG_LBT_TH_write(priv->last_auto_fpga_lbt_th); 1828 printk("%s Restore last_auto_fpga_lbt_th %d to FPGA. ad9361_rf_set_channel will take control\n", sdr_compatible_str, priv->last_auto_fpga_lbt_th); 1829 } 1830 } 1831 } else 1832 printk("%s WARNING reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1833 } 1834 else 1835 printk("%s WARNING reg cat %d is not supported yet!\n", sdr_compatible_str, reg_cat); 1836 1837 return 0; 1838 case REG_CMD_GET: 1839 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1840 if (!skb) 1841 return -ENOMEM; 1842 reg_addr = nla_get_u32(tb[REG_ATTR_ADDR]); 1843 reg_cat = ((reg_addr>>16)&0xFFFF); 1844 reg_addr = (reg_addr&0xFFFF); 1845 reg_addr_idx = (reg_addr>>2); 1846 printk("%s recv get cmd reg cat %d addr %08x idx %d\n", sdr_compatible_str, reg_cat, reg_addr, reg_addr_idx); 1847 if (reg_cat==1) { 1848 printk("%s WARNING reg cat 1 (rf) is not supported yet!\n", sdr_compatible_str); 1849 tmp = 0xFFFFFFFF; 1850 } 1851 else if (reg_cat==2) 1852 tmp = rx_intf_api->reg_read(reg_addr); 1853 else if (reg_cat==3) 1854 tmp = tx_intf_api->reg_read(reg_addr); 1855 else if (reg_cat==4) 1856 tmp = openofdm_rx_api->reg_read(reg_addr); 1857 else if (reg_cat==5) 1858 tmp = openofdm_tx_api->reg_read(reg_addr); 1859 else if (reg_cat==6) 1860 tmp = xpu_api->reg_read(reg_addr); 1861 else if (reg_cat==7) { 1862 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1863 if (reg_addr_idx==DRV_RX_REG_IDX_FREQ_BW_CFG) { 1864 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1865 //priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1866 1867 if (priv->rx_intf_cfg == RX_INTF_BW_20MHZ_AT_0MHZ_ANT0) 1868 priv->drv_rx_reg_val[reg_addr_idx]=0; 1869 else if (priv->rx_intf_cfg == RX_INTF_BW_20MHZ_AT_0MHZ_ANT1) 1870 priv->drv_rx_reg_val[reg_addr_idx]=1; 1871 } 1872 tmp = priv->drv_rx_reg_val[reg_addr_idx]; 1873 } else 1874 printk("%s WARNING reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1875 } 1876 else if (reg_cat==8) { 1877 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1878 if (reg_addr_idx==DRV_TX_REG_IDX_FREQ_BW_CFG) { 1879 //priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1880 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1881 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0) 1882 priv->drv_tx_reg_val[reg_addr_idx]=0; 1883 else if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) 1884 priv->drv_tx_reg_val[reg_addr_idx]=1; 1885 } 1886 tmp = priv->drv_tx_reg_val[reg_addr_idx]; 1887 } else 1888 printk("%s WARNING reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1889 } 1890 else if (reg_cat==9) { 1891 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) 1892 tmp = priv->drv_xpu_reg_val[reg_addr_idx]; 1893 else 1894 printk("%s WARNING reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1895 } 1896 else 1897 printk("%s WARNING reg cat %d is not supported yet!\n", sdr_compatible_str, reg_cat); 1898 1899 if (nla_put_u32(skb, REG_ATTR_VAL, tmp)) 1900 goto nla_put_failure; 1901 return cfg80211_testmode_reply(skb); 1902 1903 default: 1904 return -EOPNOTSUPP; 1905 } 1906 1907 nla_put_failure: 1908 dev_kfree_skb(skb); 1909 return -ENOBUFS; 1910 } 1911 1912 static const struct ieee80211_ops openwifi_ops = { 1913 .tx = openwifi_tx, 1914 .start = openwifi_start, 1915 .stop = openwifi_stop, 1916 .add_interface = openwifi_add_interface, 1917 .remove_interface = openwifi_remove_interface, 1918 .config = openwifi_config, 1919 .bss_info_changed = openwifi_bss_info_changed, 1920 .conf_tx = openwifi_conf_tx, 1921 .prepare_multicast = openwifi_prepare_multicast, 1922 .configure_filter = openwifi_configure_filter, 1923 .rfkill_poll = openwifi_rfkill_poll, 1924 .get_tsf = openwifi_get_tsf, 1925 .set_tsf = openwifi_set_tsf, 1926 .reset_tsf = openwifi_reset_tsf, 1927 .set_rts_threshold = openwifi_set_rts_threshold, 1928 .ampdu_action = openwifi_ampdu_action, 1929 .testmode_cmd = openwifi_testmode_cmd, 1930 }; 1931 1932 static const struct of_device_id openwifi_dev_of_ids[] = { 1933 { .compatible = "sdr,sdr", }, 1934 {} 1935 }; 1936 MODULE_DEVICE_TABLE(of, openwifi_dev_of_ids); 1937 1938 static int custom_match_spi_dev(struct device *dev, void *data) 1939 { 1940 const char *name = data; 1941 1942 bool ret = sysfs_streq(name, dev->of_node->name); 1943 printk("%s custom_match_spi_dev %s %s %d\n", sdr_compatible_str,name, dev->of_node->name, ret); 1944 return ret; 1945 } 1946 1947 static int custom_match_platform_dev(struct device *dev, void *data) 1948 { 1949 struct platform_device *plat_dev = to_platform_device(dev); 1950 const char *name = data; 1951 char *name_in_sys_bus_platform_devices = strstr(plat_dev->name, name); 1952 bool match_flag = (name_in_sys_bus_platform_devices != NULL); 1953 1954 if (match_flag) { 1955 printk("%s custom_match_platform_dev %s\n", sdr_compatible_str,plat_dev->name); 1956 } 1957 return(match_flag); 1958 } 1959 1960 static int openwifi_dev_probe(struct platform_device *pdev) 1961 { 1962 struct ieee80211_hw *dev; 1963 struct openwifi_priv *priv; 1964 int err=1, rand_val; 1965 const char *chip_name, *fpga_model; 1966 u32 reg;//, reg1; 1967 1968 struct device_node *np = pdev->dev.of_node; 1969 1970 struct device *tmp_dev; 1971 struct platform_device *tmp_pdev; 1972 struct iio_dev *tmp_indio_dev; 1973 // struct gpio_leds_priv *tmp_led_priv; 1974 1975 printk("\n"); 1976 1977 if (np) { 1978 const struct of_device_id *match; 1979 1980 match = of_match_node(openwifi_dev_of_ids, np); 1981 if (match) { 1982 printk("%s openwifi_dev_probe: match!\n", sdr_compatible_str); 1983 err = 0; 1984 } 1985 } 1986 1987 if (err) 1988 return err; 1989 1990 dev = ieee80211_alloc_hw(sizeof(*priv), &openwifi_ops); 1991 if (!dev) { 1992 printk(KERN_ERR "%s openwifi_dev_probe: ieee80211 alloc failed\n",sdr_compatible_str); 1993 err = -ENOMEM; 1994 goto err_free_dev; 1995 } 1996 1997 priv = dev->priv; 1998 priv->pdev = pdev; 1999 2000 err = of_property_read_string(of_find_node_by_path("/"), "model", &fpga_model); 2001 if(err < 0) { 2002 printk("%s openwifi_dev_probe: WARNING unknown openwifi FPGA model %d\n",sdr_compatible_str, err); 2003 priv->fpga_type = SMALL_FPGA; 2004 } else { 2005 // LARGE FPGAs (i.e. ZCU102, Z7035, ZC706) 2006 if(strstr(fpga_model, "ZCU102") != NULL || strstr(fpga_model, "Z7035") != NULL || strstr(fpga_model, "ZC706") != NULL) 2007 priv->fpga_type = LARGE_FPGA; 2008 // SMALL FPGA: (i.e. ZED, ZC702, Z7020) 2009 else if(strstr(fpga_model, "ZED") != NULL || strstr(fpga_model, "ZC702") != NULL || strstr(fpga_model, "Z7020") != NULL) 2010 priv->fpga_type = SMALL_FPGA; 2011 } 2012 2013 // //-------------find ad9361-phy driver for lo/channel control--------------- 2014 priv->actual_rx_lo = 0; 2015 tmp_dev = bus_find_device( &spi_bus_type, NULL, "ad9361-phy", custom_match_spi_dev ); 2016 if (tmp_dev == NULL) { 2017 printk(KERN_ERR "%s find_dev ad9361-phy failed\n",sdr_compatible_str); 2018 err = -ENOMEM; 2019 goto err_free_dev; 2020 } 2021 printk("%s bus_find_device ad9361-phy: %s. driver_data pointer %p\n", sdr_compatible_str, ((struct spi_device*)tmp_dev)->modalias, (void*)(((struct spi_device*)tmp_dev)->dev.driver_data)); 2022 if (((struct spi_device*)tmp_dev)->dev.driver_data == NULL) { 2023 printk(KERN_ERR "%s find_dev ad9361-phy failed. dev.driver_data == NULL\n",sdr_compatible_str); 2024 err = -ENOMEM; 2025 goto err_free_dev; 2026 } 2027 2028 priv->ad9361_phy = ad9361_spi_to_phy((struct spi_device*)tmp_dev); 2029 if (!(priv->ad9361_phy)) { 2030 printk(KERN_ERR "%s ad9361_spi_to_phy failed\n",sdr_compatible_str); 2031 err = -ENOMEM; 2032 goto err_free_dev; 2033 } 2034 printk("%s ad9361_spi_to_phy ad9361-phy: %s\n", sdr_compatible_str, priv->ad9361_phy->spi->modalias); 2035 2036 priv->ctrl_out.en_mask=0xFF; 2037 priv->ctrl_out.index=0x16; 2038 err = ad9361_ctrl_outs_setup(priv->ad9361_phy, &(priv->ctrl_out)); 2039 if (err < 0) { 2040 printk("%s openwifi_dev_probe: WARNING ad9361_ctrl_outs_setup %d\n",sdr_compatible_str, err); 2041 } else { 2042 printk("%s openwifi_dev_probe: ad9361_ctrl_outs_setup en_mask 0x%02x index 0x%02x\n",sdr_compatible_str, priv->ctrl_out.en_mask, priv->ctrl_out.index); 2043 } 2044 2045 reg = ad9361_spi_read(priv->ad9361_phy->spi, REG_CTRL_OUTPUT_POINTER); 2046 printk("%s openwifi_dev_probe: ad9361_spi_read REG_CTRL_OUTPUT_POINTER 0x%02x\n",sdr_compatible_str, reg); 2047 reg = ad9361_spi_read(priv->ad9361_phy->spi, REG_CTRL_OUTPUT_ENABLE); 2048 printk("%s openwifi_dev_probe: ad9361_spi_read REG_CTRL_OUTPUT_ENABLE 0x%02x\n",sdr_compatible_str, reg); 2049 2050 // //-------------find driver: axi_ad9361 hdl ref design module, dac channel--------------- 2051 tmp_dev = bus_find_device( &platform_bus_type, NULL, "cf-ad9361-dds-core-lpc", custom_match_platform_dev ); 2052 if (!tmp_dev) { 2053 printk(KERN_ERR "%s bus_find_device platform_bus_type cf-ad9361-dds-core-lpc failed\n",sdr_compatible_str); 2054 err = -ENOMEM; 2055 goto err_free_dev; 2056 } 2057 2058 tmp_pdev = to_platform_device(tmp_dev); 2059 if (!tmp_pdev) { 2060 printk(KERN_ERR "%s to_platform_device failed\n",sdr_compatible_str); 2061 err = -ENOMEM; 2062 goto err_free_dev; 2063 } 2064 2065 tmp_indio_dev = platform_get_drvdata(tmp_pdev); 2066 if (!tmp_indio_dev) { 2067 printk(KERN_ERR "%s platform_get_drvdata failed\n",sdr_compatible_str); 2068 err = -ENOMEM; 2069 goto err_free_dev; 2070 } 2071 2072 priv->dds_st = iio_priv(tmp_indio_dev); 2073 if (!(priv->dds_st)) { 2074 printk(KERN_ERR "%s iio_priv failed\n",sdr_compatible_str); 2075 err = -ENOMEM; 2076 goto err_free_dev; 2077 } 2078 printk("%s openwifi_dev_probe: cf-ad9361-dds-core-lpc dds_st->version %08x chip_info->name %s\n",sdr_compatible_str,priv->dds_st->version,priv->dds_st->chip_info->name); 2079 cf_axi_dds_datasel(priv->dds_st, -1, DATA_SEL_DMA); 2080 printk("%s openwifi_dev_probe: cf_axi_dds_datasel DATA_SEL_DMA\n",sdr_compatible_str); 2081 2082 // //-------------find driver: axi_ad9361 hdl ref design module, adc channel--------------- 2083 // turn off radio by muting tx 2084 // ad9361_tx_mute(priv->ad9361_phy, 1); 2085 // reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 2086 // reg1 = ad9361_get_tx_atten(priv->ad9361_phy, 1); 2087 // if (reg == AD9361_RADIO_OFF_TX_ATT && reg1 == AD9361_RADIO_OFF_TX_ATT ) { 2088 // priv->rfkill_off = 0;// 0 off, 1 on 2089 // printk("%s openwifi_dev_probe: rfkill radio off\n",sdr_compatible_str); 2090 // } 2091 // else 2092 // printk("%s openwifi_dev_probe: WARNING rfkill radio off failed. tx att read %d %d require %d\n",sdr_compatible_str, reg, reg1, AD9361_RADIO_OFF_TX_ATT); 2093 2094 priv->last_auto_fpga_lbt_th = 134;//just to avoid uninitialized 2095 priv->rssi_correction = 43;//this will be set in real-time by _rf_set_channel() 2096 2097 //priv->rf_bw = 20000000; // Signal quality issue! NOT use for now. 20MHz or 40MHz. 40MHz need ddc/duc. 20MHz works in bypass mode 2098 priv->rf_bw = 40000000; // 20MHz or 40MHz. 40MHz need ddc/duc. 20MHz works in bypass mode 2099 2100 priv->xpu_cfg = XPU_NORMAL; 2101 2102 priv->openofdm_tx_cfg = OPENOFDM_TX_NORMAL; 2103 priv->openofdm_rx_cfg = OPENOFDM_RX_NORMAL; 2104 2105 printk("%s openwifi_dev_probe: priv->rf_bw == %dHz. bool for 20000000 %d, 40000000 %d\n",sdr_compatible_str, priv->rf_bw, (priv->rf_bw==20000000) , (priv->rf_bw==40000000) ); 2106 if (priv->rf_bw == 20000000) { 2107 priv->rx_intf_cfg = RX_INTF_BYPASS; 2108 priv->tx_intf_cfg = TX_INTF_BYPASS; 2109 //priv->rx_freq_offset_to_lo_MHz = 0; 2110 //priv->tx_freq_offset_to_lo_MHz = 0; 2111 } else if (priv->rf_bw == 40000000) { 2112 //priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_P_10MHZ; //work 2113 //priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1; //work 2114 2115 // // test ddc at central, duc at central+10M. It works. And also change rx BW from 40MHz to 20MHz in rf_init.sh. Rx sampling rate is still 40Msps 2116 priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT0; 2117 priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0; // Let's use rx0 tx0 as default mode, because it works for both 9361 and 9364 2118 // // try another antenna option 2119 //priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT1; 2120 //priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0; 2121 2122 #if 0 2123 if (priv->rx_intf_cfg == DDC_BW_20MHZ_AT_N_10MHZ) { 2124 priv->rx_freq_offset_to_lo_MHz = -10; 2125 } else if (priv->rx_intf_cfg == DDC_BW_20MHZ_AT_P_10MHZ) { 2126 priv->rx_freq_offset_to_lo_MHz = 10; 2127 } else if (priv->rx_intf_cfg == DDC_BW_20MHZ_AT_0MHZ) { 2128 priv->rx_freq_offset_to_lo_MHz = 0; 2129 } else { 2130 printk("%s openwifi_dev_probe: Warning! priv->rx_intf_cfg == %d\n",sdr_compatible_str,priv->rx_intf_cfg); 2131 } 2132 #endif 2133 } else { 2134 printk("%s openwifi_dev_probe: Warning! priv->rf_bw == %dHz (should be 20000000 or 40000000)\n",sdr_compatible_str, priv->rf_bw); 2135 } 2136 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 2137 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 2138 printk("%s openwifi_dev_probe: test_mode %d\n", sdr_compatible_str, test_mode); 2139 2140 //let's by default turn radio on when probing 2141 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) { 2142 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, false, true, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 2143 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 2144 } else { 2145 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, true, false, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 2146 reg = ad9361_get_tx_atten(priv->ad9361_phy, 1); 2147 } 2148 if (reg == AD9361_RADIO_ON_TX_ATT) { 2149 priv->rfkill_off = 1;// 0 off, 1 on 2150 printk("%s openwifi_dev_probe: rfkill radio on\n",sdr_compatible_str); 2151 } else 2152 printk("%s openwifi_dev_probe: WARNING rfkill radio on failed. tx att read %d require %d\n",sdr_compatible_str, reg, AD9361_RADIO_ON_TX_ATT); 2153 2154 memset(priv->drv_rx_reg_val,0,sizeof(priv->drv_rx_reg_val)); 2155 memset(priv->drv_tx_reg_val,0,sizeof(priv->drv_tx_reg_val)); 2156 memset(priv->drv_xpu_reg_val,0,sizeof(priv->drv_xpu_reg_val)); 2157 2158 // //set ad9361 in certain mode 2159 #if 0 2160 err = ad9361_set_trx_clock_chain_freq(priv->ad9361_phy,priv->rf_bw); 2161 printk("%s openwifi_dev_probe: ad9361_set_trx_clock_chain_freq %dHz err %d\n",sdr_compatible_str, priv->rf_bw,err); 2162 err = ad9361_update_rf_bandwidth(priv->ad9361_phy,priv->rf_bw,priv->rf_bw); 2163 printk("%s openwifi_dev_probe: ad9361_update_rf_bandwidth %dHz err %d\n",sdr_compatible_str, priv->rf_bw,err); 2164 2165 rx_intf_api->hw_init(priv->rx_intf_cfg,8,8); 2166 tx_intf_api->hw_init(priv->tx_intf_cfg,8,8,priv->fpga_type); 2167 openofdm_tx_api->hw_init(priv->openofdm_tx_cfg); 2168 openofdm_rx_api->hw_init(priv->openofdm_rx_cfg); 2169 printk("%s openwifi_dev_probe: rx_intf_cfg %d openofdm_rx_cfg %d tx_intf_cfg %d openofdm_tx_cfg %d\n",sdr_compatible_str, priv->rx_intf_cfg, priv->openofdm_rx_cfg, priv->tx_intf_cfg, priv->openofdm_tx_cfg); 2170 printk("%s openwifi_dev_probe: rx_freq_offset_to_lo_MHz %d tx_freq_offset_to_lo_MHz %d\n",sdr_compatible_str, priv->rx_freq_offset_to_lo_MHz, priv->tx_freq_offset_to_lo_MHz); 2171 #endif 2172 2173 dev->max_rates = 1; //maximum number of alternate rate retry stages the hw can handle. 2174 2175 SET_IEEE80211_DEV(dev, &pdev->dev); 2176 platform_set_drvdata(pdev, dev); 2177 2178 BUILD_BUG_ON(sizeof(priv->rates_2GHz) != sizeof(openwifi_2GHz_rates)); 2179 BUILD_BUG_ON(sizeof(priv->rates_5GHz) != sizeof(openwifi_5GHz_rates)); 2180 BUILD_BUG_ON(sizeof(priv->channels_2GHz) != sizeof(openwifi_2GHz_channels)); 2181 BUILD_BUG_ON(sizeof(priv->channels_5GHz) != sizeof(openwifi_5GHz_channels)); 2182 2183 memcpy(priv->rates_2GHz, openwifi_2GHz_rates, sizeof(openwifi_2GHz_rates)); 2184 memcpy(priv->rates_5GHz, openwifi_5GHz_rates, sizeof(openwifi_5GHz_rates)); 2185 memcpy(priv->channels_2GHz, openwifi_2GHz_channels, sizeof(openwifi_2GHz_channels)); 2186 memcpy(priv->channels_5GHz, openwifi_5GHz_channels, sizeof(openwifi_5GHz_channels)); 2187 2188 priv->band = BAND_5_8GHZ; //this can be changed by band _rf_set_channel() (2.4GHz ERP(OFDM)) (5GHz OFDM) 2189 priv->channel = 44; //currently useless. this can be changed by band _rf_set_channel() 2190 priv->use_short_slot = false; //this can be changed by openwifi_bss_info_changed: BSS_CHANGED_ERP_SLOT 2191 priv->ampdu_reference = 0; 2192 2193 priv->band_2GHz.band = NL80211_BAND_2GHZ; 2194 priv->band_2GHz.channels = priv->channels_2GHz; 2195 priv->band_2GHz.n_channels = ARRAY_SIZE(priv->channels_2GHz); 2196 priv->band_2GHz.bitrates = priv->rates_2GHz; 2197 priv->band_2GHz.n_bitrates = ARRAY_SIZE(priv->rates_2GHz); 2198 priv->band_2GHz.ht_cap.ht_supported = true; 2199 priv->band_2GHz.ht_cap.cap = IEEE80211_HT_CAP_SGI_20; 2200 priv->band_2GHz.ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_8K; 2201 priv->band_2GHz.ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_2; 2202 memset(&priv->band_2GHz.ht_cap.mcs, 0, sizeof(priv->band_2GHz.ht_cap.mcs)); 2203 priv->band_2GHz.ht_cap.mcs.rx_mask[0] = 0xff; 2204 priv->band_2GHz.ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 2205 dev->wiphy->bands[NL80211_BAND_2GHZ] = &(priv->band_2GHz); 2206 2207 priv->band_5GHz.band = NL80211_BAND_5GHZ; 2208 priv->band_5GHz.channels = priv->channels_5GHz; 2209 priv->band_5GHz.n_channels = ARRAY_SIZE(priv->channels_5GHz); 2210 priv->band_5GHz.bitrates = priv->rates_5GHz; 2211 priv->band_5GHz.n_bitrates = ARRAY_SIZE(priv->rates_5GHz); 2212 priv->band_5GHz.ht_cap.ht_supported = true; 2213 priv->band_5GHz.ht_cap.cap = IEEE80211_HT_CAP_SGI_20; 2214 priv->band_5GHz.ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_8K; 2215 priv->band_5GHz.ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_2; 2216 memset(&priv->band_5GHz.ht_cap.mcs, 0, sizeof(priv->band_5GHz.ht_cap.mcs)); 2217 priv->band_5GHz.ht_cap.mcs.rx_mask[0] = 0xff; 2218 priv->band_5GHz.ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 2219 dev->wiphy->bands[NL80211_BAND_5GHZ] = &(priv->band_5GHz); 2220 2221 printk("%s openwifi_dev_probe: band_2GHz.n_channels %d n_bitrates %d band_5GHz.n_channels %d n_bitrates %d\n",sdr_compatible_str, 2222 priv->band_2GHz.n_channels,priv->band_2GHz.n_bitrates,priv->band_5GHz.n_channels,priv->band_5GHz.n_bitrates); 2223 2224 ieee80211_hw_set(dev, HOST_BROADCAST_PS_BUFFERING); 2225 ieee80211_hw_set(dev, RX_INCLUDES_FCS); 2226 ieee80211_hw_set(dev, BEACON_TX_STATUS); 2227 ieee80211_hw_set(dev, AMPDU_AGGREGATION); 2228 2229 dev->vif_data_size = sizeof(struct openwifi_vif); 2230 dev->wiphy->interface_modes = 2231 BIT(NL80211_IFTYPE_MONITOR)| 2232 BIT(NL80211_IFTYPE_P2P_GO) | 2233 BIT(NL80211_IFTYPE_P2P_CLIENT) | 2234 BIT(NL80211_IFTYPE_AP) | 2235 BIT(NL80211_IFTYPE_STATION) | 2236 BIT(NL80211_IFTYPE_ADHOC) | 2237 BIT(NL80211_IFTYPE_MESH_POINT) | 2238 BIT(NL80211_IFTYPE_OCB); 2239 dev->wiphy->iface_combinations = &openwifi_if_comb; 2240 dev->wiphy->n_iface_combinations = 1; 2241 2242 dev->wiphy->regulatory_flags = (REGULATORY_STRICT_REG|REGULATORY_CUSTOM_REG); // use our own config within strict regulation 2243 //dev->wiphy->regulatory_flags = REGULATORY_CUSTOM_REG; // use our own config 2244 wiphy_apply_custom_regulatory(dev->wiphy, &sdr_regd); 2245 2246 chip_name = "ZYNQ"; 2247 2248 /* we declare to MAC80211 all the queues except for beacon queue 2249 * that will be eventually handled by DRV. 2250 * TX rings are arranged in such a way that lower is the IDX, 2251 * higher is the priority, in order to achieve direct mapping 2252 * with mac80211, however the beacon queue is an exception and it 2253 * is mapped on the highst tx ring IDX. 2254 */ 2255 dev->queues = MAX_NUM_HW_QUEUE; 2256 //dev->queues = 1; 2257 2258 ieee80211_hw_set(dev, SIGNAL_DBM); 2259 2260 wiphy_ext_feature_set(dev->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST); 2261 2262 priv->rf = &ad9361_rf_ops; 2263 2264 memset(priv->dest_mac_addr_queue_map,0,sizeof(priv->dest_mac_addr_queue_map)); 2265 priv->slice_idx = 0xFFFFFFFF; 2266 2267 sg_init_table(&(priv->tx_sg), 1); 2268 2269 get_random_bytes(&rand_val, sizeof(rand_val)); 2270 rand_val%=250; 2271 priv->mac_addr[0]=0x66; priv->mac_addr[1]=0x55; priv->mac_addr[2]=0x44; priv->mac_addr[3]=0x33; priv->mac_addr[4]=0x22; 2272 priv->mac_addr[5]=rand_val+1; 2273 //priv->mac_addr[5]=0x11; 2274 if (!is_valid_ether_addr(priv->mac_addr)) { 2275 printk(KERN_WARNING "%s openwifi_dev_probe: WARNING Invalid hwaddr! Using randomly generated MAC addr\n",sdr_compatible_str); 2276 eth_random_addr(priv->mac_addr); 2277 } else { 2278 printk("%s openwifi_dev_probe: mac_addr %02x:%02x:%02x:%02x:%02x:%02x\n",sdr_compatible_str,priv->mac_addr[0],priv->mac_addr[1],priv->mac_addr[2],priv->mac_addr[3],priv->mac_addr[4],priv->mac_addr[5]); 2279 } 2280 SET_IEEE80211_PERM_ADDR(dev, priv->mac_addr); 2281 2282 spin_lock_init(&priv->lock); 2283 2284 err = ieee80211_register_hw(dev); 2285 if (err) { 2286 pr_err(KERN_ERR "%s openwifi_dev_probe: WARNING Cannot register device\n",sdr_compatible_str); 2287 goto err_free_dev; 2288 } else { 2289 printk("%s openwifi_dev_probe: ieee80211_register_hw %d\n",sdr_compatible_str, err); 2290 } 2291 2292 // // //--------------------hook leds (not complete yet)-------------------------------- 2293 // tmp_dev = bus_find_device( &platform_bus_type, NULL, "leds", custom_match_platform_dev ); //leds is the name in devicetree, not "compatible" field 2294 // if (!tmp_dev) { 2295 // printk(KERN_ERR "%s bus_find_device platform_bus_type leds-gpio failed\n",sdr_compatible_str); 2296 // err = -ENOMEM; 2297 // goto err_free_dev; 2298 // } 2299 2300 // tmp_pdev = to_platform_device(tmp_dev); 2301 // if (!tmp_pdev) { 2302 // printk(KERN_ERR "%s to_platform_device failed for leds-gpio\n",sdr_compatible_str); 2303 // err = -ENOMEM; 2304 // goto err_free_dev; 2305 // } 2306 2307 // tmp_led_priv = platform_get_drvdata(tmp_pdev); 2308 // if (!tmp_led_priv) { 2309 // printk(KERN_ERR "%s platform_get_drvdata failed for leds-gpio\n",sdr_compatible_str); 2310 // err = -ENOMEM; 2311 // goto err_free_dev; 2312 // } 2313 // printk("%s openwifi_dev_probe: leds-gpio detect %d leds!\n",sdr_compatible_str, tmp_led_priv->num_leds); 2314 // if (tmp_led_priv->num_leds!=4){ 2315 // printk(KERN_ERR "%s WARNING we expect 4 leds, but actual %d leds\n",sdr_compatible_str,tmp_led_priv->num_leds); 2316 // err = -ENOMEM; 2317 // goto err_free_dev; 2318 // } 2319 // gpiod_set_value(tmp_led_priv->leds[0].gpiod, 1);//light it 2320 // gpiod_set_value(tmp_led_priv->leds[3].gpiod, 0);//black it 2321 // priv->num_led = tmp_led_priv->num_leds; 2322 // priv->led[0] = &(tmp_led_priv->leds[0].cdev); 2323 // priv->led[1] = &(tmp_led_priv->leds[1].cdev); 2324 // priv->led[2] = &(tmp_led_priv->leds[2].cdev); 2325 // priv->led[3] = &(tmp_led_priv->leds[3].cdev); 2326 2327 // snprintf(priv->led_name[0], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::radio", wiphy_name(dev->wiphy)); 2328 // snprintf(priv->led_name[1], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::assoc", wiphy_name(dev->wiphy)); 2329 // snprintf(priv->led_name[2], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::tx", wiphy_name(dev->wiphy)); 2330 // snprintf(priv->led_name[3], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::rx", wiphy_name(dev->wiphy)); 2331 2332 wiphy_info(dev->wiphy, "hwaddr %pm, %s + %s\n", 2333 priv->mac_addr, chip_name, priv->rf->name); 2334 2335 openwifi_rfkill_init(dev); 2336 return 0; 2337 2338 err_free_dev: 2339 ieee80211_free_hw(dev); 2340 2341 return err; 2342 } 2343 2344 static int openwifi_dev_remove(struct platform_device *pdev) 2345 { 2346 struct ieee80211_hw *dev = platform_get_drvdata(pdev); 2347 2348 if (!dev) { 2349 pr_info("%s openwifi_dev_remove: dev %p\n", sdr_compatible_str, (void*)dev); 2350 return(-1); 2351 } 2352 2353 openwifi_rfkill_exit(dev); 2354 ieee80211_unregister_hw(dev); 2355 ieee80211_free_hw(dev); 2356 return(0); 2357 } 2358 2359 static struct platform_driver openwifi_dev_driver = { 2360 .driver = { 2361 .name = "sdr,sdr", 2362 .owner = THIS_MODULE, 2363 .of_match_table = openwifi_dev_of_ids, 2364 }, 2365 .probe = openwifi_dev_probe, 2366 .remove = openwifi_dev_remove, 2367 }; 2368 2369 module_platform_driver(openwifi_dev_driver); 2370