1 // Author: Xianjun Jiao, Michael Mehari, Wei Liu 2 // SPDX-FileCopyrightText: 2019 UGent 3 // SPDX-License-Identifier: AGPL-3.0-or-later 4 5 #include <linux/bitops.h> 6 #include <linux/dmapool.h> 7 #include <linux/io.h> 8 #include <linux/iopoll.h> 9 #include <linux/of_address.h> 10 #include <linux/of_platform.h> 11 #include <linux/of_irq.h> 12 #include <linux/slab.h> 13 #include <linux/clk.h> 14 #include <linux/io-64-nonatomic-lo-hi.h> 15 16 #include <linux/delay.h> 17 #include <linux/interrupt.h> 18 19 #include <linux/dmaengine.h> 20 #include <linux/slab.h> 21 #include <linux/delay.h> 22 #include <linux/etherdevice.h> 23 24 #include <linux/init.h> 25 #include <linux/kthread.h> 26 #include <linux/module.h> 27 #include <linux/of_dma.h> 28 #include <linux/platform_device.h> 29 #include <linux/random.h> 30 #include <linux/slab.h> 31 #include <linux/wait.h> 32 #include <linux/sched/task.h> 33 #include <linux/dma/xilinx_dma.h> 34 #include <linux/spi/spi.h> 35 #include <net/mac80211.h> 36 37 #include <linux/clk.h> 38 #include <linux/clkdev.h> 39 #include <linux/clk-provider.h> 40 41 #include <linux/iio/iio.h> 42 #include <linux/iio/sysfs.h> 43 44 #include <linux/gpio.h> 45 #include <linux/leds.h> 46 47 #define IIO_AD9361_USE_PRIVATE_H_ 48 #include "ad9361/ad9361_regs.h" 49 #include "ad9361/ad9361.h" 50 #include "ad9361/ad9361_private.h" 51 52 #include <../../drivers/iio/frequency/cf_axi_dds.h> 53 54 #include "../user_space/sdrctl_src/nl80211_testmode_def.h" 55 #include "hw_def.h" 56 #include "sdr.h" 57 #include "git_rev.h" 58 59 // driver API of component driver 60 extern struct tx_intf_driver_api *tx_intf_api; 61 extern struct rx_intf_driver_api *rx_intf_api; 62 extern struct openofdm_tx_driver_api *openofdm_tx_api; 63 extern struct openofdm_rx_driver_api *openofdm_rx_api; 64 extern struct xpu_driver_api *xpu_api; 65 66 static int test_mode = 0; // 0 normal; 1 rx test 67 68 MODULE_AUTHOR("Xianjun Jiao"); 69 MODULE_DESCRIPTION("SDR driver"); 70 MODULE_LICENSE("GPL v2"); 71 72 module_param(test_mode, int, 0); 73 MODULE_PARM_DESC(myint, "test_mode. 0 normal; 1 rx test"); 74 75 // ---------------rfkill--------------------------------------- 76 static bool openwifi_is_radio_enabled(struct openwifi_priv *priv) 77 { 78 int reg; 79 80 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) 81 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 82 else 83 reg = ad9361_get_tx_atten(priv->ad9361_phy, 1); 84 85 if (reg == AD9361_RADIO_ON_TX_ATT) 86 return true;// 0 off, 1 on 87 return false; 88 } 89 90 void openwifi_rfkill_init(struct ieee80211_hw *hw) 91 { 92 struct openwifi_priv *priv = hw->priv; 93 94 priv->rfkill_off = openwifi_is_radio_enabled(priv); 95 printk("%s openwifi_rfkill_init: wireless switch is %s\n", sdr_compatible_str, priv->rfkill_off ? "on" : "off"); 96 wiphy_rfkill_set_hw_state(hw->wiphy, !priv->rfkill_off); 97 wiphy_rfkill_start_polling(hw->wiphy); 98 } 99 100 void openwifi_rfkill_poll(struct ieee80211_hw *hw) 101 { 102 bool enabled; 103 struct openwifi_priv *priv = hw->priv; 104 105 enabled = openwifi_is_radio_enabled(priv); 106 // printk("%s openwifi_rfkill_poll: wireless radio switch turned %s\n", sdr_compatible_str, enabled ? "on" : "off"); 107 if (unlikely(enabled != priv->rfkill_off)) { 108 priv->rfkill_off = enabled; 109 printk("%s openwifi_rfkill_poll: WARNING wireless radio switch turned %s\n", sdr_compatible_str, enabled ? "on" : "off"); 110 wiphy_rfkill_set_hw_state(hw->wiphy, !enabled); 111 } 112 } 113 114 void openwifi_rfkill_exit(struct ieee80211_hw *hw) 115 { 116 printk("%s openwifi_rfkill_exit\n", sdr_compatible_str); 117 wiphy_rfkill_stop_polling(hw->wiphy); 118 } 119 //----------------rfkill end----------------------------------- 120 121 //static void ad9361_rf_init(void); 122 //static void ad9361_rf_stop(void); 123 //static void ad9361_rf_calc_rssi(void); 124 static void ad9361_rf_set_channel(struct ieee80211_hw *dev, 125 struct ieee80211_conf *conf) 126 { 127 struct openwifi_priv *priv = dev->priv; 128 u32 actual_rx_lo = conf->chandef.chan->center_freq - priv->rx_freq_offset_to_lo_MHz + priv->drv_rx_reg_val[DRV_RX_REG_IDX_EXTRA_FO]; 129 u32 actual_tx_lo; 130 bool change_flag = (actual_rx_lo != priv->actual_rx_lo); 131 132 if (change_flag) { 133 priv->actual_rx_lo = actual_rx_lo; 134 135 actual_tx_lo = conf->chandef.chan->center_freq - priv->tx_freq_offset_to_lo_MHz; 136 137 ad9361_clk_set_rate(priv->ad9361_phy->clks[RX_RFPLL], ( ((u64)1000000ull)*((u64)actual_rx_lo )>>1) ); 138 ad9361_clk_set_rate(priv->ad9361_phy->clks[TX_RFPLL], ( ((u64)1000000ull)*((u64)actual_tx_lo )>>1) ); 139 140 if (actual_rx_lo<2412) { 141 priv->rssi_correction = 153; 142 } else if (actual_rx_lo<=2484) { 143 priv->rssi_correction = 153; 144 } else if (actual_rx_lo<5160) { 145 priv->rssi_correction = 153; 146 } else if (actual_rx_lo<=5240) { 147 priv->rssi_correction = 145; 148 } else if (actual_rx_lo<=5320) { 149 priv->rssi_correction = 148; 150 } else { 151 priv->rssi_correction = 148; 152 } 153 154 // xpu_api->XPU_REG_LBT_TH_write((priv->rssi_correction-62)<<1); // -62dBm 155 xpu_api->XPU_REG_LBT_TH_write((priv->rssi_correction-62-16)<<1); // wei's magic value is 135, here is 134 @ ch 44 156 157 if (actual_rx_lo < 2500) { 158 //priv->slot_time = 20; //20 is default slot time in ERP(OFDM)/11g 2.4G; short one is 9. 159 //xpu_api->XPU_REG_BAND_CHANNEL_write(BAND_2_4GHZ<<16); 160 if (priv->band != BAND_2_4GHZ) { 161 priv->band = BAND_2_4GHZ; 162 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 163 } 164 // //xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((45+2)*10)<<16) | 10 ); // high 16 bits to cover sig valid of ACK packet, low 16 bits is adjustment of fcs valid waiting time. let's add 2us for those device that is really "slow"! 165 // xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((45+2+2)*10)<<16) | 10 );//add 2us for longer fir. BUT corrding to FPGA probing test, we do not need this 166 // xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 0 ); 167 // tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write(((10)*10)<<16); 168 } 169 else { 170 //priv->slot_time = 9; //default slot time of OFDM PHY (OFDM by default means 5GHz) 171 // xpu_api->XPU_REG_BAND_CHANNEL_write(BAND_5_8GHZ<<16); 172 if (priv->band != BAND_5_8GHZ) { 173 priv->band = BAND_5_8GHZ; 174 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 175 } 176 // //xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((51+2)*10)<<16) | 10 ); // because 5GHz needs longer SIFS (16 instead of 10), we need 58 instead of 48 for XPU low mac setting. let's add 2us for those device that is really "slow"! 177 // xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((51+2+2)*10)<<16) | 10 );//add 2us for longer fir. BUT corrding to FPGA probing test, we do not need this 178 // //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 60*10 ); 179 // xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 50*10 );// for longer fir we need this delay 1us shorter 180 // tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write(((16)*10)<<16); 181 } 182 //printk("%s ad9361_rf_set_channel %dM rssi_correction %d\n", sdr_compatible_str,conf->chandef.chan->center_freq,priv->rssi_correction); 183 // //-- use less 184 //clk_prepare_enable(priv->ad9361_phy->clks[RX_RFPLL]); 185 //printk("%s ad9361_rf_set_channel tune to %d read back %llu\n", sdr_compatible_str,conf->chandef.chan->center_freq,2*priv->ad9361_phy->state->current_rx_lo_freq); 186 //ad9361_set_trx_clock_chain_default(priv->ad9361_phy); 187 //printk("%s ad9361_rf_set_channel tune to %d read back %llu\n", sdr_compatible_str,conf->chandef.chan->center_freq,2*priv->ad9361_phy->state->current_rx_lo_freq); 188 } 189 printk("%s ad9361_rf_set_channel %dM rssi_correction %d (change flag %d)\n", sdr_compatible_str,conf->chandef.chan->center_freq,priv->rssi_correction,change_flag); 190 } 191 192 const struct openwifi_rf_ops ad9361_rf_ops = { 193 .name = "ad9361", 194 // .init = ad9361_rf_init, 195 // .stop = ad9361_rf_stop, 196 .set_chan = ad9361_rf_set_channel, 197 // .calc_rssi = ad9361_rf_calc_rssi, 198 }; 199 200 u16 reverse16(u16 d) { 201 union u16_byte2 tmp0, tmp1; 202 tmp0.a = d; 203 tmp1.c[0] = tmp0.c[1]; 204 tmp1.c[1] = tmp0.c[0]; 205 return(tmp1.a); 206 } 207 208 u32 reverse32(u32 d) { 209 union u32_byte4 tmp0, tmp1; 210 tmp0.a = d; 211 tmp1.c[0] = tmp0.c[3]; 212 tmp1.c[1] = tmp0.c[2]; 213 tmp1.c[2] = tmp0.c[1]; 214 tmp1.c[3] = tmp0.c[0]; 215 return(tmp1.a); 216 } 217 218 static int openwifi_init_tx_ring(struct openwifi_priv *priv, int ring_idx) 219 { 220 struct openwifi_ring *ring = &(priv->tx_ring[ring_idx]); 221 int i; 222 223 ring->stop_flag = 0; 224 ring->bd_wr_idx = 0; 225 ring->bd_rd_idx = 0; 226 ring->bds = kmalloc(sizeof(struct openwifi_buffer_descriptor)*NUM_TX_BD,GFP_KERNEL); 227 if (ring->bds==NULL) { 228 printk("%s openwifi_init_tx_ring: WARNING Cannot allocate TX ring\n",sdr_compatible_str); 229 return -ENOMEM; 230 } 231 232 for (i = 0; i < NUM_TX_BD; i++) { 233 ring->bds[i].skb_linked=0; // for tx, skb is from upper layer 234 //at first right after skb allocated, head, data, tail are the same. 235 ring->bds[i].dma_mapping_addr = 0; // for tx, mapping is done after skb is received from upper layer in tx routine 236 } 237 238 return 0; 239 } 240 241 static void openwifi_free_tx_ring(struct openwifi_priv *priv, int ring_idx) 242 { 243 struct openwifi_ring *ring = &(priv->tx_ring[ring_idx]); 244 int i; 245 246 ring->stop_flag = 0; 247 ring->bd_wr_idx = 0; 248 ring->bd_rd_idx = 0; 249 for (i = 0; i < NUM_TX_BD; i++) { 250 if (ring->bds[i].skb_linked == 0 && ring->bds[i].dma_mapping_addr == 0) 251 continue; 252 if (ring->bds[i].dma_mapping_addr != 0) 253 dma_unmap_single(priv->tx_chan->device->dev, ring->bds[i].dma_mapping_addr,ring->bds[i].skb_linked->len, DMA_MEM_TO_DEV); 254 // if (ring->bds[i].skb_linked!=NULL) 255 // dev_kfree_skb(ring->bds[i].skb_linked); // only use dev_kfree_skb when there is exception 256 if ( (ring->bds[i].dma_mapping_addr != 0 && ring->bds[i].skb_linked == 0) || 257 (ring->bds[i].dma_mapping_addr == 0 && ring->bds[i].skb_linked != 0)) 258 printk("%s openwifi_free_tx_ring: WARNING ring %d i %d skb_linked %p dma_mapping_addr %08x\n", sdr_compatible_str, 259 ring_idx, i, (void*)(ring->bds[i].skb_linked), ring->bds[i].dma_mapping_addr); 260 261 ring->bds[i].skb_linked=0; 262 ring->bds[i].dma_mapping_addr = 0; 263 } 264 if (ring->bds) 265 kfree(ring->bds); 266 ring->bds = NULL; 267 } 268 269 static int openwifi_init_rx_ring(struct openwifi_priv *priv) 270 { 271 int i; 272 u8 *pdata_tmp; 273 274 priv->rx_cyclic_buf = dma_alloc_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,&priv->rx_cyclic_buf_dma_mapping_addr,GFP_KERNEL); 275 if (!priv->rx_cyclic_buf) { 276 printk("%s openwifi_init_rx_ring: WARNING dma_alloc_coherent failed!\n", sdr_compatible_str); 277 dma_free_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,priv->rx_cyclic_buf,priv->rx_cyclic_buf_dma_mapping_addr); 278 return(-1); 279 } 280 281 // Set tsft_low and tsft_high to 0. If they are not zero, it means there is a packet in the buffer by DMA 282 for (i=0; i<NUM_RX_BD; i++) { 283 pdata_tmp = priv->rx_cyclic_buf + i*RX_BD_BUF_SIZE; // our header insertion is at the beginning 284 (*((u32*)(pdata_tmp+0 ))) = 0; 285 (*((u32*)(pdata_tmp+4 ))) = 0; 286 } 287 printk("%s openwifi_init_rx_ring: tsft_low and tsft_high are cleared!\n", sdr_compatible_str); 288 289 return 0; 290 } 291 292 static void openwifi_free_rx_ring(struct openwifi_priv *priv) 293 { 294 if (priv->rx_cyclic_buf) 295 dma_free_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,priv->rx_cyclic_buf,priv->rx_cyclic_buf_dma_mapping_addr); 296 297 priv->rx_cyclic_buf_dma_mapping_addr = 0; 298 priv->rx_cyclic_buf = 0; 299 } 300 301 static int rx_dma_setup(struct ieee80211_hw *dev){ 302 struct openwifi_priv *priv = dev->priv; 303 struct dma_device *rx_dev = priv->rx_chan->device; 304 305 priv->rxd = rx_dev->device_prep_dma_cyclic(priv->rx_chan,priv->rx_cyclic_buf_dma_mapping_addr,RX_BD_BUF_SIZE*NUM_RX_BD,RX_BD_BUF_SIZE,DMA_DEV_TO_MEM,DMA_CTRL_ACK|DMA_PREP_INTERRUPT); 306 if (!(priv->rxd)) { 307 openwifi_free_rx_ring(priv); 308 printk("%s rx_dma_setup: WARNING rx_dev->device_prep_dma_cyclic %p\n", sdr_compatible_str, (void*)(priv->rxd)); 309 return(-1); 310 } 311 priv->rxd->callback = 0; 312 priv->rxd->callback_param = 0; 313 314 priv->rx_cookie = priv->rxd->tx_submit(priv->rxd); 315 316 if (dma_submit_error(priv->rx_cookie)) { 317 printk("%s rx_dma_setup: WARNING dma_submit_error(rx_cookie) %d\n", sdr_compatible_str, (u32)(priv->rx_cookie)); 318 return(-1); 319 } 320 321 dma_async_issue_pending(priv->rx_chan); 322 return(0); 323 } 324 325 static irqreturn_t openwifi_rx_interrupt(int irq, void *dev_id) 326 { 327 struct ieee80211_hw *dev = dev_id; 328 struct openwifi_priv *priv = dev->priv; 329 struct ieee80211_rx_status rx_status = {0}; 330 struct sk_buff *skb; 331 struct ieee80211_hdr *hdr; 332 u32 addr1_low32=0, addr2_low32=0, addr3_low32=0, len, rate_idx, tsft_low, tsft_high, loop_count=0, ht_flag, short_gi;//, fc_di; 333 // u32 dma_driver_buf_idx_mod; 334 u8 *pdata_tmp, fcs_ok;//, target_buf_idx;//, phy_rx_sn_hw; 335 s8 signal; 336 u16 rssi_val, addr1_high16=0, addr2_high16=0, addr3_high16=0, sc=0; 337 bool content_ok = false, len_overflow = false; 338 static u8 target_buf_idx_old = 0; 339 340 spin_lock(&priv->lock); 341 342 while(1) { // loop all rx buffers that have new rx packets 343 pdata_tmp = priv->rx_cyclic_buf + target_buf_idx_old*RX_BD_BUF_SIZE; // our header insertion is at the beginning 344 tsft_low = (*((u32*)(pdata_tmp+0 ))); 345 tsft_high = (*((u32*)(pdata_tmp+4 ))); 346 if ( tsft_low==0 && tsft_high==0 ) // no packet in the buffer 347 break; 348 349 rssi_val = (*((u16*)(pdata_tmp+8 ))); 350 len = (*((u16*)(pdata_tmp+12))); 351 352 len_overflow = (len>(RX_BD_BUF_SIZE-16)?true:false); 353 354 rate_idx = (*((u16*)(pdata_tmp+14))); 355 short_gi = ((rate_idx&0x20)!=0); 356 rate_idx = (rate_idx&0xDF); 357 358 fcs_ok = ( len_overflow?0:(*(( u8*)(pdata_tmp+16+len-1))) ); 359 360 //phy_rx_sn_hw = (fcs_ok&(NUM_RX_BD-1)); 361 // phy_rx_sn_hw = (fcs_ok&0x7f);//0x7f is FPGA limitation 362 // dma_driver_buf_idx_mod = (state.residue&0x7f); 363 fcs_ok = ((fcs_ok&0x80)!=0); 364 ht_flag = ((rate_idx&0x10)!=0); 365 366 if ( (len>=14 && (!len_overflow)) && (rate_idx>=8 && rate_idx<=23)) { 367 // if ( phy_rx_sn_hw!=dma_driver_buf_idx_mod) { 368 // printk("%s openwifi_rx_interrupt: WARNING sn %d next buf_idx %d!\n", sdr_compatible_str,phy_rx_sn_hw,dma_driver_buf_idx_mod); 369 // } 370 content_ok = true; 371 } else { 372 printk("%s openwifi_rx_interrupt: WARNING content!\n", sdr_compatible_str); 373 content_ok = false; 374 } 375 376 rssi_val = (rssi_val>>1); 377 if ( (rssi_val+128)<priv->rssi_correction ) 378 signal = -128; 379 else 380 signal = rssi_val - priv->rssi_correction; 381 382 // fc_di = (*((u32*)(pdata_tmp+16))); 383 // addr1_high16 = (*((u16*)(pdata_tmp+16+4))); 384 // addr1_low32 = (*((u32*)(pdata_tmp+16+4+2))); 385 // addr2_high16 = (*((u16*)(pdata_tmp+16+6+4))); 386 // addr2_low32 = (*((u32*)(pdata_tmp+16+6+4+2))); 387 // addr3_high16 = (*((u16*)(pdata_tmp+16+12+4))); 388 // addr3_low32 = (*((u32*)(pdata_tmp+16+12+4+2))); 389 if ( (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&2) || ( (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&1) && fcs_ok==0 ) ) { 390 hdr = (struct ieee80211_hdr *)(pdata_tmp+16); 391 addr1_low32 = *((u32*)(hdr->addr1+2)); 392 addr1_high16 = *((u16*)(hdr->addr1)); 393 if (len>=20) { 394 addr2_low32 = *((u32*)(hdr->addr2+2)); 395 addr2_high16 = *((u16*)(hdr->addr2)); 396 } 397 if (len>=26) { 398 addr3_low32 = *((u32*)(hdr->addr3+2)); 399 addr3_high16 = *((u16*)(hdr->addr3)); 400 } 401 if (len>=28) 402 sc = hdr->seq_ctrl; 403 404 if ( addr1_low32!=0xffffffff || addr1_high16!=0xffff ) 405 printk("%s openwifi_rx_interrupt:%4dbytes ht%d %3dM FC%04x DI%04x addr1/2/3:%04x%08x/%04x%08x/%04x%08x SC%04x fcs%d buf_idx%d %ddBm\n", sdr_compatible_str, 406 len, ht_flag, wifi_rate_table[rate_idx], hdr->frame_control, hdr->duration_id, 407 reverse16(addr1_high16), reverse32(addr1_low32), reverse16(addr2_high16), reverse32(addr2_low32), reverse16(addr3_high16), reverse32(addr3_low32), 408 sc, fcs_ok, target_buf_idx_old, signal); 409 } 410 411 // priv->phy_rx_sn_hw_old = phy_rx_sn_hw; 412 if (content_ok) { 413 skb = dev_alloc_skb(len); 414 if (skb) { 415 skb_put_data(skb,pdata_tmp+16,len); 416 417 rx_status.antenna = 0; 418 // def in ieee80211_rate openwifi_rates 0~11. 0~3 11b(1M~11M), 4~11 11a/g(6M~54M) 419 rx_status.rate_idx = wifi_rate_table_mapping[rate_idx]; 420 rx_status.signal = signal; 421 rx_status.freq = dev->conf.chandef.chan->center_freq; 422 rx_status.band = dev->conf.chandef.chan->band; 423 rx_status.mactime = ( ( (u64)tsft_low ) | ( ((u64)tsft_high)<<32 ) ); 424 rx_status.flag |= RX_FLAG_MACTIME_START; 425 if (!fcs_ok) 426 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC; 427 if (rate_idx <= 15) 428 rx_status.encoding = RX_ENC_LEGACY; 429 else 430 rx_status.encoding = RX_ENC_HT; 431 rx_status.bw = RATE_INFO_BW_20; 432 if (short_gi) 433 rx_status.enc_flags |= RX_ENC_FLAG_SHORT_GI; 434 435 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status)); // put rx_status into skb->cb, from now on skb->cb is not dma_dsts any more. 436 ieee80211_rx_irqsafe(dev, skb); // call mac80211 function 437 } else 438 printk("%s openwifi_rx_interrupt: WARNING dev_alloc_skb failed!\n", sdr_compatible_str); 439 } 440 (*((u32*)(pdata_tmp+0 ))) = 0; 441 (*((u32*)(pdata_tmp+4 ))) = 0; // clear the tsft_low and tsft_high to indicate the packet has been processed 442 loop_count++; 443 target_buf_idx_old=((target_buf_idx_old+1)&(NUM_RX_BD-1)); 444 } 445 446 if ( loop_count!=1 && (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&1) ) 447 printk("%s openwifi_rx_interrupt: WARNING loop_count %d\n", sdr_compatible_str,loop_count); 448 449 // openwifi_rx_interrupt_out: 450 spin_unlock(&priv->lock); 451 return IRQ_HANDLED; 452 } 453 454 static irqreturn_t openwifi_tx_interrupt(int irq, void *dev_id) 455 { 456 struct ieee80211_hw *dev = dev_id; 457 struct openwifi_priv *priv = dev->priv; 458 struct openwifi_ring *ring; 459 struct sk_buff *skb; 460 struct ieee80211_tx_info *info; 461 u32 reg_val, hw_queue_len, prio, queue_idx, dma_fifo_no_room_flag, num_slot_random, cw, loop_count=0;//, i; 462 u8 tx_result_report; 463 // u16 prio_rd_idx_store[64]={0}; 464 465 spin_lock(&priv->lock); 466 467 while(1) { // loop all packets that have been sent by FPGA 468 reg_val = tx_intf_api->TX_INTF_REG_PKT_INFO_read(); 469 if (reg_val!=0xFFFFFFFF) { 470 prio = ((0x7FFFF & reg_val)>>(5+NUM_BIT_MAX_PHY_TX_SN+NUM_BIT_MAX_NUM_HW_QUEUE)); 471 cw = ((0xF0000000 & reg_val) >> 28); 472 num_slot_random = ((0xFF80000 ®_val)>>(2+5+NUM_BIT_MAX_PHY_TX_SN+NUM_BIT_MAX_NUM_HW_QUEUE)); 473 if(cw > 10) { 474 cw = 10 ; 475 num_slot_random += 512 ; 476 } 477 478 ring = &(priv->tx_ring[prio]); 479 ring->bd_rd_idx = ((reg_val>>5)&MAX_PHY_TX_SN); 480 skb = ring->bds[ring->bd_rd_idx].skb_linked; 481 482 dma_unmap_single(priv->tx_chan->device->dev,ring->bds[ring->bd_rd_idx].dma_mapping_addr, 483 skb->len, DMA_MEM_TO_DEV); 484 485 if ( ring->stop_flag == 1) { 486 // Wake up Linux queue if FPGA and driver ring have room 487 queue_idx = ((reg_val>>(5+NUM_BIT_MAX_PHY_TX_SN))&(MAX_NUM_HW_QUEUE-1)); 488 dma_fifo_no_room_flag = tx_intf_api->TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read(); 489 hw_queue_len = tx_intf_api->TX_INTF_REG_QUEUE_FIFO_DATA_COUNT_read(); 490 491 // printk("%s openwifi_tx_interrupt: WARNING loop %d prio %d queue %d no room flag %x hw queue len %08x wr %d rd %d call %d\n", sdr_compatible_str, 492 // loop_count, prio, queue_idx, dma_fifo_no_room_flag, hw_queue_len, ring->bd_wr_idx, ring->bd_rd_idx, priv->call_counter); 493 494 if ( ((dma_fifo_no_room_flag>>queue_idx)&1)==0 && (NUM_TX_BD-((hw_queue_len>>(queue_idx*8))&0xFF))>=RING_ROOM_THRESHOLD ) { 495 // printk("%s openwifi_tx_interrupt: WARNING ieee80211_wake_queue loop %d call %d\n", sdr_compatible_str, loop_count, priv->call_counter); 496 printk("%s openwifi_tx_interrupt: WARNING ieee80211_wake_queue prio %d queue %d no room flag %x hw queue len %08x wr %d rd %d\n", sdr_compatible_str, 497 prio, queue_idx, dma_fifo_no_room_flag, hw_queue_len, ring->bd_wr_idx, ring->bd_rd_idx); 498 ieee80211_wake_queue(dev, prio); 499 ring->stop_flag = 0; 500 } 501 } 502 503 if ( (*(u32*)(&(skb->data[4]))) || ((*(u32*)(&(skb->data[12])))&0xFFFF0000) ) { 504 printk("%s openwifi_tx_interrupt: WARNING %08x %08x %08x %08x\n", sdr_compatible_str, *(u32*)(&(skb->data[12])), *(u32*)(&(skb->data[8])), *(u32*)(&(skb->data[4])), *(u32*)(&(skb->data[0]))); 505 continue; 506 } 507 508 skb_pull(skb, LEN_PHY_HEADER); 509 //skb_trim(skb, num_byte_pad_skb); 510 info = IEEE80211_SKB_CB(skb); 511 ieee80211_tx_info_clear_status(info); 512 513 tx_result_report = (reg_val&0x1F); 514 if ( !(info->flags & IEEE80211_TX_CTL_NO_ACK) ) { 515 if ((tx_result_report&0x10)==0) 516 info->flags |= IEEE80211_TX_STAT_ACK; 517 518 // printk("%s openwifi_tx_interrupt: rate&try: %d %d %03x; %d %d %03x; %d %d %03x; %d %d %03x\n", sdr_compatible_str, 519 // info->status.rates[0].idx,info->status.rates[0].count,info->status.rates[0].flags, 520 // info->status.rates[1].idx,info->status.rates[1].count,info->status.rates[1].flags, 521 // info->status.rates[2].idx,info->status.rates[2].count,info->status.rates[2].flags, 522 // info->status.rates[3].idx,info->status.rates[3].count,info->status.rates[3].flags); 523 } 524 525 info->status.rates[0].count = (tx_result_report&0xF) + 1; //according to our test, the 1st rate is the most important. we only do retry on the 1st rate 526 info->status.rates[1].idx = -1; 527 info->status.rates[2].idx = -1; 528 info->status.rates[3].idx = -1;//in mac80211.h: #define IEEE80211_TX_MAX_RATES 4 529 530 if ( (tx_result_report&0x10) && ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&1) ) 531 printk("%s openwifi_tx_interrupt: WARNING tx_result %02x prio%d wr%d rd%d\n", sdr_compatible_str, tx_result_report, prio, ring->bd_wr_idx, ring->bd_rd_idx); 532 if ( (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) && ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&2) ) 533 printk("%s openwifi_tx_interrupt: tx_result %02x prio%d wr%d rd%d num_rand_slot %d cw %d \n", sdr_compatible_str, tx_result_report, prio, ring->bd_wr_idx, ring->bd_rd_idx, num_slot_random,cw); 534 535 ieee80211_tx_status_irqsafe(dev, skb); 536 537 loop_count++; 538 539 // printk("%s openwifi_tx_interrupt: loop %d prio %d rd %d\n", sdr_compatible_str, loop_count, prio, ring->bd_rd_idx); 540 541 } else 542 break; 543 } 544 if ( loop_count!=1 && ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&1) ) 545 printk("%s openwifi_tx_interrupt: WARNING loop_count %d\n", sdr_compatible_str, loop_count); 546 547 spin_unlock(&priv->lock); 548 return IRQ_HANDLED; 549 } 550 551 u32 gen_parity(u32 v){ 552 v ^= v >> 1; 553 v ^= v >> 2; 554 v = (v & 0x11111111U) * 0x11111111U; 555 return (v >> 28) & 1; 556 } 557 558 u8 gen_ht_sig_crc(u64 m) 559 { 560 u8 i, temp, c[8] = {1, 1, 1, 1, 1, 1, 1, 1}, ht_sig_crc; 561 562 for (i = 0; i < 34; i++) 563 { 564 temp = c[7] ^ ((m >> i) & 0x01); 565 566 c[7] = c[6]; 567 c[6] = c[5]; 568 c[5] = c[4]; 569 c[4] = c[3]; 570 c[3] = c[2]; 571 c[2] = c[1] ^ temp; 572 c[1] = c[0] ^ temp; 573 c[0] = temp; 574 } 575 ht_sig_crc = ((~c[7] & 0x01) << 0) | ((~c[6] & 0x01) << 1) | ((~c[5] & 0x01) << 2) | ((~c[4] & 0x01) << 3) | ((~c[3] & 0x01) << 4) | ((~c[2] & 0x01) << 5) | ((~c[1] & 0x01) << 6) | ((~c[0] & 0x01) << 7); 576 577 return ht_sig_crc; 578 } 579 580 u32 calc_phy_header(u8 rate_hw_value, bool use_ht_rate, bool use_short_gi, u32 len, u8 *bytes){ 581 //u32 signal_word = 0 ; 582 u8 SIG_RATE = 0, HT_SIG_RATE; 583 u8 len_2to0, len_10to3, len_msb,b0,b1,b2, header_parity ; 584 u32 l_len, ht_len, ht_sig1, ht_sig2; 585 586 // printk("rate_hw_value=%u\tuse_ht_rate=%u\tuse_short_gi=%u\tlen=%u\n", rate_hw_value, use_ht_rate, use_short_gi, len); 587 588 // HT-mixed mode ht signal 589 590 if(use_ht_rate) 591 { 592 SIG_RATE = wifi_mcs_table_11b_force_up[4]; 593 HT_SIG_RATE = rate_hw_value; 594 l_len = 24 * len / wifi_n_dbps_ht_table[rate_hw_value]; 595 ht_len = len; 596 } 597 else 598 { 599 // rate_hw_value = (rate_hw_value<=4?0:(rate_hw_value-4)); 600 // SIG_RATE = wifi_mcs_table_phy_tx[rate_hw_value]; 601 SIG_RATE = wifi_mcs_table_11b_force_up[rate_hw_value]; 602 l_len = len; 603 } 604 605 len_2to0 = l_len & 0x07 ; 606 len_10to3 = (l_len >> 3 ) & 0xFF ; 607 len_msb = (l_len >> 11) & 0x01 ; 608 609 b0=SIG_RATE | (len_2to0 << 5) ; 610 b1 = len_10to3 ; 611 header_parity = gen_parity((len_msb << 16)| (b1<<8) | b0) ; 612 b2 = ( len_msb | (header_parity << 1) ) ; 613 614 memset(bytes,0,16); 615 bytes[0] = b0 ; 616 bytes[1] = b1 ; 617 bytes[2] = b2; 618 619 // HT-mixed mode signal 620 if(use_ht_rate) 621 { 622 ht_sig1 = (HT_SIG_RATE & 0x7F) | ((ht_len << 8) & 0xFFFF00); 623 ht_sig2 = 0x04 | (use_short_gi << 7); 624 ht_sig2 = ht_sig2 | (gen_ht_sig_crc(ht_sig1 | ht_sig2 << 24) << 10); 625 626 bytes[3] = 1; 627 bytes[8] = (ht_sig1 & 0xFF); 628 bytes[9] = (ht_sig1 >> 8) & 0xFF; 629 bytes[10] = (ht_sig1 >> 16) & 0xFF; 630 bytes[11] = (ht_sig2 & 0xFF); 631 bytes[12] = (ht_sig2 >> 8) & 0xFF; 632 bytes[13] = (ht_sig2 >> 16) & 0xFF; 633 634 return(HT_SIG_RATE); 635 } 636 else 637 { 638 //signal_word = b0+(b1<<8)+(b2<<16) ; 639 //return signal_word; 640 return(SIG_RATE); 641 } 642 } 643 644 static inline struct gpio_led_data * //please align with the implementation in leds-gpio.c 645 cdev_to_gpio_led_data(struct led_classdev *led_cdev) 646 { 647 return container_of(led_cdev, struct gpio_led_data, cdev); 648 } 649 650 static void openwifi_tx(struct ieee80211_hw *dev, 651 struct ieee80211_tx_control *control, 652 struct sk_buff *skb) 653 { 654 struct openwifi_priv *priv = dev->priv; 655 unsigned long flags; 656 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 657 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 658 struct openwifi_ring *ring; 659 dma_addr_t dma_mapping_addr; 660 unsigned int prio, i; 661 u32 num_dma_symbol, len_mac_pdu, num_dma_byte, len_phy_packet, num_byte_pad; 662 u32 rate_signal_value,rate_hw_value,ack_flag; 663 u32 pkt_need_ack, addr1_low32=0, addr2_low32=0, addr3_low32=0, queue_idx=2, dma_reg, cts_reg;//, openofdm_state_history; 664 u16 addr1_high16=0, addr2_high16=0, addr3_high16=0, sc=0, cts_duration=0, cts_rate_hw_value = 0, cts_rate_signal_value=0, sifs, ack_duration=0, traffic_pkt_duration; 665 u8 fc_flag,fc_type,fc_subtype,retry_limit_raw,*dma_buf,retry_limit_hw_value,rc_flags; 666 bool use_rts_cts, use_cts_protect, use_ht_rate=false, use_short_gi, addr_flag, cts_use_traffic_rate=false, force_use_cts_protect=false; 667 __le16 frame_control,duration_id; 668 u32 dma_fifo_no_room_flag, hw_queue_len; 669 enum dma_status status; 670 // static bool led_status=0; 671 // struct gpio_led_data *led_dat = cdev_to_gpio_led_data(priv->led[3]); 672 673 // if ( (priv->phy_tx_sn&7) ==0 ) { 674 // openofdm_state_history = openofdm_rx_api->OPENOFDM_RX_REG_STATE_HISTORY_read(); 675 // if (openofdm_state_history!=openofdm_state_history_old){ 676 // led_status = (~led_status); 677 // openofdm_state_history_old = openofdm_state_history; 678 // gpiod_set_value(led_dat->gpiod, led_status); 679 // } 680 // } 681 682 if (test_mode==1){ 683 printk("%s openwifi_tx: WARNING test_mode==1\n", sdr_compatible_str); 684 goto openwifi_tx_early_out; 685 } 686 687 if (skb->data_len>0) {// more data are not in linear data area skb->data 688 printk("%s openwifi_tx: WARNING skb->data_len>0\n", sdr_compatible_str); 689 goto openwifi_tx_early_out; 690 } 691 692 len_mac_pdu = skb->len; 693 len_phy_packet = len_mac_pdu + LEN_PHY_HEADER; 694 num_dma_symbol = (len_phy_packet>>TX_INTF_NUM_BYTE_PER_DMA_SYMBOL_IN_BITS) + ((len_phy_packet&(TX_INTF_NUM_BYTE_PER_DMA_SYMBOL-1))!=0); 695 696 // get Linux priority/queue setting info and target mac address 697 prio = skb_get_queue_mapping(skb); 698 addr1_low32 = *((u32*)(hdr->addr1+2)); 699 ring = &(priv->tx_ring[prio]); 700 701 // -------------- DO your idea here! Map Linux/SW "prio" to hardware "queue_idx" ----------- 702 if (priv->slice_idx == 0xFFFFFFFF) {// use Linux default prio setting, if there isn't any slice config 703 queue_idx = prio; 704 } else {// customized prio to queue_idx mapping 705 //if (fc_type==2 && fc_subtype==0 && (!addr_flag)) { // for unicast data packet only 706 // check current packet belonging to which slice/hw-queue 707 for (i=0; i<MAX_NUM_HW_QUEUE; i++) { 708 if ( priv->dest_mac_addr_queue_map[i] == addr1_low32 ) { 709 break; 710 } 711 } 712 //} 713 queue_idx = (i>=MAX_NUM_HW_QUEUE?2:i); // if no address is hit, use FPGA queue 2. because the queue 2 is the longest. 714 } 715 // -------------------- end of Map Linux/SW "prio" to hardware "queue_idx" ------------------ 716 717 // check whether the packet is bigger than DMA buffer size 718 num_dma_byte = (num_dma_symbol<<TX_INTF_NUM_BYTE_PER_DMA_SYMBOL_IN_BITS); 719 if (num_dma_byte > TX_BD_BUF_SIZE) { 720 // dev_err(priv->tx_chan->device->dev, "sdr,sdr openwifi_tx: WARNING num_dma_byte > TX_BD_BUF_SIZE\n"); 721 printk("%s openwifi_tx: WARNING sn %d num_dma_byte > TX_BD_BUF_SIZE\n", sdr_compatible_str, ring->bd_wr_idx); 722 goto openwifi_tx_early_out; 723 } 724 num_byte_pad = num_dma_byte-len_phy_packet; 725 726 // get other info from packet header 727 addr1_high16 = *((u16*)(hdr->addr1)); 728 if (len_mac_pdu>=20) { 729 addr2_low32 = *((u32*)(hdr->addr2+2)); 730 addr2_high16 = *((u16*)(hdr->addr2)); 731 } 732 if (len_mac_pdu>=26) { 733 addr3_low32 = *((u32*)(hdr->addr3+2)); 734 addr3_high16 = *((u16*)(hdr->addr3)); 735 } 736 737 duration_id = hdr->duration_id; 738 frame_control=hdr->frame_control; 739 ack_flag = (info->flags&IEEE80211_TX_CTL_NO_ACK); 740 fc_type = ((frame_control)>>2)&3; 741 fc_subtype = ((frame_control)>>4)&0xf; 742 fc_flag = ( fc_type==2 || fc_type==0 || (fc_type==1 && (fc_subtype==8 || fc_subtype==9 || fc_subtype==10) ) ); 743 //if it is broadcasting or multicasting addr 744 addr_flag = ( (addr1_low32==0 && addr1_high16==0) || 745 (addr1_low32==0xFFFFFFFF && addr1_high16==0xFFFF) || 746 (addr1_high16==0x3333) || 747 (addr1_high16==0x0001 && hdr->addr1[2]==0x5E) ); 748 if ( fc_flag && ( !addr_flag ) && (!ack_flag) ) { // unicast data frame 749 pkt_need_ack = 1; //FPGA need to wait ACK after this pkt sent 750 } else { 751 pkt_need_ack = 0; 752 } 753 754 // get Linux rate (MCS) setting 755 rate_hw_value = ieee80211_get_tx_rate(dev, info)->hw_value; 756 //rate_hw_value = 10; //4:6M, 5:9M, 6:12M, 7:18M, 8:24M, 9:36M, 10:48M, 11:54M 757 if (priv->drv_tx_reg_val[DRV_TX_REG_IDX_RATE]>0 && fc_type==2 && (!addr_flag)) //rate override command 758 rate_hw_value = priv->drv_tx_reg_val[DRV_TX_REG_IDX_RATE]; 759 760 retry_limit_raw = info->control.rates[0].count; 761 762 rc_flags = info->control.rates[0].flags; 763 use_rts_cts = ((rc_flags&IEEE80211_TX_RC_USE_RTS_CTS)!=0); 764 use_cts_protect = ((rc_flags&IEEE80211_TX_RC_USE_CTS_PROTECT)!=0); 765 use_ht_rate = ((rc_flags&IEEE80211_TX_RC_MCS)!=0); 766 use_short_gi = ((rc_flags&IEEE80211_TX_RC_SHORT_GI)!=0); 767 768 if (use_rts_cts) 769 printk("%s openwifi_tx: WARNING sn %d use_rts_cts is not supported!\n", sdr_compatible_str, ring->bd_wr_idx); 770 771 if (use_cts_protect) { 772 cts_rate_hw_value = ieee80211_get_rts_cts_rate(dev, info)->hw_value; 773 cts_duration = le16_to_cpu(ieee80211_ctstoself_duration(dev,info->control.vif,len_mac_pdu,info)); 774 } else if (force_use_cts_protect) { // could override mac80211 setting here. 775 cts_rate_hw_value = 4; //wifi_mcs_table_11b_force_up[] translate it to 1011(6M) 776 sifs = (priv->actual_rx_lo<2500?10:16); 777 if (pkt_need_ack) 778 ack_duration = 44;//assume the ack we wait use 6Mbps: 4*ceil((22+14*8)/24) + 20(preamble+SIGNAL) 779 traffic_pkt_duration = 20 + 4*(((22+len_mac_pdu*8)/wifi_n_dbps_table[rate_hw_value])+1); 780 cts_duration = traffic_pkt_duration + sifs + pkt_need_ack*(sifs+ack_duration); 781 } 782 783 // this is 11b stuff 784 // if (info->flags&IEEE80211_TX_RC_USE_SHORT_PREAMBLE) 785 // printk("%s openwifi_tx: WARNING IEEE80211_TX_RC_USE_SHORT_PREAMBLE\n", sdr_compatible_str); 786 787 if (len_mac_pdu>=28) { 788 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { 789 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) 790 priv->seqno += 0x10; 791 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); 792 hdr->seq_ctrl |= cpu_to_le16(priv->seqno); 793 } 794 sc = hdr->seq_ctrl; 795 } 796 797 if ( (!addr_flag) && (priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG]&2) ) 798 printk("%s openwifi_tx: %4dbytes ht%d %3dM FC%04x DI%04x addr1/2/3:%04x%08x/%04x%08x/%04x%08x SC%04x flag%08x retr%d ack%d prio%d q%d wr%d rd%d\n", sdr_compatible_str, 799 len_mac_pdu, (use_ht_rate == false ? 0 : 1), (use_ht_rate == false ? wifi_rate_all[rate_hw_value] : wifi_rate_all[rate_hw_value + 12]),frame_control,duration_id, 800 reverse16(addr1_high16), reverse32(addr1_low32), reverse16(addr2_high16), reverse32(addr2_low32), reverse16(addr3_high16), reverse32(addr3_low32), 801 sc, info->flags, retry_limit_raw, pkt_need_ack, prio, queue_idx, 802 // use_rts_cts,use_cts_protect|force_use_cts_protect,wifi_rate_all[cts_rate_hw_value],cts_duration, 803 ring->bd_wr_idx,ring->bd_rd_idx); 804 805 // printk("%s openwifi_tx: rate&try: %d %d %03x; %d %d %03x; %d %d %03x; %d %d %03x\n", sdr_compatible_str, 806 // info->status.rates[0].idx,info->status.rates[0].count,info->status.rates[0].flags, 807 // info->status.rates[1].idx,info->status.rates[1].count,info->status.rates[1].flags, 808 // info->status.rates[2].idx,info->status.rates[2].count,info->status.rates[2].flags, 809 // info->status.rates[3].idx,info->status.rates[3].count,info->status.rates[3].flags); 810 811 // -----------end of preprocess some info from header and skb---------------- 812 813 // /* HW will perform RTS-CTS when only RTS flags is set. 814 // * HW will perform CTS-to-self when both RTS and CTS flags are set. 815 // * RTS rate and RTS duration will be used also for CTS-to-self. 816 // */ 817 // if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) { 818 // tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; 819 // rts_duration = ieee80211_rts_duration(dev, priv->vif[0], // assume all vif have the same config 820 // len_mac_pdu, info); 821 // printk("%s openwifi_tx: rc_flags & IEEE80211_TX_RC_USE_RTS_CTS\n", sdr_compatible_str); 822 // } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { 823 // tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; 824 // rts_duration = ieee80211_ctstoself_duration(dev, priv->vif[0], // assume all vif have the same config 825 // len_mac_pdu, info); 826 // printk("%s openwifi_tx: rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT\n", sdr_compatible_str); 827 // } 828 829 // when skb does not have enough headroom, skb_push will cause kernel panic. headroom needs to be extended if necessary 830 if (skb_headroom(skb)<LEN_PHY_HEADER) { 831 struct sk_buff *skb_new; // in case original skb headroom is not enough to host phy header needed by FPGA IP core 832 printk("%s openwifi_tx: WARNING sn %d skb_headroom(skb)<LEN_PHY_HEADER\n", sdr_compatible_str, ring->bd_wr_idx); 833 if ((skb_new = skb_realloc_headroom(skb, LEN_PHY_HEADER)) == NULL) { 834 printk("%s openwifi_tx: WARNING sn %d skb_realloc_headroom failed!\n", sdr_compatible_str, ring->bd_wr_idx); 835 goto openwifi_tx_early_out; 836 } 837 if (skb->sk != NULL) 838 skb_set_owner_w(skb_new, skb->sk); 839 dev_kfree_skb(skb); 840 skb = skb_new; 841 } 842 843 skb_push( skb, LEN_PHY_HEADER ); 844 rate_signal_value = calc_phy_header(rate_hw_value, use_ht_rate, use_short_gi, len_mac_pdu+LEN_PHY_CRC, skb->data); //fill the phy header 845 846 //make sure dma length is integer times of DDC_NUM_BYTE_PER_DMA_SYMBOL 847 if (skb_tailroom(skb)<num_byte_pad) { 848 printk("%s openwifi_tx: WARNING sn %d skb_tailroom(skb)<num_byte_pad!\n", sdr_compatible_str, ring->bd_wr_idx); 849 // skb_pull(skb, LEN_PHY_HEADER); 850 goto openwifi_tx_early_out; 851 } 852 skb_put( skb, num_byte_pad ); 853 854 retry_limit_hw_value = (retry_limit_raw - 1)&0xF; 855 dma_buf = skb->data; 856 857 cts_rate_signal_value = wifi_mcs_table_11b_force_up[cts_rate_hw_value]; 858 cts_reg = (((use_cts_protect|force_use_cts_protect)<<31)|(cts_use_traffic_rate<<30)|(cts_duration<<8)|(cts_rate_signal_value<<4)|rate_signal_value); 859 dma_reg = ( (( ((prio<<(NUM_BIT_MAX_NUM_HW_QUEUE+NUM_BIT_MAX_PHY_TX_SN))|(ring->bd_wr_idx<<NUM_BIT_MAX_NUM_HW_QUEUE)|queue_idx) )<<18)|(retry_limit_hw_value<<14)|(pkt_need_ack<<13)|num_dma_symbol ); 860 861 /* We must be sure that tx_flags is written last because the HW 862 * looks at it to check if the rest of data is valid or not 863 */ 864 //wmb(); 865 // entry->flags = cpu_to_le32(tx_flags); 866 /* We must be sure this has been written before following HW 867 * register write, because this write will make the HW attempts 868 * to DMA the just-written data 869 */ 870 //wmb(); 871 872 spin_lock_irqsave(&priv->lock, flags); // from now on, we'd better avoid interrupt because ring->stop_flag is shared with interrupt 873 874 // -------------check whether FPGA dma fifo and queue (queue_idx) has enough room------------- 875 dma_fifo_no_room_flag = tx_intf_api->TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read(); 876 hw_queue_len = tx_intf_api->TX_INTF_REG_QUEUE_FIFO_DATA_COUNT_read(); 877 if ( ((dma_fifo_no_room_flag>>queue_idx)&1) || ((NUM_TX_BD-((hw_queue_len>>(queue_idx*8))&0xFF))<RING_ROOM_THRESHOLD) || ring->stop_flag==1 ) { 878 ieee80211_stop_queue(dev, prio); // here we should stop those prio related to the queue idx flag set in TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read 879 printk("%s openwifi_tx: WARNING ieee80211_stop_queue prio %d queue %d no room flag %x hw queue len %08x request %d wr %d rd %d\n", sdr_compatible_str, 880 prio, queue_idx, dma_fifo_no_room_flag, hw_queue_len, num_dma_symbol, ring->bd_wr_idx, ring->bd_rd_idx); 881 ring->stop_flag = 1; 882 goto openwifi_tx_early_out_after_lock; 883 } 884 // --------end of check whether FPGA fifo (queue_idx) has enough room------------ 885 886 status = dma_async_is_tx_complete(priv->tx_chan, priv->tx_cookie, NULL, NULL); 887 if (status!=DMA_COMPLETE) { 888 printk("%s openwifi_tx: WARNING status!=DMA_COMPLETE\n", sdr_compatible_str); 889 goto openwifi_tx_early_out_after_lock; 890 } 891 892 if ( (*(u32*)(&(skb->data[4]))) || ((*(u32*)(&(skb->data[12])))&0xFFFF0000) ) { 893 printk("%s openwifi_tx: WARNING 1 %d %08x %08x %08x %08x\n", sdr_compatible_str, num_byte_pad, *(u32*)(&(skb->data[12])), *(u32*)(&(skb->data[8])), *(u32*)(&(skb->data[4])), *(u32*)(&(skb->data[0]))); 894 goto openwifi_tx_early_out_after_lock; 895 } 896 897 //-------------------------fire skb DMA to hardware---------------------------------- 898 dma_mapping_addr = dma_map_single(priv->tx_chan->device->dev, dma_buf, 899 num_dma_byte, DMA_MEM_TO_DEV); 900 901 if (dma_mapping_error(priv->tx_chan->device->dev,dma_mapping_addr)) { 902 // dev_err(priv->tx_chan->device->dev, "sdr,sdr openwifi_tx: WARNING TX DMA mapping error\n"); 903 printk("%s openwifi_tx: WARNING sn %d TX DMA mapping error\n", sdr_compatible_str, ring->bd_wr_idx); 904 goto openwifi_tx_early_out_after_lock; 905 } 906 907 sg_init_table(&(priv->tx_sg), 1); // only need to be initialized once in openwifi_start 908 sg_dma_address( &(priv->tx_sg) ) = dma_mapping_addr; 909 sg_dma_len( &(priv->tx_sg) ) = num_dma_byte; 910 911 tx_intf_api->TX_INTF_REG_CTS_TOSELF_CONFIG_write(cts_reg); 912 tx_intf_api->TX_INTF_REG_NUM_DMA_SYMBOL_TO_PL_write(dma_reg); 913 priv->txd = priv->tx_chan->device->device_prep_slave_sg(priv->tx_chan, &(priv->tx_sg),1,DMA_MEM_TO_DEV, DMA_CTRL_ACK | DMA_PREP_INTERRUPT, NULL); 914 if (!(priv->txd)) { 915 printk("%s openwifi_tx: WARNING sn %d device_prep_slave_sg %p\n", sdr_compatible_str, ring->bd_wr_idx, (void*)(priv->txd)); 916 goto openwifi_tx_after_dma_mapping; 917 } 918 919 priv->tx_cookie = priv->txd->tx_submit(priv->txd); 920 921 if (dma_submit_error(priv->tx_cookie)) { 922 printk("%s openwifi_tx: WARNING sn %d dma_submit_error(tx_cookie) %d\n", sdr_compatible_str, ring->bd_wr_idx, (u32)(priv->tx_cookie)); 923 goto openwifi_tx_after_dma_mapping; 924 } 925 926 // seems everything is ok. let's mark this pkt in bd descriptor ring 927 ring->bds[ring->bd_wr_idx].skb_linked = skb; 928 ring->bds[ring->bd_wr_idx].dma_mapping_addr = dma_mapping_addr; 929 930 ring->bd_wr_idx = ((ring->bd_wr_idx+1)&(NUM_TX_BD-1)); 931 932 dma_async_issue_pending(priv->tx_chan); 933 934 if ( (*(u32*)(&(skb->data[4]))) || ((*(u32*)(&(skb->data[12])))&0xFFFF0000) ) 935 printk("%s openwifi_tx: WARNING 2 %08x %08x %08x %08x\n", sdr_compatible_str, *(u32*)(&(skb->data[12])), *(u32*)(&(skb->data[8])), *(u32*)(&(skb->data[4])), *(u32*)(&(skb->data[0]))); 936 937 spin_unlock_irqrestore(&priv->lock, flags); 938 939 return; 940 941 openwifi_tx_after_dma_mapping: 942 dma_unmap_single(priv->tx_chan->device->dev, dma_mapping_addr, num_dma_byte, DMA_MEM_TO_DEV); 943 944 openwifi_tx_early_out_after_lock: 945 // skb_pull(skb, LEN_PHY_HEADER); 946 dev_kfree_skb(skb); 947 spin_unlock_irqrestore(&priv->lock, flags); 948 // printk("%s openwifi_tx: WARNING openwifi_tx_after_dma_mapping phy_tx_sn %d queue %d\n", sdr_compatible_str,priv->phy_tx_sn,queue_idx); 949 return; 950 951 openwifi_tx_early_out: 952 dev_kfree_skb(skb); 953 // printk("%s openwifi_tx: WARNING openwifi_tx_early_out phy_tx_sn %d queue %d\n", sdr_compatible_str,priv->phy_tx_sn,queue_idx); 954 } 955 956 static int openwifi_start(struct ieee80211_hw *dev) 957 { 958 struct openwifi_priv *priv = dev->priv; 959 int ret, i, rssi_half_db_offset, agc_gain_delay;//rssi_half_db_th, 960 u32 reg; 961 962 for (i=0; i<MAX_NUM_VIF; i++) { 963 priv->vif[i] = NULL; 964 } 965 966 memset(priv->drv_tx_reg_val, 0, sizeof(priv->drv_tx_reg_val)); 967 memset(priv->drv_rx_reg_val, 0, sizeof(priv->drv_rx_reg_val)); 968 memset(priv->drv_xpu_reg_val, 0, sizeof(priv->drv_xpu_reg_val)); 969 priv->drv_xpu_reg_val[DRV_XPU_REG_IDX_GIT_REV] = GIT_REV; 970 971 //turn on radio 972 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) { 973 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, false, true, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 974 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 975 } else { 976 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, true, false, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 977 reg = ad9361_get_tx_atten(priv->ad9361_phy, 1); 978 } 979 if (reg == AD9361_RADIO_ON_TX_ATT) { 980 priv->rfkill_off = 1;// 0 off, 1 on 981 printk("%s openwifi_start: rfkill radio on\n",sdr_compatible_str); 982 } 983 else 984 printk("%s openwifi_start: WARNING rfkill radio on failed. tx att read %d require %d\n",sdr_compatible_str, reg, AD9361_RADIO_ON_TX_ATT); 985 986 if (priv->rx_intf_cfg == RX_INTF_BW_20MHZ_AT_0MHZ_ANT0) 987 priv->ctrl_out.index=0x16; 988 else 989 priv->ctrl_out.index=0x17; 990 991 ret = ad9361_ctrl_outs_setup(priv->ad9361_phy, &(priv->ctrl_out)); 992 if (ret < 0) { 993 printk("%s openwifi_start: WARNING ad9361_ctrl_outs_setup %d\n",sdr_compatible_str, ret); 994 } else { 995 printk("%s openwifi_start: ad9361_ctrl_outs_setup en_mask 0x%02x index 0x%02x\n",sdr_compatible_str, priv->ctrl_out.en_mask, priv->ctrl_out.index); 996 } 997 998 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 999 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1000 1001 rx_intf_api->hw_init(priv->rx_intf_cfg,8,8); 1002 tx_intf_api->hw_init(priv->tx_intf_cfg,8,8,priv->fpga_type); 1003 openofdm_tx_api->hw_init(priv->openofdm_tx_cfg); 1004 openofdm_rx_api->hw_init(priv->openofdm_rx_cfg); 1005 xpu_api->hw_init(priv->xpu_cfg); 1006 1007 agc_gain_delay = 50; //samples 1008 rssi_half_db_offset = 150; // to be consistent 1009 xpu_api->XPU_REG_RSSI_DB_CFG_write(0x80000000|((rssi_half_db_offset<<16)|agc_gain_delay) ); 1010 xpu_api->XPU_REG_RSSI_DB_CFG_write((~0x80000000)&((rssi_half_db_offset<<16)|agc_gain_delay) ); 1011 1012 openofdm_rx_api->OPENOFDM_RX_REG_POWER_THRES_write(0); 1013 // rssi_half_db_th = 87<<1; // -62dBm // will setup in runtime in _rf_set_channel 1014 // xpu_api->XPU_REG_LBT_TH_write(rssi_half_db_th); // set IQ rssi th step .5dB to xxx and enable it 1015 xpu_api->XPU_REG_FORCE_IDLE_MISC_write(75); //control the duration to force ch_idle after decoding a packet due to imperfection of agc and signals 1016 1017 //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((40)<<16)|0 );//high 16bit 5GHz; low 16 bit 2.4GHz (Attention, current tx core has around 1.19us starting delay that makes the ack fall behind 10us SIFS in 2.4GHz! Need to improve TX in 2.4GHz!) 1018 //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((51)<<16)|0 );//now our tx send out I/Q immediately 1019 xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((51+23)<<16)|(0+23) );//we have more time when we use FIR in AD9361 1020 1021 xpu_api->XPU_REG_RECV_ACK_COUNT_TOP0_write( (1<<31) | (((45+2+2)*10 + 15)<<16) | 10 );//2.4GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M) 1022 xpu_api->XPU_REG_RECV_ACK_COUNT_TOP1_write( (1<<31) | (((51+2+2)*10 + 15)<<16) | 10 );//5GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M) 1023 1024 tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write( ((16*10)<<16)|(10*10) );//high 16bit 5GHz; low 16 bit 2.4GHz. counter speed 10MHz is assumed 1025 1026 // //xpu_api->XPU_REG_BB_RF_DELAY_write(51); // fine tuned value at 0.005us. old: dac-->ant port: 0.6us, 57 taps fir at 40MHz: 1.425us; round trip: 2*(0.6+1.425)=4.05us; 4.05*10=41 1027 // xpu_api->XPU_REG_BB_RF_DELAY_write(47);//add .5us for slightly longer fir -- already in xpu.c 1028 xpu_api->XPU_REG_MAC_ADDR_write(priv->mac_addr); 1029 1030 // setup time schedule of 4 slices 1031 // slice 0 1032 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write(50000-1); // total 50ms 1033 xpu_api->XPU_REG_SLICE_COUNT_START_write(0); //start 0ms 1034 xpu_api->XPU_REG_SLICE_COUNT_END_write(50000-1); //end 50ms 1035 1036 // slice 1 1037 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((1<<20)|(50000-1)); // total 50ms 1038 xpu_api->XPU_REG_SLICE_COUNT_START_write((1<<20)|(0)); //start 0ms 1039 //xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(20000-1)); //end 20ms 1040 xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(50000-1)); //end 20ms 1041 1042 // slice 2 1043 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((2<<20)|(50000-1)); // total 50ms 1044 //xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(20000)); //start 20ms 1045 xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(0)); //start 20ms 1046 //xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(40000-1)); //end 20ms 1047 xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(50000-1)); //end 20ms 1048 1049 // slice 3 1050 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((3<<20)|(50000-1)); // total 50ms 1051 //xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(40000)); //start 40ms 1052 xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(0)); //start 40ms 1053 //xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms 1054 xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms 1055 1056 // all slice sync rest 1057 xpu_api->XPU_REG_MULTI_RST_write(1<<7); //bit7 reset the counter for all queues at the same time 1058 xpu_api->XPU_REG_MULTI_RST_write(0<<7); 1059 1060 //xpu_api->XPU_REG_MAC_ADDR_HIGH_write( (*( (u16*)(priv->mac_addr + 4) )) ); 1061 printk("%s openwifi_start: rx_intf_cfg %d openofdm_rx_cfg %d tx_intf_cfg %d openofdm_tx_cfg %d\n",sdr_compatible_str, priv->rx_intf_cfg, priv->openofdm_rx_cfg, priv->tx_intf_cfg, priv->openofdm_tx_cfg); 1062 printk("%s openwifi_start: rx_freq_offset_to_lo_MHz %d tx_freq_offset_to_lo_MHz %d\n",sdr_compatible_str, priv->rx_freq_offset_to_lo_MHz, priv->tx_freq_offset_to_lo_MHz); 1063 1064 tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x30004); //disable tx interrupt 1065 rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x100); // disable rx interrupt by interrupt test mode 1066 rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(1); // hold M AXIS in reset status 1067 1068 if (test_mode==1) { 1069 printk("%s openwifi_start: test_mode==1\n",sdr_compatible_str); 1070 goto normal_out; 1071 } 1072 1073 priv->rx_chan = dma_request_slave_channel(&(priv->pdev->dev), "rx_dma_s2mm"); 1074 if (IS_ERR(priv->rx_chan)) { 1075 ret = PTR_ERR(priv->rx_chan); 1076 pr_err("%s openwifi_start: No Rx channel %d\n",sdr_compatible_str,ret); 1077 goto err_dma; 1078 } 1079 1080 priv->tx_chan = dma_request_slave_channel(&(priv->pdev->dev), "tx_dma_mm2s"); 1081 if (IS_ERR(priv->tx_chan)) { 1082 ret = PTR_ERR(priv->tx_chan); 1083 pr_err("%s openwifi_start: No Tx channel %d\n",sdr_compatible_str,ret); 1084 goto err_dma; 1085 } 1086 printk("%s openwifi_start: DMA channel setup successfully.\n",sdr_compatible_str); 1087 1088 ret = openwifi_init_rx_ring(priv); 1089 if (ret) { 1090 printk("%s openwifi_start: openwifi_init_rx_ring ret %d\n", sdr_compatible_str,ret); 1091 goto err_free_rings; 1092 } 1093 1094 priv->seqno=0; 1095 for (i=0; i<MAX_NUM_SW_QUEUE; i++) { 1096 if ((ret = openwifi_init_tx_ring(priv, i))) { 1097 printk("%s openwifi_start: openwifi_init_tx_ring %d ret %d\n", sdr_compatible_str, i, ret); 1098 goto err_free_rings; 1099 } 1100 } 1101 1102 if ( (ret = rx_dma_setup(dev)) ) { 1103 printk("%s openwifi_start: rx_dma_setup ret %d\n", sdr_compatible_str,ret); 1104 goto err_free_rings; 1105 } 1106 1107 priv->irq_rx = irq_of_parse_and_map(priv->pdev->dev.of_node, 1); 1108 ret = request_irq(priv->irq_rx, openwifi_rx_interrupt, 1109 IRQF_SHARED, "sdr,rx_pkt_intr", dev); 1110 if (ret) { 1111 wiphy_err(dev->wiphy, "openwifi_start:failed to register IRQ handler openwifi_rx_interrupt\n"); 1112 goto err_free_rings; 1113 } else { 1114 printk("%s openwifi_start: irq_rx %d\n", sdr_compatible_str, priv->irq_rx); 1115 } 1116 1117 priv->irq_tx = irq_of_parse_and_map(priv->pdev->dev.of_node, 3); 1118 ret = request_irq(priv->irq_tx, openwifi_tx_interrupt, 1119 IRQF_SHARED, "sdr,tx_itrpt1", dev); 1120 if (ret) { 1121 wiphy_err(dev->wiphy, "openwifi_start: failed to register IRQ handler openwifi_tx_interrupt\n"); 1122 goto err_free_rings; 1123 } else { 1124 printk("%s openwifi_start: irq_tx %d\n", sdr_compatible_str, priv->irq_tx); 1125 } 1126 1127 rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x000); // enable rx interrupt get normal fcs valid pass through ddc to ARM 1128 tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x4); //enable tx interrupt 1129 rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(0); // release M AXIS 1130 xpu_api->XPU_REG_TSF_LOAD_VAL_write(0,0); // reset tsf timer 1131 1132 //ieee80211_wake_queue(dev, 0); 1133 1134 normal_out: 1135 printk("%s openwifi_start: normal end\n", sdr_compatible_str); 1136 return 0; 1137 1138 err_free_rings: 1139 openwifi_free_rx_ring(priv); 1140 for (i=0; i<MAX_NUM_SW_QUEUE; i++) 1141 openwifi_free_tx_ring(priv, i); 1142 1143 err_dma: 1144 ret = -1; 1145 printk("%s openwifi_start: abnormal end ret %d\n", sdr_compatible_str, ret); 1146 return ret; 1147 } 1148 1149 static void openwifi_stop(struct ieee80211_hw *dev) 1150 { 1151 struct openwifi_priv *priv = dev->priv; 1152 u32 reg, reg1; 1153 int i; 1154 1155 if (test_mode==1){ 1156 pr_info("%s openwifi_stop: test_mode==1\n", sdr_compatible_str); 1157 goto normal_out; 1158 } 1159 1160 //turn off radio 1161 #if 1 1162 ad9361_tx_mute(priv->ad9361_phy, 1); 1163 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 1164 reg1 = ad9361_get_tx_atten(priv->ad9361_phy, 1); 1165 if (reg == AD9361_RADIO_OFF_TX_ATT && reg1 == AD9361_RADIO_OFF_TX_ATT ) { 1166 priv->rfkill_off = 0;// 0 off, 1 on 1167 printk("%s openwifi_stop: rfkill radio off\n",sdr_compatible_str); 1168 } 1169 else 1170 printk("%s openwifi_stop: WARNING rfkill radio off failed. tx att read %d %d require %d\n",sdr_compatible_str, reg, reg1, AD9361_RADIO_OFF_TX_ATT); 1171 #endif 1172 1173 //ieee80211_stop_queue(dev, 0); 1174 1175 tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x30004); //disable tx interrupt 1176 rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x100); // disable fcs_valid by interrupt test mode 1177 rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(1); // hold M AXIS in reset status 1178 1179 for (i=0; i<MAX_NUM_VIF; i++) { 1180 priv->vif[i] = NULL; 1181 } 1182 1183 openwifi_free_rx_ring(priv); 1184 for (i=0; i<MAX_NUM_SW_QUEUE; i++) 1185 openwifi_free_tx_ring(priv, i); 1186 1187 pr_info("%s openwifi_stop: dropped channel %s\n", sdr_compatible_str, dma_chan_name(priv->rx_chan)); 1188 dmaengine_terminate_all(priv->rx_chan); 1189 dma_release_channel(priv->rx_chan); 1190 pr_info("%s openwifi_stop: dropped channel %s\n", sdr_compatible_str, dma_chan_name(priv->tx_chan)); 1191 dmaengine_terminate_all(priv->tx_chan); 1192 dma_release_channel(priv->tx_chan); 1193 1194 //priv->rf->stop(dev); 1195 1196 free_irq(priv->irq_rx, dev); 1197 free_irq(priv->irq_tx, dev); 1198 1199 normal_out: 1200 printk("%s openwifi_stop\n", sdr_compatible_str); 1201 } 1202 1203 static u64 openwifi_get_tsf(struct ieee80211_hw *dev, 1204 struct ieee80211_vif *vif) 1205 { 1206 u32 tsft_low, tsft_high; 1207 1208 tsft_low = xpu_api->XPU_REG_TSF_RUNTIME_VAL_LOW_read(); 1209 tsft_high = xpu_api->XPU_REG_TSF_RUNTIME_VAL_HIGH_read(); 1210 //printk("%s openwifi_get_tsf: %08x%08x\n", sdr_compatible_str,tsft_high,tsft_low); 1211 return( ( (u64)tsft_low ) | ( ((u64)tsft_high)<<32 ) ); 1212 } 1213 1214 static void openwifi_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u64 tsf) 1215 { 1216 u32 tsft_high = ((tsf >> 32)&0xffffffff); 1217 u32 tsft_low = (tsf&0xffffffff); 1218 xpu_api->XPU_REG_TSF_LOAD_VAL_write(tsft_high,tsft_low); 1219 printk("%s openwifi_set_tsf: %08x%08x\n", sdr_compatible_str,tsft_high,tsft_low); 1220 } 1221 1222 static void openwifi_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 1223 { 1224 xpu_api->XPU_REG_TSF_LOAD_VAL_write(0,0); 1225 printk("%s openwifi_reset_tsf\n", sdr_compatible_str); 1226 } 1227 1228 static int openwifi_set_rts_threshold(struct ieee80211_hw *hw, u32 value) 1229 { 1230 printk("%s openwifi_set_rts_threshold WARNING value %d\n", sdr_compatible_str,value); 1231 return(0); 1232 } 1233 1234 static void openwifi_beacon_work(struct work_struct *work) 1235 { 1236 struct openwifi_vif *vif_priv = 1237 container_of(work, struct openwifi_vif, beacon_work.work); 1238 struct ieee80211_vif *vif = 1239 container_of((void *)vif_priv, struct ieee80211_vif, drv_priv); 1240 struct ieee80211_hw *dev = vif_priv->dev; 1241 struct ieee80211_mgmt *mgmt; 1242 struct sk_buff *skb; 1243 1244 /* don't overflow the tx ring */ 1245 if (ieee80211_queue_stopped(dev, 0)) 1246 goto resched; 1247 1248 /* grab a fresh beacon */ 1249 skb = ieee80211_beacon_get(dev, vif); 1250 if (!skb) 1251 goto resched; 1252 1253 /* 1254 * update beacon timestamp w/ TSF value 1255 * TODO: make hardware update beacon timestamp 1256 */ 1257 mgmt = (struct ieee80211_mgmt *)skb->data; 1258 mgmt->u.beacon.timestamp = cpu_to_le64(openwifi_get_tsf(dev, vif)); 1259 1260 /* TODO: use actual beacon queue */ 1261 skb_set_queue_mapping(skb, 0); 1262 openwifi_tx(dev, NULL, skb); 1263 1264 resched: 1265 /* 1266 * schedule next beacon 1267 * TODO: use hardware support for beacon timing 1268 */ 1269 schedule_delayed_work(&vif_priv->beacon_work, 1270 usecs_to_jiffies(1024 * vif->bss_conf.beacon_int)); 1271 } 1272 1273 static int openwifi_add_interface(struct ieee80211_hw *dev, 1274 struct ieee80211_vif *vif) 1275 { 1276 int i; 1277 struct openwifi_priv *priv = dev->priv; 1278 struct openwifi_vif *vif_priv; 1279 1280 switch (vif->type) { 1281 case NL80211_IFTYPE_AP: 1282 case NL80211_IFTYPE_STATION: 1283 case NL80211_IFTYPE_ADHOC: 1284 case NL80211_IFTYPE_MONITOR: 1285 case NL80211_IFTYPE_MESH_POINT: 1286 break; 1287 default: 1288 return -EOPNOTSUPP; 1289 } 1290 // let's support more than 1 interface 1291 for (i=0; i<MAX_NUM_VIF; i++) { 1292 if (priv->vif[i] == NULL) 1293 break; 1294 } 1295 1296 printk("%s openwifi_add_interface start. vif for loop result %d\n", sdr_compatible_str, i); 1297 1298 if (i==MAX_NUM_VIF) 1299 return -EBUSY; 1300 1301 priv->vif[i] = vif; 1302 1303 /* Initialize driver private area */ 1304 vif_priv = (struct openwifi_vif *)&vif->drv_priv; 1305 vif_priv->idx = i; 1306 1307 vif_priv->dev = dev; 1308 INIT_DELAYED_WORK(&vif_priv->beacon_work, openwifi_beacon_work); 1309 vif_priv->enable_beacon = false; 1310 1311 printk("%s openwifi_add_interface end with vif idx %d\n", sdr_compatible_str,vif_priv->idx); 1312 1313 return 0; 1314 } 1315 1316 static void openwifi_remove_interface(struct ieee80211_hw *dev, 1317 struct ieee80211_vif *vif) 1318 { 1319 struct openwifi_vif *vif_priv; 1320 struct openwifi_priv *priv = dev->priv; 1321 1322 vif_priv = (struct openwifi_vif *)&vif->drv_priv; 1323 priv->vif[vif_priv->idx] = NULL; 1324 printk("%s openwifi_remove_interface vif idx %d\n", sdr_compatible_str, vif_priv->idx); 1325 } 1326 1327 static int openwifi_config(struct ieee80211_hw *dev, u32 changed) 1328 { 1329 struct openwifi_priv *priv = dev->priv; 1330 struct ieee80211_conf *conf = &dev->conf; 1331 1332 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) 1333 priv->rf->set_chan(dev, conf); 1334 else 1335 printk("%s openwifi_config changed flag %08x\n", sdr_compatible_str, changed); 1336 1337 return 0; 1338 } 1339 1340 static void openwifi_bss_info_changed(struct ieee80211_hw *dev, 1341 struct ieee80211_vif *vif, 1342 struct ieee80211_bss_conf *info, 1343 u32 changed) 1344 { 1345 struct openwifi_priv *priv = dev->priv; 1346 struct openwifi_vif *vif_priv; 1347 u32 bssid_low, bssid_high; 1348 1349 vif_priv = (struct openwifi_vif *)&vif->drv_priv; 1350 1351 //be careful: we don have valid chip, so registers addresses in priv->map->BSSID[0] are not valid! should not print it! 1352 //printk("%s openwifi_bss_info_changed map bssid %02x%02x%02x%02x%02x%02x\n",sdr_compatible_str,priv->map->BSSID[0],priv->map->BSSID[1],priv->map->BSSID[2],priv->map->BSSID[3],priv->map->BSSID[4],priv->map->BSSID[5]); 1353 if (changed & BSS_CHANGED_BSSID) { 1354 printk("%s openwifi_bss_info_changed BSS_CHANGED_BSSID %02x%02x%02x%02x%02x%02x\n",sdr_compatible_str,info->bssid[0],info->bssid[1],info->bssid[2],info->bssid[3],info->bssid[4],info->bssid[5]); 1355 // write new bssid to our HW, and do not change bssid filter 1356 //u32 bssid_filter_high = xpu_api->XPU_REG_BSSID_FILTER_HIGH_read(); 1357 bssid_low = ( *( (u32*)(info->bssid) ) ); 1358 bssid_high = ( *( (u16*)(info->bssid+4) ) ); 1359 1360 //bssid_filter_high = (bssid_filter_high&0x80000000); 1361 //bssid_high = (bssid_high|bssid_filter_high); 1362 xpu_api->XPU_REG_BSSID_FILTER_LOW_write(bssid_low); 1363 xpu_api->XPU_REG_BSSID_FILTER_HIGH_write(bssid_high); 1364 } 1365 1366 if (changed & BSS_CHANGED_BEACON_INT) { 1367 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BEACON_INT %x\n",sdr_compatible_str,info->beacon_int); 1368 } 1369 1370 if (changed & BSS_CHANGED_TXPOWER) 1371 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_TXPOWER %x\n",sdr_compatible_str,info->txpower); 1372 1373 if (changed & BSS_CHANGED_ERP_CTS_PROT) 1374 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_ERP_CTS_PROT %x\n",sdr_compatible_str,info->use_cts_prot); 1375 1376 if (changed & BSS_CHANGED_BASIC_RATES) 1377 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BASIC_RATES %x\n",sdr_compatible_str,info->basic_rates); 1378 1379 if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE)) { 1380 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_ERP_SLOT %d BSS_CHANGED_ERP_PREAMBLE %d short slot %d\n",sdr_compatible_str, 1381 changed&BSS_CHANGED_ERP_SLOT,changed&BSS_CHANGED_ERP_PREAMBLE,info->use_short_slot); 1382 if (info->use_short_slot && priv->use_short_slot==false) { 1383 priv->use_short_slot=true; 1384 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 1385 } else if ((!info->use_short_slot) && priv->use_short_slot==true) { 1386 priv->use_short_slot=false; 1387 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 1388 } 1389 } 1390 1391 if (changed & BSS_CHANGED_BEACON_ENABLED) { 1392 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BEACON_ENABLED\n",sdr_compatible_str); 1393 vif_priv->enable_beacon = info->enable_beacon; 1394 } 1395 1396 if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON)) { 1397 cancel_delayed_work_sync(&vif_priv->beacon_work); 1398 if (vif_priv->enable_beacon) 1399 schedule_work(&vif_priv->beacon_work.work); 1400 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BEACON_ENABLED %d BSS_CHANGED_BEACON %d\n",sdr_compatible_str, 1401 changed&BSS_CHANGED_BEACON_ENABLED,changed&BSS_CHANGED_BEACON); 1402 } 1403 } 1404 // helper function 1405 u32 log2val(u32 val){ 1406 u32 ret_val = 0 ; 1407 while(val>1){ 1408 val = val >> 1 ; 1409 ret_val ++ ; 1410 } 1411 return ret_val ; 1412 } 1413 1414 static int openwifi_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue, 1415 const struct ieee80211_tx_queue_params *params) 1416 { 1417 u32 reg_val, cw_min_exp, cw_max_exp; 1418 1419 printk("%s openwifi_conf_tx: [queue %d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d, aifs and txop ignored\n", 1420 sdr_compatible_str,queue,params->aifs,params->cw_min,params->cw_max,params->txop); 1421 1422 reg_val=xpu_api->XPU_REG_CSMA_CFG_read(); 1423 cw_min_exp = (log2val(params->cw_min + 1) & 0x0F); 1424 cw_max_exp = (log2val(params->cw_max + 1) & 0x0F); 1425 switch(queue){ 1426 case 0: reg_val = ( (reg_val & 0xFFFFFF00) | ((cw_min_exp | (cw_max_exp << 4)) << 0) ); break; 1427 case 1: reg_val = ( (reg_val & 0xFFFF00FF) | ((cw_min_exp | (cw_max_exp << 4)) << 8) ); break; 1428 case 2: reg_val = ( (reg_val & 0xFF00FFFF) | ((cw_min_exp | (cw_max_exp << 4)) << 16) ); break; 1429 case 3: reg_val = ( (reg_val & 0x00FFFFFF) | ((cw_min_exp | (cw_max_exp << 4)) << 24) ); break; 1430 default: printk("%s openwifi_conf_tx: WARNING queue %d does not exist",sdr_compatible_str, queue); return(0); 1431 } 1432 xpu_api->XPU_REG_CSMA_CFG_write(reg_val); 1433 return(0); 1434 } 1435 1436 static u64 openwifi_prepare_multicast(struct ieee80211_hw *dev, 1437 struct netdev_hw_addr_list *mc_list) 1438 { 1439 printk("%s openwifi_prepare_multicast\n", sdr_compatible_str); 1440 return netdev_hw_addr_list_count(mc_list); 1441 } 1442 1443 static void openwifi_configure_filter(struct ieee80211_hw *dev, 1444 unsigned int changed_flags, 1445 unsigned int *total_flags, 1446 u64 multicast) 1447 { 1448 u32 filter_flag; 1449 1450 (*total_flags) &= SDR_SUPPORTED_FILTERS; 1451 (*total_flags) |= FIF_ALLMULTI; //because we need to pass all multicast (no matter it is for us or not) to upper layer 1452 1453 filter_flag = (*total_flags); 1454 1455 filter_flag = (filter_flag|UNICAST_FOR_US|BROADCAST_ALL_ONE|BROADCAST_ALL_ZERO); 1456 //filter_flag = (filter_flag|UNICAST_FOR_US|BROADCAST_ALL_ONE|BROADCAST_ALL_ZERO|MONITOR_ALL); // all pkt will be delivered to arm 1457 1458 //if (priv->vif[0]->type == NL80211_IFTYPE_MONITOR) 1459 if ((filter_flag&0xf0) == 0xf0) //FIF_BCN_PRBRESP_PROMISC/FIF_CONTROL/FIF_OTHER_BSS/FIF_PSPOLL are set means monitor mode 1460 filter_flag = (filter_flag|MONITOR_ALL); 1461 else 1462 filter_flag = (filter_flag&(~MONITOR_ALL)); 1463 1464 if ( !(filter_flag&FIF_BCN_PRBRESP_PROMISC) ) 1465 filter_flag = (filter_flag|MY_BEACON); 1466 1467 filter_flag = (filter_flag|FIF_PSPOLL); 1468 1469 xpu_api->XPU_REG_FILTER_FLAG_write(filter_flag|HIGH_PRIORITY_DISCARD_FLAG); 1470 //xpu_api->XPU_REG_FILTER_FLAG_write(filter_flag); //do not discard any pkt 1471 1472 printk("%s openwifi_configure_filter MON %d M_BCN %d BST0 %d BST1 %d UST %d PB_RQ %d PS_PL %d O_BSS %d CTL %d BCN_PRP %d PCP_FL %d FCS_FL %d ALL_MUT %d\n", sdr_compatible_str, 1473 (filter_flag>>13)&1,(filter_flag>>12)&1,(filter_flag>>11)&1,(filter_flag>>10)&1,(filter_flag>>9)&1,(filter_flag>>8)&1,(filter_flag>>7)&1,(filter_flag>>6)&1,(filter_flag>>5)&1,(filter_flag>>4)&1,(filter_flag>>3)&1,(filter_flag>>2)&1,(filter_flag>>1)&1); 1474 } 1475 1476 static int openwifi_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, void *data, int len) 1477 { 1478 struct openwifi_priv *priv = hw->priv; 1479 struct nlattr *tb[OPENWIFI_ATTR_MAX + 1]; 1480 struct sk_buff *skb; 1481 int err; 1482 u32 tmp=-1, reg_cat, reg_addr, reg_val, reg_addr_idx, tsft_high, tsft_low; 1483 1484 err = nla_parse(tb, OPENWIFI_ATTR_MAX, data, len, openwifi_testmode_policy, NULL); 1485 if (err) 1486 return err; 1487 1488 if (!tb[OPENWIFI_ATTR_CMD]) 1489 return -EINVAL; 1490 1491 switch (nla_get_u32(tb[OPENWIFI_ATTR_CMD])) { 1492 case OPENWIFI_CMD_SET_GAP: 1493 if (!tb[OPENWIFI_ATTR_GAP]) 1494 return -EINVAL; 1495 tmp = nla_get_u32(tb[OPENWIFI_ATTR_GAP]); 1496 printk("%s openwifi radio inter frame gap set to %d usec\n", sdr_compatible_str, tmp); 1497 xpu_api->XPU_REG_CSMA_CFG_write(tmp); // unit us 1498 return 0; 1499 case OPENWIFI_CMD_GET_GAP: 1500 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1501 if (!skb) 1502 return -ENOMEM; 1503 tmp = xpu_api->XPU_REG_CSMA_CFG_read(); 1504 if (nla_put_u32(skb, OPENWIFI_ATTR_GAP, tmp)) 1505 goto nla_put_failure; 1506 return cfg80211_testmode_reply(skb); 1507 case OPENWIFI_CMD_SET_SLICE_IDX: 1508 if (!tb[OPENWIFI_ATTR_SLICE_IDX]) 1509 return -EINVAL; 1510 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_IDX]); 1511 printk("%s set openwifi slice_idx in hex: %08x\n", sdr_compatible_str, tmp); 1512 if (tmp == MAX_NUM_HW_QUEUE) { 1513 printk("%s set openwifi slice_idx reset all queue counter.\n", sdr_compatible_str); 1514 xpu_api->XPU_REG_MULTI_RST_write(1<<7); //bit7 reset the counter for all queues at the same time 1515 xpu_api->XPU_REG_MULTI_RST_write(0<<7); 1516 } else { 1517 priv->slice_idx = tmp; 1518 } 1519 return 0; 1520 case OPENWIFI_CMD_GET_SLICE_IDX: 1521 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1522 if (!skb) 1523 return -ENOMEM; 1524 tmp = priv->slice_idx; 1525 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_IDX, tmp)) 1526 goto nla_put_failure; 1527 printk("%s get openwifi slice_idx in hex: %08x\n", sdr_compatible_str, tmp); 1528 return cfg80211_testmode_reply(skb); 1529 case OPENWIFI_CMD_SET_ADDR: 1530 if (!tb[OPENWIFI_ATTR_ADDR]) 1531 return -EINVAL; 1532 tmp = nla_get_u32(tb[OPENWIFI_ATTR_ADDR]); 1533 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1534 printk("%s set openwifi slice_target_mac_addr(low32) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1535 } else { 1536 printk("%s set openwifi slice_target_mac_addr(low32) in hex: %08x to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1537 priv->dest_mac_addr_queue_map[priv->slice_idx] = reverse32(tmp); 1538 } 1539 return 0; 1540 case OPENWIFI_CMD_GET_ADDR: 1541 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1542 if (!skb) 1543 return -ENOMEM; 1544 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1545 tmp = -1; 1546 } else { 1547 tmp = reverse32(priv->dest_mac_addr_queue_map[priv->slice_idx]); 1548 } 1549 if (nla_put_u32(skb, OPENWIFI_ATTR_ADDR, tmp)) 1550 goto nla_put_failure; 1551 printk("%s get openwifi slice_target_mac_addr(low32) in hex: %08x of slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1552 return cfg80211_testmode_reply(skb); 1553 1554 case OPENWIFI_CMD_SET_SLICE_TOTAL: 1555 if (!tb[OPENWIFI_ATTR_SLICE_TOTAL]) 1556 return -EINVAL; 1557 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_TOTAL]); 1558 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1559 printk("%s set SLICE_TOTAL(duration) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1560 } else { 1561 printk("%s set SLICE_TOTAL(duration) %d usec to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1562 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((priv->slice_idx<<20)|tmp); 1563 } 1564 return 0; 1565 case OPENWIFI_CMD_GET_SLICE_TOTAL: 1566 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1567 if (!skb) 1568 return -ENOMEM; 1569 tmp = (xpu_api->XPU_REG_SLICE_COUNT_TOTAL_read()); 1570 printk("%s get SLICE_TOTAL(duration) %d usec of slice %d\n", sdr_compatible_str, tmp&0xFFFFF, tmp>>20); 1571 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_TOTAL, tmp)) 1572 goto nla_put_failure; 1573 return cfg80211_testmode_reply(skb); 1574 1575 case OPENWIFI_CMD_SET_SLICE_START: 1576 if (!tb[OPENWIFI_ATTR_SLICE_START]) 1577 return -EINVAL; 1578 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_START]); 1579 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1580 printk("%s set SLICE_START(duration) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1581 } else { 1582 printk("%s set SLICE_START(duration) %d usec to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1583 xpu_api->XPU_REG_SLICE_COUNT_START_write((priv->slice_idx<<20)|tmp); 1584 } 1585 return 0; 1586 case OPENWIFI_CMD_GET_SLICE_START: 1587 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1588 if (!skb) 1589 return -ENOMEM; 1590 tmp = (xpu_api->XPU_REG_SLICE_COUNT_START_read()); 1591 printk("%s get SLICE_START(duration) %d usec of slice %d\n", sdr_compatible_str, tmp&0xFFFFF, tmp>>20); 1592 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_START, tmp)) 1593 goto nla_put_failure; 1594 return cfg80211_testmode_reply(skb); 1595 1596 case OPENWIFI_CMD_SET_SLICE_END: 1597 if (!tb[OPENWIFI_ATTR_SLICE_END]) 1598 return -EINVAL; 1599 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_END]); 1600 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1601 printk("%s set SLICE_END(duration) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1602 } else { 1603 printk("%s set SLICE_END(duration) %d usec to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1604 xpu_api->XPU_REG_SLICE_COUNT_END_write((priv->slice_idx<<20)|tmp); 1605 } 1606 return 0; 1607 case OPENWIFI_CMD_GET_SLICE_END: 1608 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1609 if (!skb) 1610 return -ENOMEM; 1611 tmp = (xpu_api->XPU_REG_SLICE_COUNT_END_read()); 1612 printk("%s get SLICE_END(duration) %d usec of slice %d\n", sdr_compatible_str, tmp&0xFFFFF, tmp>>20); 1613 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_END, tmp)) 1614 goto nla_put_failure; 1615 return cfg80211_testmode_reply(skb); 1616 1617 // case OPENWIFI_CMD_SET_SLICE_TOTAL1: 1618 // if (!tb[OPENWIFI_ATTR_SLICE_TOTAL1]) 1619 // return -EINVAL; 1620 // tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_TOTAL1]); 1621 // printk("%s set SLICE_TOTAL1(duration) to %d usec\n", sdr_compatible_str, tmp); 1622 // // xpu_api->XPU_REG_SLICE_COUNT_TOTAL1_write(tmp); 1623 // return 0; 1624 // case OPENWIFI_CMD_GET_SLICE_TOTAL1: 1625 // skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1626 // if (!skb) 1627 // return -ENOMEM; 1628 // // tmp = (xpu_api->XPU_REG_SLICE_COUNT_TOTAL1_read()); 1629 // if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_TOTAL1, tmp)) 1630 // goto nla_put_failure; 1631 // return cfg80211_testmode_reply(skb); 1632 1633 // case OPENWIFI_CMD_SET_SLICE_START1: 1634 // if (!tb[OPENWIFI_ATTR_SLICE_START1]) 1635 // return -EINVAL; 1636 // tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_START1]); 1637 // printk("%s set SLICE_START1(duration) to %d usec\n", sdr_compatible_str, tmp); 1638 // // xpu_api->XPU_REG_SLICE_COUNT_START1_write(tmp); 1639 // return 0; 1640 // case OPENWIFI_CMD_GET_SLICE_START1: 1641 // skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1642 // if (!skb) 1643 // return -ENOMEM; 1644 // // tmp = (xpu_api->XPU_REG_SLICE_COUNT_START1_read()); 1645 // if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_START1, tmp)) 1646 // goto nla_put_failure; 1647 // return cfg80211_testmode_reply(skb); 1648 1649 // case OPENWIFI_CMD_SET_SLICE_END1: 1650 // if (!tb[OPENWIFI_ATTR_SLICE_END1]) 1651 // return -EINVAL; 1652 // tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_END1]); 1653 // printk("%s set SLICE_END1(duration) to %d usec\n", sdr_compatible_str, tmp); 1654 // // xpu_api->XPU_REG_SLICE_COUNT_END1_write(tmp); 1655 // return 0; 1656 // case OPENWIFI_CMD_GET_SLICE_END1: 1657 // skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1658 // if (!skb) 1659 // return -ENOMEM; 1660 // // tmp = (xpu_api->XPU_REG_SLICE_COUNT_END1_read()); 1661 // if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_END1, tmp)) 1662 // goto nla_put_failure; 1663 // return cfg80211_testmode_reply(skb); 1664 1665 case OPENWIFI_CMD_SET_RSSI_TH: 1666 if (!tb[OPENWIFI_ATTR_RSSI_TH]) 1667 return -EINVAL; 1668 tmp = nla_get_u32(tb[OPENWIFI_ATTR_RSSI_TH]); 1669 printk("%s set RSSI_TH to %d\n", sdr_compatible_str, tmp); 1670 xpu_api->XPU_REG_LBT_TH_write(tmp); 1671 return 0; 1672 case OPENWIFI_CMD_GET_RSSI_TH: 1673 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1674 if (!skb) 1675 return -ENOMEM; 1676 tmp = xpu_api->XPU_REG_LBT_TH_read(); 1677 if (nla_put_u32(skb, OPENWIFI_ATTR_RSSI_TH, tmp)) 1678 goto nla_put_failure; 1679 return cfg80211_testmode_reply(skb); 1680 1681 case OPENWIFI_CMD_SET_TSF: 1682 printk("openwifi_set_tsf_1"); 1683 if ( (!tb[OPENWIFI_ATTR_HIGH_TSF]) || (!tb[OPENWIFI_ATTR_LOW_TSF]) ) 1684 return -EINVAL; 1685 printk("openwifi_set_tsf_2"); 1686 tsft_high = nla_get_u32(tb[OPENWIFI_ATTR_HIGH_TSF]); 1687 tsft_low = nla_get_u32(tb[OPENWIFI_ATTR_LOW_TSF]); 1688 xpu_api->XPU_REG_TSF_LOAD_VAL_write(tsft_high,tsft_low); 1689 printk("%s openwifi_set_tsf: %08x%08x\n", sdr_compatible_str,tsft_high,tsft_low); 1690 return 0; 1691 1692 case REG_CMD_SET: 1693 if ( (!tb[REG_ATTR_ADDR]) || (!tb[REG_ATTR_VAL]) ) 1694 return -EINVAL; 1695 reg_addr = nla_get_u32(tb[REG_ATTR_ADDR]); 1696 reg_val = nla_get_u32(tb[REG_ATTR_VAL]); 1697 reg_cat = ((reg_addr>>16)&0xFFFF); 1698 reg_addr = (reg_addr&0xFFFF); 1699 reg_addr_idx = (reg_addr>>2); 1700 printk("%s recv set cmd reg cat %d addr %08x val %08x idx %d\n", sdr_compatible_str, reg_cat, reg_addr, reg_val, reg_addr_idx); 1701 if (reg_cat==1) 1702 printk("%s reg cat 1 (rf) is not supported yet!\n", sdr_compatible_str); 1703 else if (reg_cat==2) 1704 rx_intf_api->reg_write(reg_addr,reg_val); 1705 else if (reg_cat==3) 1706 tx_intf_api->reg_write(reg_addr,reg_val); 1707 else if (reg_cat==4) 1708 openofdm_rx_api->reg_write(reg_addr,reg_val); 1709 else if (reg_cat==5) 1710 openofdm_tx_api->reg_write(reg_addr,reg_val); 1711 else if (reg_cat==6) 1712 xpu_api->reg_write(reg_addr,reg_val); 1713 else if (reg_cat==7) { 1714 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1715 priv->drv_rx_reg_val[reg_addr_idx]=reg_val; 1716 if (reg_addr_idx==DRV_RX_REG_IDX_FREQ_BW_CFG) { 1717 if (reg_val==0) 1718 priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT0; 1719 else 1720 priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT1; 1721 1722 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1723 //priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1724 } 1725 } else 1726 printk("%s reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1727 } 1728 else if (reg_cat==8) { 1729 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1730 priv->drv_tx_reg_val[reg_addr_idx]=reg_val; 1731 if (reg_addr_idx==DRV_TX_REG_IDX_FREQ_BW_CFG) { 1732 if (reg_val==0) { 1733 priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0; 1734 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, true, false, true); 1735 } else { 1736 priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1; 1737 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, false, true, true); 1738 } 1739 1740 //priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1741 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1742 } 1743 } else 1744 printk("%s reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1745 } 1746 else if (reg_cat==9) { 1747 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) 1748 priv->drv_xpu_reg_val[reg_addr_idx]=reg_val; 1749 else 1750 printk("%s reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1751 } 1752 else 1753 printk("%s reg cat %d is not supported yet!\n", sdr_compatible_str, reg_cat); 1754 1755 return 0; 1756 case REG_CMD_GET: 1757 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1758 if (!skb) 1759 return -ENOMEM; 1760 reg_addr = nla_get_u32(tb[REG_ATTR_ADDR]); 1761 reg_cat = ((reg_addr>>16)&0xFFFF); 1762 reg_addr = (reg_addr&0xFFFF); 1763 reg_addr_idx = (reg_addr>>2); 1764 printk("%s recv get cmd reg cat %d addr %08x idx %d\n", sdr_compatible_str, reg_cat, reg_addr, reg_addr_idx); 1765 if (reg_cat==1) { 1766 printk("%s reg cat 1 (rf) is not supported yet!\n", sdr_compatible_str); 1767 tmp = 0xFFFFFFFF; 1768 } 1769 else if (reg_cat==2) 1770 tmp = rx_intf_api->reg_read(reg_addr); 1771 else if (reg_cat==3) 1772 tmp = tx_intf_api->reg_read(reg_addr); 1773 else if (reg_cat==4) 1774 tmp = openofdm_rx_api->reg_read(reg_addr); 1775 else if (reg_cat==5) 1776 tmp = openofdm_tx_api->reg_read(reg_addr); 1777 else if (reg_cat==6) 1778 tmp = xpu_api->reg_read(reg_addr); 1779 else if (reg_cat==7) { 1780 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1781 if (reg_addr_idx==DRV_RX_REG_IDX_FREQ_BW_CFG) { 1782 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1783 //priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1784 1785 if (priv->rx_intf_cfg == RX_INTF_BW_20MHZ_AT_0MHZ_ANT0) 1786 priv->drv_rx_reg_val[reg_addr_idx]=0; 1787 else if (priv->rx_intf_cfg == RX_INTF_BW_20MHZ_AT_0MHZ_ANT1) 1788 priv->drv_rx_reg_val[reg_addr_idx]=1; 1789 } 1790 tmp = priv->drv_rx_reg_val[reg_addr_idx]; 1791 } else 1792 printk("%s reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1793 } 1794 else if (reg_cat==8) { 1795 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1796 if (reg_addr_idx==DRV_TX_REG_IDX_FREQ_BW_CFG) { 1797 //priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1798 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1799 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0) 1800 priv->drv_tx_reg_val[reg_addr_idx]=0; 1801 else if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) 1802 priv->drv_tx_reg_val[reg_addr_idx]=1; 1803 } 1804 tmp = priv->drv_tx_reg_val[reg_addr_idx]; 1805 } else 1806 printk("%s reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1807 } 1808 else if (reg_cat==9) { 1809 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) 1810 tmp = priv->drv_xpu_reg_val[reg_addr_idx]; 1811 else 1812 printk("%s reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1813 } 1814 else 1815 printk("%s reg cat %d is not supported yet!\n", sdr_compatible_str, reg_cat); 1816 1817 if (nla_put_u32(skb, REG_ATTR_VAL, tmp)) 1818 goto nla_put_failure; 1819 return cfg80211_testmode_reply(skb); 1820 1821 default: 1822 return -EOPNOTSUPP; 1823 } 1824 1825 nla_put_failure: 1826 dev_kfree_skb(skb); 1827 return -ENOBUFS; 1828 } 1829 1830 static const struct ieee80211_ops openwifi_ops = { 1831 .tx = openwifi_tx, 1832 .start = openwifi_start, 1833 .stop = openwifi_stop, 1834 .add_interface = openwifi_add_interface, 1835 .remove_interface = openwifi_remove_interface, 1836 .config = openwifi_config, 1837 .bss_info_changed = openwifi_bss_info_changed, 1838 .conf_tx = openwifi_conf_tx, 1839 .prepare_multicast = openwifi_prepare_multicast, 1840 .configure_filter = openwifi_configure_filter, 1841 .rfkill_poll = openwifi_rfkill_poll, 1842 .get_tsf = openwifi_get_tsf, 1843 .set_tsf = openwifi_set_tsf, 1844 .reset_tsf = openwifi_reset_tsf, 1845 .set_rts_threshold = openwifi_set_rts_threshold, 1846 .testmode_cmd = openwifi_testmode_cmd, 1847 }; 1848 1849 static const struct of_device_id openwifi_dev_of_ids[] = { 1850 { .compatible = "sdr,sdr", }, 1851 {} 1852 }; 1853 MODULE_DEVICE_TABLE(of, openwifi_dev_of_ids); 1854 1855 static int custom_match_spi_dev(struct device *dev, void *data) 1856 { 1857 const char *name = data; 1858 1859 bool ret = sysfs_streq(name, dev->of_node->name); 1860 printk("%s custom_match_spi_dev %s %s %d\n", sdr_compatible_str,name, dev->of_node->name, ret); 1861 return ret; 1862 } 1863 1864 static int custom_match_platform_dev(struct device *dev, void *data) 1865 { 1866 struct platform_device *plat_dev = to_platform_device(dev); 1867 const char *name = data; 1868 char *name_in_sys_bus_platform_devices = strstr(plat_dev->name, name); 1869 bool match_flag = (name_in_sys_bus_platform_devices != NULL); 1870 1871 if (match_flag) { 1872 printk("%s custom_match_platform_dev %s\n", sdr_compatible_str,plat_dev->name); 1873 } 1874 return(match_flag); 1875 } 1876 1877 static int openwifi_dev_probe(struct platform_device *pdev) 1878 { 1879 struct ieee80211_hw *dev; 1880 struct openwifi_priv *priv; 1881 int err=1, rand_val; 1882 const char *chip_name, *fpga_model; 1883 u32 reg;//, reg1; 1884 1885 struct device_node *np = pdev->dev.of_node; 1886 1887 struct device *tmp_dev; 1888 struct platform_device *tmp_pdev; 1889 struct iio_dev *tmp_indio_dev; 1890 // struct gpio_leds_priv *tmp_led_priv; 1891 1892 printk("\n"); 1893 1894 if (np) { 1895 const struct of_device_id *match; 1896 1897 match = of_match_node(openwifi_dev_of_ids, np); 1898 if (match) { 1899 printk("%s openwifi_dev_probe: match!\n", sdr_compatible_str); 1900 err = 0; 1901 } 1902 } 1903 1904 if (err) 1905 return err; 1906 1907 dev = ieee80211_alloc_hw(sizeof(*priv), &openwifi_ops); 1908 if (!dev) { 1909 printk(KERN_ERR "%s openwifi_dev_probe: ieee80211 alloc failed\n",sdr_compatible_str); 1910 err = -ENOMEM; 1911 goto err_free_dev; 1912 } 1913 1914 priv = dev->priv; 1915 priv->pdev = pdev; 1916 1917 err = of_property_read_string(of_find_node_by_path("/"), "model", &fpga_model); 1918 if(err < 0) { 1919 printk("%s openwifi_dev_probe: WARNING unknown openwifi FPGA model %d\n",sdr_compatible_str, err); 1920 priv->fpga_type = SMALL_FPGA; 1921 } else { 1922 // LARGE FPGAs (i.e. ZCU102, Z7035, ZC706) 1923 if(strstr(fpga_model, "ZCU102") != NULL || strstr(fpga_model, "Z7035") != NULL || strstr(fpga_model, "ZC706") != NULL) 1924 priv->fpga_type = LARGE_FPGA; 1925 // SMALL FPGA: (i.e. ZED, ZC702, Z7020) 1926 else if(strstr(fpga_model, "ZED") != NULL || strstr(fpga_model, "ZC702") != NULL || strstr(fpga_model, "Z7020") != NULL) 1927 priv->fpga_type = SMALL_FPGA; 1928 } 1929 1930 // //-------------find ad9361-phy driver for lo/channel control--------------- 1931 priv->actual_rx_lo = 0; 1932 tmp_dev = bus_find_device( &spi_bus_type, NULL, "ad9361-phy", custom_match_spi_dev ); 1933 if (tmp_dev == NULL) { 1934 printk(KERN_ERR "%s find_dev ad9361-phy failed\n",sdr_compatible_str); 1935 err = -ENOMEM; 1936 goto err_free_dev; 1937 } 1938 printk("%s bus_find_device ad9361-phy: %s. driver_data pointer %p\n", sdr_compatible_str, ((struct spi_device*)tmp_dev)->modalias, (void*)(((struct spi_device*)tmp_dev)->dev.driver_data)); 1939 if (((struct spi_device*)tmp_dev)->dev.driver_data == NULL) { 1940 printk(KERN_ERR "%s find_dev ad9361-phy failed. dev.driver_data == NULL\n",sdr_compatible_str); 1941 err = -ENOMEM; 1942 goto err_free_dev; 1943 } 1944 1945 priv->ad9361_phy = ad9361_spi_to_phy((struct spi_device*)tmp_dev); 1946 if (!(priv->ad9361_phy)) { 1947 printk(KERN_ERR "%s ad9361_spi_to_phy failed\n",sdr_compatible_str); 1948 err = -ENOMEM; 1949 goto err_free_dev; 1950 } 1951 printk("%s ad9361_spi_to_phy ad9361-phy: %s\n", sdr_compatible_str, priv->ad9361_phy->spi->modalias); 1952 1953 priv->ctrl_out.en_mask=0xFF; 1954 priv->ctrl_out.index=0x16; 1955 err = ad9361_ctrl_outs_setup(priv->ad9361_phy, &(priv->ctrl_out)); 1956 if (err < 0) { 1957 printk("%s openwifi_dev_probe: WARNING ad9361_ctrl_outs_setup %d\n",sdr_compatible_str, err); 1958 } else { 1959 printk("%s openwifi_dev_probe: ad9361_ctrl_outs_setup en_mask 0x%02x index 0x%02x\n",sdr_compatible_str, priv->ctrl_out.en_mask, priv->ctrl_out.index); 1960 } 1961 1962 reg = ad9361_spi_read(priv->ad9361_phy->spi, REG_CTRL_OUTPUT_POINTER); 1963 printk("%s openwifi_dev_probe: ad9361_spi_read REG_CTRL_OUTPUT_POINTER 0x%02x\n",sdr_compatible_str, reg); 1964 reg = ad9361_spi_read(priv->ad9361_phy->spi, REG_CTRL_OUTPUT_ENABLE); 1965 printk("%s openwifi_dev_probe: ad9361_spi_read REG_CTRL_OUTPUT_ENABLE 0x%02x\n",sdr_compatible_str, reg); 1966 1967 // //-------------find driver: axi_ad9361 hdl ref design module, dac channel--------------- 1968 tmp_dev = bus_find_device( &platform_bus_type, NULL, "cf-ad9361-dds-core-lpc", custom_match_platform_dev ); 1969 if (!tmp_dev) { 1970 printk(KERN_ERR "%s bus_find_device platform_bus_type cf-ad9361-dds-core-lpc failed\n",sdr_compatible_str); 1971 err = -ENOMEM; 1972 goto err_free_dev; 1973 } 1974 1975 tmp_pdev = to_platform_device(tmp_dev); 1976 if (!tmp_pdev) { 1977 printk(KERN_ERR "%s to_platform_device failed\n",sdr_compatible_str); 1978 err = -ENOMEM; 1979 goto err_free_dev; 1980 } 1981 1982 tmp_indio_dev = platform_get_drvdata(tmp_pdev); 1983 if (!tmp_indio_dev) { 1984 printk(KERN_ERR "%s platform_get_drvdata failed\n",sdr_compatible_str); 1985 err = -ENOMEM; 1986 goto err_free_dev; 1987 } 1988 1989 priv->dds_st = iio_priv(tmp_indio_dev); 1990 if (!(priv->dds_st)) { 1991 printk(KERN_ERR "%s iio_priv failed\n",sdr_compatible_str); 1992 err = -ENOMEM; 1993 goto err_free_dev; 1994 } 1995 printk("%s openwifi_dev_probe: cf-ad9361-dds-core-lpc dds_st->version %08x chip_info->name %s\n",sdr_compatible_str,priv->dds_st->version,priv->dds_st->chip_info->name); 1996 cf_axi_dds_datasel(priv->dds_st, -1, DATA_SEL_DMA); 1997 printk("%s openwifi_dev_probe: cf_axi_dds_datasel DATA_SEL_DMA\n",sdr_compatible_str); 1998 1999 // //-------------find driver: axi_ad9361 hdl ref design module, adc channel--------------- 2000 // turn off radio by muting tx 2001 // ad9361_tx_mute(priv->ad9361_phy, 1); 2002 // reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 2003 // reg1 = ad9361_get_tx_atten(priv->ad9361_phy, 1); 2004 // if (reg == AD9361_RADIO_OFF_TX_ATT && reg1 == AD9361_RADIO_OFF_TX_ATT ) { 2005 // priv->rfkill_off = 0;// 0 off, 1 on 2006 // printk("%s openwifi_dev_probe: rfkill radio off\n",sdr_compatible_str); 2007 // } 2008 // else 2009 // printk("%s openwifi_dev_probe: WARNING rfkill radio off failed. tx att read %d %d require %d\n",sdr_compatible_str, reg, reg1, AD9361_RADIO_OFF_TX_ATT); 2010 2011 priv->rssi_correction = 43;//this will be set in real-time by _rf_set_channel() 2012 2013 //priv->rf_bw = 20000000; // Signal quality issue! NOT use for now. 20MHz or 40MHz. 40MHz need ddc/duc. 20MHz works in bypass mode 2014 priv->rf_bw = 40000000; // 20MHz or 40MHz. 40MHz need ddc/duc. 20MHz works in bypass mode 2015 2016 priv->xpu_cfg = XPU_NORMAL; 2017 2018 priv->openofdm_tx_cfg = OPENOFDM_TX_NORMAL; 2019 priv->openofdm_rx_cfg = OPENOFDM_RX_NORMAL; 2020 2021 printk("%s openwifi_dev_probe: priv->rf_bw == %dHz. bool for 20000000 %d, 40000000 %d\n",sdr_compatible_str, priv->rf_bw, (priv->rf_bw==20000000) , (priv->rf_bw==40000000) ); 2022 if (priv->rf_bw == 20000000) { 2023 priv->rx_intf_cfg = RX_INTF_BYPASS; 2024 priv->tx_intf_cfg = TX_INTF_BYPASS; 2025 //priv->rx_freq_offset_to_lo_MHz = 0; 2026 //priv->tx_freq_offset_to_lo_MHz = 0; 2027 } else if (priv->rf_bw == 40000000) { 2028 //priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_P_10MHZ; //work 2029 //priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1; //work 2030 2031 // // test ddc at central, duc at central+10M. It works. And also change rx BW from 40MHz to 20MHz in rf_init.sh. Rx sampling rate is still 40Msps 2032 priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT0; 2033 priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0; // Let's use rx0 tx0 as default mode, because it works for both 9361 and 9364 2034 // // try another antenna option 2035 //priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT1; 2036 //priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0; 2037 2038 #if 0 2039 if (priv->rx_intf_cfg == DDC_BW_20MHZ_AT_N_10MHZ) { 2040 priv->rx_freq_offset_to_lo_MHz = -10; 2041 } else if (priv->rx_intf_cfg == DDC_BW_20MHZ_AT_P_10MHZ) { 2042 priv->rx_freq_offset_to_lo_MHz = 10; 2043 } else if (priv->rx_intf_cfg == DDC_BW_20MHZ_AT_0MHZ) { 2044 priv->rx_freq_offset_to_lo_MHz = 0; 2045 } else { 2046 printk("%s openwifi_dev_probe: Warning! priv->rx_intf_cfg == %d\n",sdr_compatible_str,priv->rx_intf_cfg); 2047 } 2048 #endif 2049 } else { 2050 printk("%s openwifi_dev_probe: Warning! priv->rf_bw == %dHz (should be 20000000 or 40000000)\n",sdr_compatible_str, priv->rf_bw); 2051 } 2052 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 2053 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 2054 printk("%s openwifi_dev_probe: test_mode %d\n", sdr_compatible_str, test_mode); 2055 2056 //let's by default turn radio on when probing 2057 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) { 2058 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, false, true, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 2059 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 2060 } else { 2061 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, true, false, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 2062 reg = ad9361_get_tx_atten(priv->ad9361_phy, 1); 2063 } 2064 if (reg == AD9361_RADIO_ON_TX_ATT) { 2065 priv->rfkill_off = 1;// 0 off, 1 on 2066 printk("%s openwifi_dev_probe: rfkill radio on\n",sdr_compatible_str); 2067 } 2068 else 2069 printk("%s openwifi_dev_probe: WARNING rfkill radio on failed. tx att read %d require %d\n",sdr_compatible_str, reg, AD9361_RADIO_ON_TX_ATT); 2070 2071 memset(priv->drv_rx_reg_val,0,sizeof(priv->drv_rx_reg_val)); 2072 memset(priv->drv_tx_reg_val,0,sizeof(priv->drv_tx_reg_val)); 2073 memset(priv->drv_xpu_reg_val,0,sizeof(priv->drv_xpu_reg_val)); 2074 2075 // //set ad9361 in certain mode 2076 #if 0 2077 err = ad9361_set_trx_clock_chain_freq(priv->ad9361_phy,priv->rf_bw); 2078 printk("%s openwifi_dev_probe: ad9361_set_trx_clock_chain_freq %dHz err %d\n",sdr_compatible_str, priv->rf_bw,err); 2079 err = ad9361_update_rf_bandwidth(priv->ad9361_phy,priv->rf_bw,priv->rf_bw); 2080 printk("%s openwifi_dev_probe: ad9361_update_rf_bandwidth %dHz err %d\n",sdr_compatible_str, priv->rf_bw,err); 2081 2082 rx_intf_api->hw_init(priv->rx_intf_cfg,8,8); 2083 tx_intf_api->hw_init(priv->tx_intf_cfg,8,8,priv->fpga_type); 2084 openofdm_tx_api->hw_init(priv->openofdm_tx_cfg); 2085 openofdm_rx_api->hw_init(priv->openofdm_rx_cfg); 2086 printk("%s openwifi_dev_probe: rx_intf_cfg %d openofdm_rx_cfg %d tx_intf_cfg %d openofdm_tx_cfg %d\n",sdr_compatible_str, priv->rx_intf_cfg, priv->openofdm_rx_cfg, priv->tx_intf_cfg, priv->openofdm_tx_cfg); 2087 printk("%s openwifi_dev_probe: rx_freq_offset_to_lo_MHz %d tx_freq_offset_to_lo_MHz %d\n",sdr_compatible_str, priv->rx_freq_offset_to_lo_MHz, priv->tx_freq_offset_to_lo_MHz); 2088 #endif 2089 2090 dev->max_rates = 1; //maximum number of alternate rate retry stages the hw can handle. 2091 2092 SET_IEEE80211_DEV(dev, &pdev->dev); 2093 platform_set_drvdata(pdev, dev); 2094 2095 BUILD_BUG_ON(sizeof(priv->rates_2GHz) != sizeof(openwifi_2GHz_rates)); 2096 BUILD_BUG_ON(sizeof(priv->rates_5GHz) != sizeof(openwifi_5GHz_rates)); 2097 BUILD_BUG_ON(sizeof(priv->channels_2GHz) != sizeof(openwifi_2GHz_channels)); 2098 BUILD_BUG_ON(sizeof(priv->channels_5GHz) != sizeof(openwifi_5GHz_channels)); 2099 2100 memcpy(priv->rates_2GHz, openwifi_2GHz_rates, sizeof(openwifi_2GHz_rates)); 2101 memcpy(priv->rates_5GHz, openwifi_5GHz_rates, sizeof(openwifi_5GHz_rates)); 2102 memcpy(priv->channels_2GHz, openwifi_2GHz_channels, sizeof(openwifi_2GHz_channels)); 2103 memcpy(priv->channels_5GHz, openwifi_5GHz_channels, sizeof(openwifi_5GHz_channels)); 2104 2105 priv->band = BAND_5_8GHZ; //this can be changed by band _rf_set_channel() (2.4GHz ERP(OFDM)) (5GHz OFDM) 2106 priv->channel = 44; //currently useless. this can be changed by band _rf_set_channel() 2107 priv->use_short_slot = false; //this can be changed by openwifi_bss_info_changed: BSS_CHANGED_ERP_SLOT 2108 2109 priv->band_2GHz.band = NL80211_BAND_2GHZ; 2110 priv->band_2GHz.channels = priv->channels_2GHz; 2111 priv->band_2GHz.n_channels = ARRAY_SIZE(priv->channels_2GHz); 2112 priv->band_2GHz.bitrates = priv->rates_2GHz; 2113 priv->band_2GHz.n_bitrates = ARRAY_SIZE(priv->rates_2GHz); 2114 priv->band_2GHz.ht_cap.ht_supported = true; 2115 priv->band_2GHz.ht_cap.cap = IEEE80211_HT_CAP_SGI_20; 2116 memset(&priv->band_2GHz.ht_cap.mcs, 0, sizeof(priv->band_2GHz.ht_cap.mcs)); 2117 priv->band_2GHz.ht_cap.mcs.rx_mask[0] = 0xff; 2118 priv->band_2GHz.ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 2119 dev->wiphy->bands[NL80211_BAND_2GHZ] = &(priv->band_2GHz); 2120 2121 priv->band_5GHz.band = NL80211_BAND_5GHZ; 2122 priv->band_5GHz.channels = priv->channels_5GHz; 2123 priv->band_5GHz.n_channels = ARRAY_SIZE(priv->channels_5GHz); 2124 priv->band_5GHz.bitrates = priv->rates_5GHz; 2125 priv->band_5GHz.n_bitrates = ARRAY_SIZE(priv->rates_5GHz); 2126 priv->band_5GHz.ht_cap.ht_supported = true; 2127 priv->band_5GHz.ht_cap.cap = IEEE80211_HT_CAP_SGI_20; 2128 memset(&priv->band_5GHz.ht_cap.mcs, 0, sizeof(priv->band_5GHz.ht_cap.mcs)); 2129 priv->band_5GHz.ht_cap.mcs.rx_mask[0] = 0xff; 2130 priv->band_5GHz.ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 2131 dev->wiphy->bands[NL80211_BAND_5GHZ] = &(priv->band_5GHz); 2132 2133 printk("%s openwifi_dev_probe: band_2GHz.n_channels %d n_bitrates %d band_5GHz.n_channels %d n_bitrates %d\n",sdr_compatible_str, 2134 priv->band_2GHz.n_channels,priv->band_2GHz.n_bitrates,priv->band_5GHz.n_channels,priv->band_5GHz.n_bitrates); 2135 2136 ieee80211_hw_set(dev, HOST_BROADCAST_PS_BUFFERING); 2137 ieee80211_hw_set(dev, RX_INCLUDES_FCS); 2138 ieee80211_hw_set(dev, BEACON_TX_STATUS); 2139 2140 dev->vif_data_size = sizeof(struct openwifi_vif); 2141 dev->wiphy->interface_modes = 2142 BIT(NL80211_IFTYPE_MONITOR)| 2143 BIT(NL80211_IFTYPE_P2P_GO) | 2144 BIT(NL80211_IFTYPE_P2P_CLIENT) | 2145 BIT(NL80211_IFTYPE_AP) | 2146 BIT(NL80211_IFTYPE_STATION) | 2147 BIT(NL80211_IFTYPE_ADHOC) | 2148 BIT(NL80211_IFTYPE_MESH_POINT) | 2149 BIT(NL80211_IFTYPE_OCB); 2150 dev->wiphy->iface_combinations = &openwifi_if_comb; 2151 dev->wiphy->n_iface_combinations = 1; 2152 2153 dev->wiphy->regulatory_flags = (REGULATORY_STRICT_REG|REGULATORY_CUSTOM_REG); // use our own config within strict regulation 2154 //dev->wiphy->regulatory_flags = REGULATORY_CUSTOM_REG; // use our own config 2155 wiphy_apply_custom_regulatory(dev->wiphy, &sdr_regd); 2156 2157 chip_name = "ZYNQ"; 2158 2159 /* we declare to MAC80211 all the queues except for beacon queue 2160 * that will be eventually handled by DRV. 2161 * TX rings are arranged in such a way that lower is the IDX, 2162 * higher is the priority, in order to achieve direct mapping 2163 * with mac80211, however the beacon queue is an exception and it 2164 * is mapped on the highst tx ring IDX. 2165 */ 2166 dev->queues = MAX_NUM_HW_QUEUE; 2167 //dev->queues = 1; 2168 2169 ieee80211_hw_set(dev, SIGNAL_DBM); 2170 2171 wiphy_ext_feature_set(dev->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST); 2172 2173 priv->rf = &ad9361_rf_ops; 2174 2175 memset(priv->dest_mac_addr_queue_map,0,sizeof(priv->dest_mac_addr_queue_map)); 2176 priv->slice_idx = 0xFFFFFFFF; 2177 2178 sg_init_table(&(priv->tx_sg), 1); 2179 2180 get_random_bytes(&rand_val, sizeof(rand_val)); 2181 rand_val%=250; 2182 priv->mac_addr[0]=0x66; priv->mac_addr[1]=0x55; priv->mac_addr[2]=0x44; priv->mac_addr[3]=0x33; priv->mac_addr[4]=0x22; 2183 priv->mac_addr[5]=rand_val+1; 2184 //priv->mac_addr[5]=0x11; 2185 if (!is_valid_ether_addr(priv->mac_addr)) { 2186 printk(KERN_WARNING "%s openwifi_dev_probe: WARNING Invalid hwaddr! Using randomly generated MAC addr\n",sdr_compatible_str); 2187 eth_random_addr(priv->mac_addr); 2188 } else { 2189 printk("%s openwifi_dev_probe: mac_addr %02x:%02x:%02x:%02x:%02x:%02x\n",sdr_compatible_str,priv->mac_addr[0],priv->mac_addr[1],priv->mac_addr[2],priv->mac_addr[3],priv->mac_addr[4],priv->mac_addr[5]); 2190 } 2191 SET_IEEE80211_PERM_ADDR(dev, priv->mac_addr); 2192 2193 spin_lock_init(&priv->lock); 2194 2195 err = ieee80211_register_hw(dev); 2196 if (err) { 2197 pr_err(KERN_ERR "%s openwifi_dev_probe: WARNING Cannot register device\n",sdr_compatible_str); 2198 goto err_free_dev; 2199 } else { 2200 printk("%s openwifi_dev_probe: ieee80211_register_hw %d\n",sdr_compatible_str, err); 2201 } 2202 2203 // // //--------------------hook leds (not complete yet)-------------------------------- 2204 // tmp_dev = bus_find_device( &platform_bus_type, NULL, "leds", custom_match_platform_dev ); //leds is the name in devicetree, not "compatible" field 2205 // if (!tmp_dev) { 2206 // printk(KERN_ERR "%s bus_find_device platform_bus_type leds-gpio failed\n",sdr_compatible_str); 2207 // err = -ENOMEM; 2208 // goto err_free_dev; 2209 // } 2210 2211 // tmp_pdev = to_platform_device(tmp_dev); 2212 // if (!tmp_pdev) { 2213 // printk(KERN_ERR "%s to_platform_device failed for leds-gpio\n",sdr_compatible_str); 2214 // err = -ENOMEM; 2215 // goto err_free_dev; 2216 // } 2217 2218 // tmp_led_priv = platform_get_drvdata(tmp_pdev); 2219 // if (!tmp_led_priv) { 2220 // printk(KERN_ERR "%s platform_get_drvdata failed for leds-gpio\n",sdr_compatible_str); 2221 // err = -ENOMEM; 2222 // goto err_free_dev; 2223 // } 2224 // printk("%s openwifi_dev_probe: leds-gpio detect %d leds!\n",sdr_compatible_str, tmp_led_priv->num_leds); 2225 // if (tmp_led_priv->num_leds!=4){ 2226 // printk(KERN_ERR "%s WARNING we expect 4 leds, but actual %d leds\n",sdr_compatible_str,tmp_led_priv->num_leds); 2227 // err = -ENOMEM; 2228 // goto err_free_dev; 2229 // } 2230 // gpiod_set_value(tmp_led_priv->leds[0].gpiod, 1);//light it 2231 // gpiod_set_value(tmp_led_priv->leds[3].gpiod, 0);//black it 2232 // priv->num_led = tmp_led_priv->num_leds; 2233 // priv->led[0] = &(tmp_led_priv->leds[0].cdev); 2234 // priv->led[1] = &(tmp_led_priv->leds[1].cdev); 2235 // priv->led[2] = &(tmp_led_priv->leds[2].cdev); 2236 // priv->led[3] = &(tmp_led_priv->leds[3].cdev); 2237 2238 // snprintf(priv->led_name[0], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::radio", wiphy_name(dev->wiphy)); 2239 // snprintf(priv->led_name[1], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::assoc", wiphy_name(dev->wiphy)); 2240 // snprintf(priv->led_name[2], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::tx", wiphy_name(dev->wiphy)); 2241 // snprintf(priv->led_name[3], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::rx", wiphy_name(dev->wiphy)); 2242 2243 wiphy_info(dev->wiphy, "hwaddr %pm, %s + %s\n", 2244 priv->mac_addr, chip_name, priv->rf->name); 2245 2246 openwifi_rfkill_init(dev); 2247 return 0; 2248 2249 err_free_dev: 2250 ieee80211_free_hw(dev); 2251 2252 return err; 2253 } 2254 2255 static int openwifi_dev_remove(struct platform_device *pdev) 2256 { 2257 struct ieee80211_hw *dev = platform_get_drvdata(pdev); 2258 2259 if (!dev) { 2260 pr_info("%s openwifi_dev_remove: dev %p\n", sdr_compatible_str, (void*)dev); 2261 return(-1); 2262 } 2263 2264 openwifi_rfkill_exit(dev); 2265 ieee80211_unregister_hw(dev); 2266 ieee80211_free_hw(dev); 2267 return(0); 2268 } 2269 2270 static struct platform_driver openwifi_dev_driver = { 2271 .driver = { 2272 .name = "sdr,sdr", 2273 .owner = THIS_MODULE, 2274 .of_match_table = openwifi_dev_of_ids, 2275 }, 2276 .probe = openwifi_dev_probe, 2277 .remove = openwifi_dev_remove, 2278 }; 2279 2280 module_platform_driver(openwifi_dev_driver); 2281