History log of /XiangShan/src/main/scala/xiangshan/Bundle.scala (Results 501 – 525 of 552)
Revision Date Author Comments
# d9cb241d 14-Jul-2020 GouLingrui <[email protected]>

BPU: some other files added


# a286134c 13-Jul-2020 William Wang <[email protected]>

Lsu: update ls framework


# c84054ca 12-Jul-2020 LinJiawei <[email protected]>

Add CSR


# 45e96f83 10-Jul-2020 zhanglinjuan <[email protected]>

ibuf/brq: add bpu update info in backend pipeline


# 2917253c 10-Jul-2020 zhanglinjuan <[email protected]>

ifu: add instrMask in fetchPackage


# f95e78ec 09-Jul-2020 zhanglinjuan <[email protected]>

bpu: add update logic of btb, jbtac and ghr


# 627c0a19 09-Jul-2020 zhanglinjuan <[email protected]>

bpu: split 8 btb targets into 8 ways in a SRAM


# 3803411b 08-Jul-2020 zhanglinjuan <[email protected]>

Bundle: fix both directioned and undirectioned signals in a bundle


# f5c046cd 08-Jul-2020 zhanglinjuan <[email protected]>

bpu: fix history shifting logic in Stage3


# 028970c4 08-Jul-2020 zhanglinjuan <[email protected]>

tage: add tage outer module


# 1e7d14a8 08-Jul-2020 zhanglinjuan <[email protected]>

bpu: add tage module interface and global history


# cf1c5078 07-Jul-2020 zhanglinjuan <[email protected]>

bpu: use checkpoint to recover ras


# dff546ec 07-Jul-2020 zhanglinjuan <[email protected]>

Bundle: delete _type in BranchPrediction bundle


# 39ad0c81 07-Jul-2020 zhanglinjuan <[email protected]>

Merge branch 'brq-v2' into dev-bpu-pipeline


# e983e862 07-Jul-2020 zhanglinjuan <[email protected]>

Bundle: add ras checkpoint info in BranchPrediction bundle


# a25b1bce 07-Jul-2020 LinJiawei <[email protected]>

Bundle/RedirectInfo: use redirectinfo update bpu


# 94947342 06-Jul-2020 zhanglinjuan <[email protected]>

bpu: add ras, btb check, target gen and history gen in Stage3


# 332829db 05-Jul-2020 zhanglinjuan <[email protected]>

Merge branch 'master' into dev-bpu-pipeline


# 0a4f5b0c 05-Jul-2020 zhanglinjuan <[email protected]>

Merge branch 'master' into dev-bpu-pipeline


# 140dcc2e 05-Jul-2020 zhanglinjuan <[email protected]>

each instr has its own global history instead of each fetch package


# 6fb61704 04-Jul-2020 zhanglinjuan <[email protected]>

bpu: add bpu pipeline


# bfa4b2b4 04-Jul-2020 LinJiawei <[email protected]>

Cmp brTag


# ab7d3e5f 03-Jul-2020 William Wang <[email protected]>

backend: redefine RoqIdxWidth


# 43c072e7 01-Jul-2020 zhanglinjuan <[email protected]>

fix target in btb entry


# ced835e1 01-Jul-2020 zhanglinjuan <[email protected]>

Merge branch 'master' into dev-bpu


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