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/nrf52832-nimble/packages/NimBLE-latest/nimble/host/test/src/
H A Dble_gatt_disc_s_test.c134 if (services[idx - 1].end_handle != 0xffff) { in ble_gatt_disc_s_test_misc_rx_all_rsp()
139 services[idx - 1].start_handle); in ble_gatt_disc_s_test_misc_rx_all_rsp()
197 if (services[idx - 1].end_handle != 0xffff) { in ble_gatt_disc_s_test_misc_rx_uuid_rsp()
202 services[idx - 1].start_handle); in ble_gatt_disc_s_test_misc_rx_uuid_rsp()
245 ble_gatt_disc_s_test_rx_complete = 1; in ble_gatt_disc_s_test_misc_disc_cb()
249 ble_gatt_disc_s_test_rx_complete = 1; in ble_gatt_disc_s_test_misc_disc_cb()
301 { 1, 5, BLE_UUID128_DECLARE(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 ), }, in TEST_CASE()
307 { 1, 5, BLE_UUID128_DECLARE(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 ), }, in TEST_CASE()
314 { 1, 5, BLE_UUID128_DECLARE(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 ), }, in TEST_CASE()
324 { 1, 5, BLE_UUID128_DECLARE(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 ), }, in TEST_CASE()
[all …]
H A Dble_gatt_conn_test.c30 static uint8_t ble_gatt_conn_test_write_value[] = { 1, 3, 64, 21, 6 };
44 memset(&ble_gatt_conn_test_gap_event, -1, in ble_gatt_conn_test_util_init()
69 buf = os_mbuf_extend(*om, 1); in ble_gatt_conn_test_attr_cb()
71 *buf = 1; in ble_gatt_conn_test_attr_cb()
75 return -1; in ble_gatt_conn_test_attr_cb()
398 ble_hs_test_util_create_conn(1, ((uint8_t[]){1,2,3,4,5,6,7,8}), in TEST_CASE()
406 /* Connection 1. */ in TEST_CASE()
407 mtu_arg.exp_conn_handle = 1; in TEST_CASE()
408 ble_gattc_exchange_mtu(1, ble_gatt_conn_test_mtu_cb, &mtu_arg); in TEST_CASE()
410 disc_all_svcs_arg.exp_conn_handle = 1; in TEST_CASE()
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/nrf52832-nimble/rt-thread/components/drivers/usb/usbdevice/class/
H A Dhid.c42 USAGE_PAGE(1), 0x01,
43 USAGE(1), 0x06,
44 COLLECTION(1), 0x01,
45 REPORT_ID(1), HID_REPORT_ID_KEYBOARD1,
47 USAGE_PAGE(1), 0x07,
48 USAGE_MINIMUM(1), 0xE0,
49 USAGE_MAXIMUM(1), 0xE7,
50 LOGICAL_MINIMUM(1), 0x00,
51 LOGICAL_MAXIMUM(1), 0x01,
52 REPORT_SIZE(1), 0x01,
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/nrf52832-nimble/packages/NimBLE-latest/nimble/controller/src/
H A Dble_ll_supp_cmd.c30 #define BLE_SUPP_CMD_DISCONNECT (1 << 5)
34 #define BLE_SUPP_CMD_SET_EVENT_MASK (1 << 6)
42 #define BLE_SUPP_CMD_RD_LOC_VER (1 << 3)
43 #define BLE_SUPP_CMD_RD_LOC_SUPP_FEAT (1 << 5)
51 #define BLE_SUPP_CMD_RD_BD_ADDR (1 << 1)
52 #define BLE_SUPP_CMD_RD_RSSI (1 << 5)
61 #define BLE_SUPP_CMD_LE_SET_EV_MASK (1 << 0)
62 #define BLE_SUPP_CMD_LE_RD_BUF_SIZE (1 << 1)
63 #define BLE_SUPP_CMD_LE_RD_LOC_FEAT (1 << 2)
64 #define BLE_SUPP_CMD_LE_SET_RAND_ADDR (1 << 4)
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/nrf52832-nimble/rt-thread/examples/libc/
H A Dfile.c27 write(fd, text, strlen(text) + 1); in libc_fstat()
47 write(fd, text, strlen(text) + 1); in libc_lseek()
81 return 1; in libc_fseek()
86 if (fd == -1) in libc_fseek()
89 return 1; in libc_fseek()
97 return 1; in libc_fseek()
99 setbuffer(fp, strbuf, sizeof(outstr) - 1); in libc_fseek()
101 if (fwrite(outstr, sizeof(outstr) - 1, 1, fp) != 1) in libc_fseek()
104 result = 1; in libc_fseek()
112 result = 1; in libc_fseek()
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/nrf52832-nimble/rt-thread/libcpu/mips/x1000/
H A Dx1000_slcdc.h35 #define SLCDC_CFG_DWIDTH_16BIT (1 << SLCDC_CFG_DWIDTH_BIT)
44 #define SLCDC_CFG_CWIDTH_8BIT (1 << SLCDC_CFG_CWIDTH_BIT)
48 #define SLCDC_CFG_CS_ACTIVE_HIGH (1 << 4)
50 #define SLCDC_CFG_RS_CMD_HIGH (1 << 3)
51 #define SLCDC_CFG_CLK_ACTIVE_FALLING (0 << 1)
52 #define SLCDC_CFG_CLK_ACTIVE_RISING (1 << 1)
54 #define SLCDC_CFG_TYPE_SERIAL (1 << 0)
60 #define SLCDC_NEW_CFG_DWIDTH_9BIT (1 << SLCDC_NEW_CFG_DWIDTH_BIT)
64 #define SLCDC_NEW_CFG_6800_MD (1 << 11)
65 #define SLCDC_NEW_CFG_CMD_9BIT (1 << 10) /* only use in old slcd */
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/nrf52832-nimble/rt-thread/libcpu/arm/s3c44b0/
H A Dstart_rvds.S80 ;// <o1.1..2> CM: Cache Mode
82 ;// <1=> Half Cache Enable (4kB Cache, 4kB SRAM)
87 ;// <o1.5> DA: Data Abort <0=> Enable <1=> Disable
91 ;// <o2.16..31> End Address + 1 <0x0-0x10000000:0x1000><#/0x1000>
92 ;// <i> SE = (End Address + 1) / 4k
94 ;// <h> Non-cacheable Area 1
97 ;// <o3.16..31> End Address + 1 <0x0-0x10000000:0x1000><#/0x1000>
98 ;// <i> SE = (End Address + 1) / 4k
103 ;// <o4.6..7> LCD_DMA <0=> 1st <1=> 2nd <2=> 3rd <3=> 4th
104 ;// <o4.4..5> ZDMA <0=> 1st <1=> 2nd <2=> 3rd <3=> 4th
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/nrf52832-nimble/rt-thread/libcpu/mips/common/
H A Dmips_def.h43 * 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
44 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
74 * 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
75 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
87 * 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
88 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
100 * 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
101 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
113 * 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
114 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
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H A Dmipsregs.h44 #define CP0_RANDOM $1
84 #define CP0_IBOUND $1
92 * Coprocessor 0 Set 1 register names
114 * Coprocessor 1 (FPU) register names
176 /* Bits 0 and 1 of FPU Status Register specify the rounding mode */
187 #define IE_SW0 (_ULCAST_(1) << 8)
188 #define IE_SW1 (_ULCAST_(1) << 9)
189 #define IE_IRQ0 (_ULCAST_(1) << 10)
190 #define IE_IRQ1 (_ULCAST_(1) << 11)
191 #define IE_IRQ2 (_ULCAST_(1) << 12)
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/nrf52832-nimble/rt-thread/components/libc/compilers/minilibc/
H A Dmath.c22 static double cos_sign_tbl[] = {1,-1,-1,1};
25 static double sin_sign_tbl[] = {1,-1,-1,1};
39 quadrant = (quadrant - 1) & 0x3; in sin()
49 * result = 1 - x^2/2! + x^4/4! - x^6/6! + x^8/8! in sin()
52 * result = 1 - x^2 * (1/2! - x^2 * (1/4! - x^2 * (1/6! - x^2 * (1/8!)))) in sin()
59 result += 1./(1.*2*3*4*5*6*7*8*9*10*11*12*13*14*15*16*17*18*19*20); in sin()
63 result += 1./(1.*2*3*4*5*6*7*8*9*10*11*12*13*14*15*16*17*18); in sin()
67 result += 1./(1.*2*3*4*5*6*7*8*9*10*11*12*13*14*15*16); in sin()
71 result += 1./(1.*2*3*4*5*6*7*8*9*10*11*12*13*14); in sin()
75 result += 1./(1.*2*3*4*5*6*7*8*9*10*11*12); in sin()
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/nrf52832-nimble/rt-thread/tools/kconfig-frontends/scripts/.autostuff/m4/
H A Dlibtool.m441 [m4_if(m4_version_compare(m4_defn([LT_PACKAGE_VERSION]), [$1]), -1,
43 [m4_fatal([Libtool version $1 or higher is required],
83 _LT_SET_OPTIONS([$0], [$1])
134 func_cc_basename $1
158 _LT_DECL([], [PATH_SEPARATOR], [1], [The PATH separator for the build system])dnl
174 _LT_DECL([], [LN_S], [1], [Whether we need soft or hard links])dnl
264 sed_quote_subst='s/\([["`$\\]]\)/\\\1/g'
267 double_quote_subst='s/\([["`\\]]\)/\\\1/g'
307 [m4_ifval([$1],
309 [$1
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/nrf52832-nimble/rt-thread/components/net/lwip-2.0.2/src/apps/lwiperf/
H A Dlwiperf.c24 * 1. Redistributions of source code must retain the above copyright notice,
73 /** If this is 1, check that received data has the correct format */
87 u32_t amount; /* pos. value: bytes?; neg. values: time (unit is 10ms: 1/100 second) */
94 /* 1=tcp, 0=udp */
96 /* 1=server, 0=client */
121 …'0','1','2','3','4','5','6','7','8','9','0','1','2','3','4','5','6','7','8','9','0','1','2','3','4…
122 …'0','1','2','3','4','5','6','7','8','9','0','1','2','3','4','5','6','7','8','9','0','1','2','3','4…
123 …'0','1','2','3','4','5','6','7','8','9','0','1','2','3','4','5','6','7','8','9','0','1','2','3','4…
124 …'0','1','2','3','4','5','6','7','8','9','0','1','2','3','4','5','6','7','8','9','0','1','2','3','4…
125 …'0','1','2','3','4','5','6','7','8','9','0','1','2','3','4','5','6','7','8','9','0','1','2','3','4…
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/nrf52832-nimble/packages/NimBLE-latest/nimble/host/
H A Dsyscfg.yml22 value: 1
28 value: 1
45 value: 1
78 value: 1
94 value: 1
99 1: Slower, more memory efficient.
101 value: 1
117 value: 1
125 value: 1
137 Whether the out-of-band pairing algorithm is advertised. (0/1)
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/nrf52832-nimble/packages/NimBLE-latest/porting/nimble/include/syscfg/
H A Dsyscfg.h30 #define MYNEWT_VAL_BSP_NRF52 (1)
33 #define MYNEWT_VAL_MCU_NRF52832 (1)
62 #define MYNEWT_VAL_TIMER_5 (1)
116 #define MYNEWT_VAL_BLE_MAX_CONNECTIONS (1)
124 #define MYNEWT_VAL_BLE_ROLE_BROADCASTER (1)
128 #define MYNEWT_VAL_BLE_ROLE_CENTRAL (1)
132 #define MYNEWT_VAL_BLE_ROLE_OBSERVER (1)
136 #define MYNEWT_VAL_BLE_ROLE_PERIPHERAL (1)
140 #define MYNEWT_VAL_BLE_WHITELIST (1)
147 #define MYNEWT_VAL_BLE_DEVICE (1)
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/nrf52832-nimble/rt-thread/components/net/lwip-2.1.0/src/apps/lwiperf/
H A Dlwiperf.c28 * 1. Redistributions of source code must retain the above copyright notice,
82 /** If this is 1, check that received data has the correct format */
96 u32_t amount; /* pos. value: bytes?; neg. values: time (unit is 10ms: 1/100 second) */
105 /* 1=tcp, 0=udp */
107 /* 1=server, 0=client */
123 /* 1=start server when client is closed */
136 …'1', '2', '3', '4', '5', '6', '7', '8', '9', '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', '0'…
137 …'1', '2', '3', '4', '5', '6', '7', '8', '9', '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', '0'…
138 …'1', '2', '3', '4', '5', '6', '7', '8', '9', '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', '0'…
139 …'1', '2', '3', '4', '5', '6', '7', '8', '9', '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', '0'…
[all …]
/nrf52832-nimble/nordic/nrfx/mdk/
H A Dnrf52_bitfields.h8 1. Redistributions of source code must retain the above copyright notice, this
44 /* Bit 2 : Write '1' to Enable interrupt for NOTRESOLVED event */
48 #define AAR_INTENSET_NOTRESOLVED_Enabled (1UL) /*!< Read: Enabled */
49 #define AAR_INTENSET_NOTRESOLVED_Set (1UL) /*!< Enable */
51 /* Bit 1 : Write '1' to Enable interrupt for RESOLVED event */
52 #define AAR_INTENSET_RESOLVED_Pos (1UL) /*!< Position of RESOLVED field. */
55 #define AAR_INTENSET_RESOLVED_Enabled (1UL) /*!< Read: Enabled */
56 #define AAR_INTENSET_RESOLVED_Set (1UL) /*!< Enable */
58 /* Bit 0 : Write '1' to Enable interrupt for END event */
62 #define AAR_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */
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H A Diar_startup_nrf52840.s222 SECTION .text:CODE:REORDER:NOROOT(1)
227 SECTION .text:CODE:REORDER:NOROOT(1)
232 SECTION .text:CODE:REORDER:NOROOT(1)
237 SECTION .text:CODE:REORDER:NOROOT(1)
242 SECTION .text:CODE:REORDER:NOROOT(1)
247 SECTION .text:CODE:REORDER:NOROOT(1)
252 SECTION .text:CODE:REORDER:NOROOT(1)
257 SECTION .text:CODE:REORDER:NOROOT(1)
262 SECTION .text:CODE:REORDER:NOROOT(1)
270 SECTION .text:CODE:REORDER:NOROOT(1)
[all …]
H A Dnrf9160_bitfields.h8 1. Redistributions of source code must retain the above copyright notice, this
47 #define CLOCK_TASKS_HFCLKSTART_TASKS_HFCLKSTART_Trigger (1UL) /*!< Trigger task */
55 #define CLOCK_TASKS_HFCLKSTOP_TASKS_HFCLKSTOP_Trigger (1UL) /*!< Trigger task */
63 #define CLOCK_TASKS_LFCLKSTART_TASKS_LFCLKSTART_Trigger (1UL) /*!< Trigger task */
71 #define CLOCK_TASKS_LFCLKSTOP_TASKS_LFCLKSTOP_Trigger (1UL) /*!< Trigger task */
80 #define CLOCK_SUBSCRIBE_HFCLKSTART_EN_Enabled (1UL) /*!< Enable subscription */
93 #define CLOCK_SUBSCRIBE_HFCLKSTOP_EN_Enabled (1UL) /*!< Enable subscription */
106 #define CLOCK_SUBSCRIBE_LFCLKSTART_EN_Enabled (1UL) /*!< Enable subscription */
119 #define CLOCK_SUBSCRIBE_LFCLKSTOP_EN_Enabled (1UL) /*!< Enable subscription */
132 #define CLOCK_EVENTS_HFCLKSTARTED_EVENTS_HFCLKSTARTED_Generated (1UL) /*!< Event generated */
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H A Diar_startup_nrf52.s222 SECTION .text:CODE:REORDER:NOROOT(1)
227 SECTION .text:CODE:REORDER:NOROOT(1)
232 SECTION .text:CODE:REORDER:NOROOT(1)
237 SECTION .text:CODE:REORDER:NOROOT(1)
242 SECTION .text:CODE:REORDER:NOROOT(1)
247 SECTION .text:CODE:REORDER:NOROOT(1)
252 SECTION .text:CODE:REORDER:NOROOT(1)
257 SECTION .text:CODE:REORDER:NOROOT(1)
262 SECTION .text:CODE:REORDER:NOROOT(1)
270 SECTION .text:CODE:REORDER:NOROOT(1)
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/nrf52832-nimble/rt-thread/components/drivers/include/drivers/
H A Dmmcsd_core.h35 #define DATA_DIR_WRITE (1 << 0)
36 #define DATA_DIR_READ (1 << 1)
37 #define DATA_STREAM (1 << 2)
58 #define RESP_R1 (1 << 0)
71 #define CMD_ADTC (1 << 4)
81 #define RESP_SPI_R1 (1 << 6)
109 #define R1_OUT_OF_RANGE (1 << 31) /* er, c */
110 #define R1_ADDRESS_ERROR (1 << 30) /* erx, c */
111 #define R1_BLOCK_LEN_ERROR (1 << 29) /* er, c */
112 #define R1_ERASE_SEQ_ERROR (1 << 28) /* er, c */
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/nrf52832-nimble/
H A Dproject.uvprojx48 <InvalidFlash>1</InvalidFlash>
52 <CreateExecutable>1</CreateExecutable>
54 <CreateHexFile>1</CreateHexFile>
55 <DebugInformation>1</DebugInformation>
56 <BrowseInformation>1</BrowseInformation>
58 <HexFormatSelection>1</HexFormatSelection>
82 <RunUserProg1>1</RunUserProg1>
100 <IncludeInBuild>1</IncludeInBuild>
108 <ComprImg>1</ComprImg>
122 <HexSelection>1</HexSelection>
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/nrf52832-nimble/rt-thread/libcpu/arm/s3c24x0/
H A Dstart_rvds.S108 ;// <0=> 16 <1=> 32 <2=> 64 <3=> 128
116 WT_SETUP EQU 1
143 ;// <o2.0..1> s: Post Divider s Value <0-3>
152 ;// <o3.0..1> s: Post Divider s Value <0-3>
185 ;// <1=> UCLK = UPLL clock / 2
186 ;// <o6.1..2> HDIVN: HCLK Select
188 ;// <1=> HCLK = FCLK / 2
193 ;// <1=> PCLK = HCLK / 2
198 ;// <1=> ARM core runs at HCLK
201 ;// <1=> If HDIVN = 2 in CLKDIVN then HCLK = FCLK / 8
[all …]
/nrf52832-nimble/rt-thread/components/net/lwip-2.1.0/src/
H A Dlwipopts.h6 #define ERRNO 1
8 #define LWIP_SOCKET_SELECT 1
9 #define LWIP_SOCKET_POLL 1
11 #define LWIP_IPV4 1
14 #define LWIP_IPV6 1
20 #define LWIP_SOCKET 1
21 #define LWIP_NETCONN 1
24 #define LWIP_IGMP 1
30 #define LWIP_ICMP 1
36 #define LWIP_SNMP 1
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/nrf52832-nimble/packages/NimBLE-latest/porting/examples/linux/include/syscfg/
H A Dsyscfg.h26 #define MYNEWT_VAL_BSP_NRF52840 (1)
30 #define MYNEWT_VAL_TIMER_0 (1)
50 #define MYNEWT_VAL_TIMER_5 (1)
54 #define MYNEWT_VAL_UART_0 (1)
78 #define MYNEWT_VAL_UART_1_PIN_RX (-1)
82 #define MYNEWT_VAL_UART_1_PIN_TX (-1)
91 #define MYNEWT_VAL_BLE_PHY_DBG_TIME_ADDRESS_END_PIN (-1)
95 #define MYNEWT_VAL_BLE_PHY_DBG_TIME_TXRXEN_READY_PIN (-1)
99 #define MYNEWT_VAL_BLE_PHY_DBG_TIME_WFR_PIN (-1)
113 #define MYNEWT_VAL_MCU_DCDC_ENABLED (1)
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/nrf52832-nimble/rt-thread/tools/kconfig-frontends/libs/parser/
H A Dlconf.c28 #define YY_FLEX_SUBMINOR_VERSION 1
56 #define __STDC_LIMIT_MACROS 1
79 #define INT16_MIN (-32767-1)
82 #define INT32_MIN (-2147483647-1)
130 #define BEGIN (yy_start) = 1 + 2 *
136 #define YY_START (((yy_start) - 1) / 2)
140 #define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1)
179 #define EOB_ACT_END_OF_FILE 1
250 #define YY_BUFFER_NORMAL 1
349 #define zconfwrap() (/*CONSTCOND*/1)
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