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35 #define SLCDC_CFG_DWIDTH_16BIT (1 << SLCDC_CFG_DWIDTH_BIT)
44 #define SLCDC_CFG_CWIDTH_8BIT (1 << SLCDC_CFG_CWIDTH_BIT)
48 #define SLCDC_CFG_CS_ACTIVE_HIGH (1 << 4)
50 #define SLCDC_CFG_RS_CMD_HIGH (1 << 3)
51 #define SLCDC_CFG_CLK_ACTIVE_FALLING (0 << 1)
52 #define SLCDC_CFG_CLK_ACTIVE_RISING (1 << 1)
54 #define SLCDC_CFG_TYPE_SERIAL (1 << 0)
60 #define SLCDC_NEW_CFG_DWIDTH_9BIT (1 << SLCDC_NEW_CFG_DWIDTH_BIT)
64 #define SLCDC_NEW_CFG_6800_MD (1 << 11)
65 #define SLCDC_NEW_CFG_CMD_9BIT (1 << 10) /* only use in old slcd */
70 #define SLCDC_NEW_CFG_DTIME_TWICE (1 << SLCDC_NEW_CFG_DTIME_BIT)
73 #define SLCDC_NEW_CFG_CS_LOW_IDLE (1 << 5)
75 #define SLCDC_NEW_CFG_RS_CMD_HIGH (1 << 4)
77 #define SLCDC_NEW_CFG_CLK_ACTIVE_RISING (1 << 3)
79 #define SLCDC_NEW_CFG_DTYPE_SERIAL (1 << 2)
80 #define SLCDC_NEW_CFG_CTYPE_PARALLEL (0 << 1)
81 #define SLCDC_NEW_CFG_CTYPE_SERIAL (1 << 1)
82 #define SLCDC_NEW_CFG_FMT_CONV_EN (1 << 0)
85 #define SLCDC_CTRL_TE_INV (1 << 9)
86 #define SLCDC_CTRL_NOT_USE_TE (1 << 8)
87 #define SLCDC_CTRL_DCSI_SEL (1 << 7)
88 #define SLCDC_CTRL_MIPI_MODE (1 << 6)
89 #define SLCDC_CTRL_NEW_MODE (1 << 5)
90 #define SLCDC_CTRL_FAST_MODE (1 << 4)
91 #define SLCDC_CTRL_GATE_MASK (1 << 3)
92 #define SLCDC_CTRL_DMA_MODE (1 << 2)
93 #define SLCDC_CTRL_DMA_START (1 << 1)
94 #define SLCDC_CTRL_DMA_EN (1 << 0)
97 #define SLCDC_STATE_BUSY (1 << 0)
101 #define SLCDC_DATA_RS_COMMAND (1 << 30)
167 #define LCDC_CFG_TVEPEH (1 << 30)
168 #define LCDC_CFG_NEWDES (1 << 28)
169 #define LCDC_CFG_PALBP (1 << 27)
170 #define LCDC_CFG_TVEN (1 << 26)
171 #define LCDC_CFG_RECOVER (1 << 25)
172 #define LCDC_CFG_PSM (1 << 23)
173 #define LCDC_CFG_CLSM (1 << 22)
174 #define LCDC_CFG_SPLM (1 << 21)
175 #define LCDC_CFG_REVM (1 << 20)
176 #define LCDC_CFG_HSYNM (1 << 19)
177 #define LCDC_CFG_PCLKM (1 << 18)
178 #define LCDC_CFG_INVDAT (1 << 17)
179 #define LCDC_CFG_SYNDIR_IN (1 << 16)
180 #define LCDC_CFG_PSP (1 << 15)
181 #define LCDC_CFG_CLSP (1 << 14)
182 #define LCDC_CFG_SPLP (1 << 13)
183 #define LCDC_CFG_REVP (1 << 12)
184 #define LCDC_CFG_HSP (1 << 11)
185 #define LCDC_CFG_PCP (1 << 10)
186 #define LCDC_CFG_DEP (1 << 9)
187 #define LCDC_CFG_VSP (1 << 8)
188 #define LCDC_CFG_MODE_TFT_18BIT (1 << 7)
190 #define LCDC_CFG_MODE_TFT_24BIT (1 << 6)
194 #define LCDC_CFG_MODE_SPECIAL_TFT_1 (1 << LCDC_CFG_MODE_BIT)
202 #define LCDC_CTRL_PINMD (1 << 31)
206 #define LCDC_CTRL_BST_8 (1 << LCDC_CTRL_BST_BIT)
211 #define LCDC_CTRL_RGB555 (1 << 27)
212 #define LCDC_CTRL_OFUP (1 << 26)
215 #define LCDC_CTRL_DACTE (1 << 14)
216 #define LCDC_CTRL_EOFM (1 << 13)
217 #define LCDC_CTRL_SOFM (1 << 12)
218 #define LCDC_CTRL_OFUM (1 << 11)
219 #define LCDC_CTRL_IFUM0 (1 << 10)
220 #define LCDC_CTRL_IFUM1 (1 << 9)
221 #define LCDC_CTRL_LDDM (1 << 8)
222 #define LCDC_CTRL_QDM (1 << 7)
223 #define LCDC_CTRL_BEDN (1 << 6)
224 #define LCDC_CTRL_PEDN (1 << 5)
225 #define LCDC_CTRL_DIS (1 << 4)
226 #define LCDC_CTRL_ENA (1 << 3)
230 #define LCDC_CTRL_BPP_2 (1 << LCDC_CTRL_BPP_BIT)
238 #define LCDC_STATE_QD (1 << 7)
239 #define LCDC_STATE_EOF (1 << 5)
240 #define LCDC_STATE_SOF (1 << 4)
241 #define LCDC_STATE_OFU (1 << 3)
242 #define LCDC_STATE_IFU0 (1 << 2)
243 #define LCDC_STATE_IFU1 (1 << 1)
244 #define LCDC_STATE_LDD (1 << 0)
246 #define LCDC_OSDC_PREMULTI1 (1 << 23)
250 #define LCDC_OSDC_COEF_SLE1_1 (1 << LCDC_OSDC_COEF_SLE1_BIT)
253 #define LCDC_OSDC_PREMULTI0 (1 << 20)
257 #define LCDC_OSDC_COEF_SLE0_1 (1 << LCDC_OSDC_COEF_SLE0_BIT)
260 #define LCDC_OSDC_ALPHAMD1 (1 << 17)
261 #define LCDC_OSDC_SOFM1 (1 << 15)
262 #define LCDC_OSDC_EOFM1 (1 << 14)
263 #define LCDC_OSDC_SOFM0 (1 << 11)
264 #define LCDC_OSDC_EOFM0 (1 << 10)
265 #define LCDC_OSDC_DENDM (1 << 9)
266 #define LCDC_OSDC_F1EN (1 << 4)
267 #define LCDC_OSDC_F0EN (1 << 3)
268 #define LCDC_OSDC_ALPHAEN (1 << 2)
269 #define LCDC_OSDC_ALPHAMD0 (1 << 1)
270 #define LCDC_OSDC_OSDEN (1 << 0)
272 #define LCDC_OSDCTRL_IPU_CLKEN (1 << 15)
274 #define LCDC_OSDCTRL_RGB0_RGB555 (1 << 5)
276 #define LCDC_OSDCTRL_RGB1_RGB555 (1 << 4)
284 #define LCDC_OSDS_SOF1 (1 << 15)
285 #define LCDC_OSDS_EOF1 (1 << 14)
286 #define LCDC_OSDS_SOF0 (1 << 11)
287 #define LCDC_OSDS_EOF0 (1 << 10)
288 #define LCDC_OSDS_DEND (1 << 8)
289 /* Background 0 or Background 1 Color Register */
296 /* Foreground 0 or Foreground 1 Color Key Register */
297 #define LCDC_KEY_KEYEN (1 << 31)
298 #define LCDC_KEY_KEYMD (1 << 30)
312 #define LCDC_IPUR_IPUREN (1 << 31)
315 #define LCDC_RGBC_RGBDM (1 << 15)
316 #define LCDC_RGBC_DMM (1 << 14)
317 #define LCDC_RGBC_RGBFMT (1 << 7)
321 #define LCDC_RGBC_ODD_RBG (1 << LCDC_RGBC_ODDRGB_BIT)
329 #define LCDC_RGBC_EVEN_RBG 1
359 /* Foreground 0 or Foreground 1 XY Position Register */
364 /* Foreground 0 or Foreground 1 Size Register */
387 /* DMA Command 0 or 1 Register */
388 #define LCDC_CMD_SOFINT (1 << 31)
389 #define LCDC_CMD_EOFINT (1 << 30)
390 #define LCDC_CMD_CMD (1 << 29)
391 #define LCDC_CMD_PAL (1 << 28)
392 #define LCDC_CMD_COMPEN (1 << 27)
393 #define LCDC_CMD_FRM_EN (1 << 26)
394 #define LCDC_CMD_FIELD_SEL (1 << 25)
395 #define LCDC_CMD_16X16BLOCK (1 << 24)
398 /* DMA Offsize Register 0,1 */
401 /* DMA Page Width Register 0,1 */
404 /* DMA Command Counter Register 0,1 */
407 #define LCDC_CPOS_ALPHAMD1 (1 << 31)
409 #define LCDC_CPOS_RGB_RGB555 (1 << 30)
416 #define LCDC_CPOS_PREMULTI (1 << 26)
420 #define LCDC_CPOS_COEF_SLE_1 (1 << LCDC_CPOS_COEF_SLE_BIT)
427 /* Foreground 0,1 Size Register */
435 #define LCDC_PCFG_LCDC_PRI_MD (1 << 31)
439 #define LCDC_PCFG_HP_BST_8 (1 << LCDC_PCFG_HP_BST_BIT)
452 #define LCDC_DUAL_CTRL_IPU_WR_SEL (1 << 8)
453 #define LCDC_DUAL_CTRL_TFT_SEL (1 << 6)
454 #define LCDC_DUAL_CTRL_PRI_IPU_EN (1 << 5)