| /XiangShan/src/main/scala/xiangshan/frontend/icache/ |
| H A D | FIFO.scala | 44 val ptr = Wire(new FIFOPtr) constant
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| H A D | WayLookup.scala | 76 val ptr = Wire(new WayLookupPtr) constant
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| /XiangShan/src/main/scala/xiangshan/mem/lsqueue/ |
| H A D | StoreQueue.scala | 46 val ptr = Wire(new SqPtr) constant
1133 val ptr = rdataPtrExt(i).value constant
1294 val ptr = dataBuffer.io.deq(i).bits.sqPtr.value constant
1305 val ptr = rdataPtrExt(i).value constant
1337 val ptr = rdataPtrExt(i).value constant
1364 val ptr = dataBuffer.io.enq(i).bits.sqPtr.value constant
1385 val ptr = deqPtrExt(i).value constant
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| H A D | FreeList.scala | 51 val ptr = Wire(new FreeListPtr) constant
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| H A D | LoadQueue.scala | 44 val ptr = Wire(new LqPtr) constant
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| /XiangShan/src/main/scala/xiangshan/backend/rename/freelist/ |
| H A D | BaseFreeList.scala | 53 val ptr = Wire(new FreeListPtr) constant
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| /XiangShan/src/main/scala/xiangshan/backend/trace/ |
| H A D | TraceBuffer.scala | 106 val ptr = Wire(new TracePtr) constant
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| /XiangShan/src/main/scala/xiangshan/backend/rob/ |
| H A D | VTypeBuffer.scala | 20 val ptr = Wire(new VTypeBufferPtr(p(XSCoreParamsKey).VTypeBufferSize)) constant
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| H A D | Rab.scala | 21 val ptr = Wire(new RenameBufferPtr(p(XSCoreParamsKey).RabSize)) constant
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| H A D | RobBundles.scala | 212 val ptr = Wire(new RobPtr) constant
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| H A D | Rob.scala | 1501 val ptr = deqPtrVec(i).value constant
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| /XiangShan/src/main/scala/xiangshan/mem/sbuffer/ |
| H A D | StorePrefetchBursts.scala | 219 val ptr = Wire(new SerializerPtr) constant
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| /XiangShan/src/main/scala/xiangshan/mem/prefetch/ |
| H A D | FDP.scala | 76 val ptr = Wire(new Ptr) constant
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| H A D | L1PrefetchComponent.scala | 166 val ptr = Wire(new Ptr) constant
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| H A D | SMSPrefetcher.scala | 1133 val ptr = Wire(new Ptr) constant
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| /XiangShan/src/main/scala/xiangshan/cache/mmu/ |
| H A D | BitmapCheck.scala | 193 val ptr = enq_ptr_reg constant
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| H A D | PageTableWalker.scala | 881 val ptr = Mux(hptw_need_addr_check, hptw_resp_ptr_reg, enq_ptr_reg); constant
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| /XiangShan/src/main/scala/xiangshan/frontend/ |
| H A D | newRAS.scala | 48 val ptr = Wire(new RASPtr) constant
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| H A D | NewFtq.scala | 59 val ptr = Wire(new FtqPtr) constant
188 val ptr = Output(new FtqPtr) constant
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| H A D | BPU.scala | 1004 val ptr: CGHPtr = commitGHistPtr - i.asUInt constant
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| H A D | FrontendBundle.scala | 305 val ptr = Wire(new CGHPtr) constant
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| /XiangShan/src/main/scala/xiangshan/mem/vector/ |
| H A D | VSegmentUnit.scala | 86 val ptr = Wire(new VSegUPtr) constant
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