feat(RAS): change the stall mechanism upon return stack overflow to dynamically disable the return stack. (#4317)

1. Predictor pipeline stalls exhibit poor fault tolerance.
2. Speculative queue over

feat(RAS): change the stall mechanism upon return stack overflow to dynamically disable the return stack. (#4317)

1. Predictor pipeline stalls exhibit poor fault tolerance.
2. Speculative queue overflow (requiring 32 uncommitted call/return
instructions) is an extreme scenario where disabling return stack
prediction incurs negligible performance impact.
3. Queue overflow often indicates recursion. In such cases, using
top-of-stack data (static return addresses) may outperform IT-TAGE
predictions despite disabled return stack.

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fix(RAS): adjust the signal judgment of isCall and isRet during redirection (#4232)

If the instruction is invalid, the corresponding pre-decoding
information should be 0. Because when the IFU module

fix(RAS): adjust the signal judgment of isCall and isRet during redirection (#4232)

If the instruction is invalid, the corresponding pre-decoding
information should be 0. Because when the IFU module detects a
prediction error, the misOffset issued may not correspond to a valid
instruction.

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feat(XSLog): move all XSLog outside WhenContext for collection

As data in WhenContext is not acessible in another module. To support
XSLog collection, we move all XSLog and related signal outside
Wh

feat(XSLog): move all XSLog outside WhenContext for collection

As data in WhenContext is not acessible in another module. To support
XSLog collection, we move all XSLog and related signal outside
WhenContext. For example, when(cond1){XSDebug(cond2, pable)} to
XSDebug(cond1 && cond2, pable)

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fix(RAS): bos pointer needs to be updated when the instruction is committed (#4048)

During reset, the update registers related to the return stack are not
reset. At the same time, the update of the

fix(RAS): bos pointer needs to be updated when the instruction is committed (#4048)

During reset, the update registers related to the return stack are not
reset. At the same time, the update of the update register value is
subject to some signal restrictions, resulting in the BOS pointer being
updated incorrectly with the old value.

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power(bpu): optimize CGE of bpu/predictors_io_update (#3579)

Bpu: Optimize CGE of bpu/predictors_io_update by moving update regs into
predictors, except for the update PC

---------

Co-authore

power(bpu): optimize CGE of bpu/predictors_io_update (#3579)

Bpu: Optimize CGE of bpu/predictors_io_update by moving update regs into
predictors, except for the update PC

---------

Co-authored-by: pengxiao <[email protected]>

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docs: add acknowledgements (#3861)

style(frontend): manually wrap some line (#3791)

RAS: add assertions to facilitate debugging (#3653)

style(Frontend): use scalafmt formatting frontend (#3370)

Format frontend according to the scalafmt file drafted in #3061.

fix(BPU): adjust s3 target when fallThroughErr signal is high (#3636)

1. adjust S3 target address selection.

fix(BPU): adjust fallThroughErr signal usage strategy (#3627)

fix(RAS): correct the Call and Ret signals during redirection, and modify the blocking mechanism of RAS. (#3514)

1. RAS: relax the conditions for unblocking the speculative queue after
it has been

fix(RAS): correct the Call and Ret signals during redirection, and modify the blocking mechanism of RAS. (#3514)

1. RAS: relax the conditions for unblocking the speculative queue after
it has been blocked
2. FTQ: correct the pre-decode information sent to the RAS

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RAS: Block BPU prediction when the speculative queue is about to overflow (#3389)

RAS: Restore the speculative stack overflow judgment code

Overflow handling is not perfect, and a single overflow-related
modification may cause negative effects. Restore the original overflow
jud

RAS: Restore the speculative stack overflow judgment code

Overflow handling is not perfect, and a single overflow-related
modification may cause negative effects. Restore the original overflow
judgment logic.

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build: purge chisel 3 and add deprecation check (#3250)

RAS: modify the NOS pointer write value during redirection (#3237)

Fix NOS update error when redirecting ret instruction, and correct the
bit width of sctr.

RAS: Fixed the bottom update issue of the speculative stack (#3194)

Modify the update strategy of the BOS pointer, because the TOSW+1 item
in the speculation stack is not committed during commit pu

RAS: Fixed the bottom update issue of the speculative stack (#3194)

Modify the update strategy of the BOS pointer, because the TOSW+1 item
in the speculation stack is not committed during commit push.

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ftq: cut ftq area (#2806)

ftb_entry_mem:
full ftb_entry: reg->sram;
origin reg: dlt valid/lower/tarStat/pftAddr/carry/last_may_be_rvi_call/always_taken

ftq_meta_1r_sram:
dlt Tage_SC: sc

ftq: cut ftq area (#2806)

ftb_entry_mem:
full ftb_entry: reg->sram;
origin reg: dlt valid/lower/tarStat/pftAddr/carry/last_may_be_rvi_call/always_taken

ftq_meta_1r_sram:
dlt Tage_SC: scMeta-tageTakens/scUsed/providerResps-unconf/altDiffers/takens;
dlt ITTage: altDiffers/taken
dlt uFTB: pred_way
dlt RAS: sctr/TOSR/NOS

ftq_redirect_sram->ftq_redirect_mem

Co-authored-by: chenguokai <[email protected]>

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BPU: add clock gating (#2733)

Co-authored-by: Liang Sen <[email protected]>

RAS: fix counter size (#2399)

* RAS: fix counter size

* RAS: reduce counter width

Bump rocket-chip (#2353)

chore: remove deprecated brackets, APIs, etc. (#2321)

New RAS design (#2292)

By introducing non-volatile queue for specutive states, RAS avoids entry pollution

Co-authored-by: Easton Man <[email protected]>