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/nrf52832-nimble/packages/NimBLE-latest/nimble/host/mesh/src/
H A Dtransport.c61 #define SEG_RETRANSMIT_TIMEOUT(tx) (K_MSEC(400) + 50 * (tx)->ttl) argument
106 static int send_unseg(struct bt_mesh_net_tx *tx, struct os_mbuf *sdu, in send_unseg() argument
112 tx->src, tx->ctx->addr, tx->ctx->app_idx, sdu->om_len); in send_unseg()
114 buf = bt_mesh_adv_create(BT_MESH_ADV_DATA, tx->xmit, BUF_TIMEOUT); in send_unseg()
122 if (tx->ctx->app_idx == BT_MESH_KEY_DEV) { in send_unseg()
125 net_buf_add_u8(buf, UNSEG_HDR(1, tx->aid)); in send_unseg()
131 if (bt_mesh_friend_enqueue_tx(tx, BT_MESH_FRIEND_PDU_SINGLE, in send_unseg()
133 BT_MESH_ADDR_IS_UNICAST(tx->ctx->addr)) { in send_unseg()
142 return bt_mesh_net_send(tx, buf, cb, cb_data); in send_unseg()
158 static void seg_tx_reset(struct seg_tx *tx) in seg_tx_reset() argument
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H A Dnet.c790 int bt_mesh_net_encode(struct bt_mesh_net_tx *tx, struct os_mbuf *buf, in bt_mesh_net_encode() argument
793 const bool ctl = (tx->ctx->app_idx == BT_MESH_KEY_UNUSED); in bt_mesh_net_encode()
809 tx->src, tx->ctx->addr, ctl, bt_mesh.seq); in bt_mesh_net_encode()
811 net_buf_simple_push_be16(buf, tx->ctx->addr); in bt_mesh_net_encode()
812 net_buf_simple_push_be16(buf, tx->src); in bt_mesh_net_encode()
821 net_buf_simple_push_u8(buf, tx->ctx->send_ttl | 0x80); in bt_mesh_net_encode()
823 net_buf_simple_push_u8(buf, tx->ctx->send_ttl); in bt_mesh_net_encode()
826 if (IS_ENABLED(CONFIG_BT_MESH_LOW_POWER) && tx->friend_cred) { in bt_mesh_net_encode()
827 if (friend_cred_get(tx->sub, BT_MESH_ADDR_UNASSIGNED, in bt_mesh_net_encode()
831 tx->friend_cred = 0; in bt_mesh_net_encode()
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H A Daccess.c162 struct bt_mesh_net_tx tx = { in publish_retransmit() local
176 tx.sub = bt_mesh_subnet_get(key->net_idx); in publish_retransmit()
186 err = bt_mesh_trans_send(&tx, sdu, &pub_sent_cb, mod); in publish_retransmit()
615 struct bt_mesh_net_tx *tx, bool implicit_bind, in model_send() argument
619 BT_DBG("net_idx 0x%04x app_idx 0x%04x dst 0x%04x", tx->ctx->net_idx, in model_send()
620 tx->ctx->app_idx, tx->ctx->addr); in model_send()
638 if (!implicit_bind && !model_has_key(model, tx->ctx->app_idx)) { in model_send()
639 BT_ERR("Model not bound to AppKey 0x%04x", tx->ctx->app_idx); in model_send()
643 return bt_mesh_trans_send(tx, msg, cb, cb_data); in model_send()
651 struct bt_mesh_net_tx tx = { in bt_mesh_model_send() local
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H A Dprov.c157 } tx; member
190 if (!link.tx.buf[0]) { in buf_sent()
194 k_delayed_work_submit(&link.tx.retransmit, RETRANSMIT_TIMEOUT); in buf_sent()
205 for (i = 0; i < ARRAY_SIZE(link.tx.buf); i++) { in free_segments()
206 struct os_mbuf *buf = link.tx.buf[i]; in free_segments()
212 link.tx.buf[i] = NULL; in free_segments()
223 k_delayed_work_cancel(&link.tx.retransmit); in prov_clear_tx()
239 memset(&link, 0, offsetof(struct prov_link, tx.retransmit)); in reset_link()
321 link.tx.start = k_uptime_get(); in send_reliable()
323 for (i = 0; i < ARRAY_SIZE(link.tx.buf); i++) { in send_reliable()
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H A Dfriend.c242 struct bt_mesh_net_tx tx = { in bt_mesh_friend_clear() local
278 tx.ctx->send_ttl = BT_MESH_TTL_MAX; in bt_mesh_friend_clear()
283 bt_mesh_ctl_send(&tx, TRANS_CTL_OP_FRIEND_CLEAR_CFM, &cfm, in bt_mesh_friend_clear()
359 * the normal TX IVI (which may be different) since the transport in create_friend_pdu()
649 struct bt_mesh_net_tx tx = { in send_friend_clear() local
662 bt_mesh_ctl_send(&tx, TRANS_CTL_OP_FRIEND_CLEAR, &req, in send_friend_clear()
1160 struct bt_mesh_net_tx *tx, in friend_lpn_enqueue_tx() argument
1171 friend_purge_old_ack(frnd, seq_auth, tx->src); in friend_lpn_enqueue_tx()
1174 info.src = tx->src; in friend_lpn_enqueue_tx()
1175 info.dst = tx->ctx->addr; in friend_lpn_enqueue_tx()
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H A Dlpn.c180 struct bt_mesh_net_tx tx = { in send_friend_clear() local
187 .lpn_addr = sys_cpu_to_be16(tx.src), in send_friend_clear()
193 return bt_mesh_ctl_send(&tx, TRANS_CTL_OP_FRIEND_CLEAR, &req, in send_friend_clear()
289 struct bt_mesh_net_tx tx = { in send_friend_req() local
306 return bt_mesh_ctl_send(&tx, TRANS_CTL_OP_FRIEND_REQ, &req, in send_friend_req()
355 struct bt_mesh_net_tx tx = { in send_friend_poll() local
376 err = bt_mesh_ctl_send(&tx, TRANS_CTL_OP_FRIEND_POLL, &fsn, 1, in send_friend_poll()
637 struct bt_mesh_net_tx tx = { in sub_update() local
688 if (bt_mesh_ctl_send(&tx, op, &req, 1 + g * 2, NULL, in sub_update()
/nrf52832-nimble/packages/NimBLE-latest/nimble/host/src/
H A Dble_l2cap_coc.c319 struct ble_l2cap_coc_endpoint *tx; in ble_l2cap_coc_continue_tx() local
328 tx = &chan->coc_tx; in ble_l2cap_coc_continue_tx()
329 if (!tx->sdu) { in ble_l2cap_coc_continue_tx()
333 while (tx->credits) { in ble_l2cap_coc_continue_tx()
336 BLE_HS_LOG(DEBUG, "Available credits %d\n", tx->credits); in ble_l2cap_coc_continue_tx()
339 left_to_send = OS_MBUF_PKTLEN(tx->sdu) - tx->data_offset; in ble_l2cap_coc_continue_tx()
341 if (tx->data_offset == 0) { in ble_l2cap_coc_continue_tx()
357 if (tx->data_offset == 0) { in ble_l2cap_coc_continue_tx()
359 uint16_t l = htole16(OS_MBUF_PKTLEN(tx->sdu)); in ble_l2cap_coc_continue_tx()
361 BLE_HS_LOG(DEBUG, "Sending SDU len=%d\n", OS_MBUF_PKTLEN(tx->sdu)); in ble_l2cap_coc_continue_tx()
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/nrf52832-nimble/rt-thread/libcpu/ppc/ppc405/include/asm/
H A Dppc405.h556 #define maltxcasr (MAL_DCR_BASE+0x04) /* TX Channel active reg (set)*/
557 #define maltxcarr (MAL_DCR_BASE+0x05) /* TX Channel active reg (Reset) */
558 #define maltxeobisr (MAL_DCR_BASE+0x06) /* TX End of buffer int status reg */
559 #define maltxdeir (MAL_DCR_BASE+0x07) /* TX Descr. Error Int reg */
566 #define maltxctp0r (MAL_DCR_BASE+0x20) /* TX 0 Channel table ptr reg */
567 #define maltxctp1r (MAL_DCR_BASE+0x21) /* TX 1 Channel table ptr reg */
568 #define maltxctp2r (MAL_DCR_BASE+0x22) /* TX 2 Channel table ptr reg */
569 #define maltxctp3r (MAL_DCR_BASE+0x23) /* TX 3 Channel table ptr reg */
570 #define maltxctp4r (MAL_DCR_BASE+0x24) /* TX 4 Channel table ptr reg */
571 #define maltxctp5r (MAL_DCR_BASE+0x25) /* TX 5 Channel table ptr reg */
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/nrf52832-nimble/rt-thread/libcpu/arm/s3c24x0/
H A Ds3c24x0.h145 #define USTAT0 (*(volatile unsigned *)0x50000010) //UART 0 Tx/Rx status
156 #define USTAT1 (*(volatile unsigned *)0x50004010) //UART 1 Tx/Rx status
167 #define USTAT2 (*(volatile unsigned *)0x50008010) //UART 2 Tx/Rx status
257 #define EP1_DMA_UNIT (*(volatile unsigned char *)0x52000207) //EP1 DMA Tx unit counter
258 #define EP1_DMA_FIFO (*(volatile unsigned char *)0x5200020b) //EP1 DMA Tx FIFO counter
259 #define EP1_DMA_TTC_L (*(volatile unsigned char *)0x5200020f) //EP1 DMA total Tx counter
263 #define EP2_DMA_UNIT (*(volatile unsigned char *)0x5200021f) //EP2 DMA Tx unit counter
264 #define EP2_DMA_FIFO (*(volatile unsigned char *)0x52000223) //EP2 DMA Tx FIFO counter
265 #define EP2_DMA_TTC_L (*(volatile unsigned char *)0x52000227) //EP2 DMA total Tx counter
269 #define EP3_DMA_UNIT (*(volatile unsigned char *)0x52000247) //EP3 DMA Tx unit counter
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H A Dserial.h18 #define USTAT_TXB_EMPTY 0x02 /* tx buffer empty */
58 /* tx structure */
/nrf52832-nimble/rt-thread/components/drivers/spi/
H A Denc28j60.c266 // TX start in enc28j60_init()
272 // TX end in enc28j60_init()
413 NET_DEBUG("[Tx] no empty buffer!\r\n"); in enc28j60_tx()
425 NET_DEBUG("[Tx] wait empty buffer done!\r\n"); in enc28j60_tx()
478 NET_DEBUG("[Tx] stop, restart!\r\n"); in enc28j60_tx()
479 // TX start in enc28j60_tx()
482 // TX end in enc28j60_tx()
490 NET_DEBUG("[Tx] busy, add to chain!\r\n"); in enc28j60_tx()
585 NET_DEBUG("[tx isr] Tx chain not empty, continue send the next pkt!\r\n"); in enc28j60_rx()
586 // TX start in enc28j60_rx()
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/nrf52832-nimble/packages/NimBLE-latest/ext/tinycrypt/src/
H A Decc_dsa.c202 uECC_word_t tx[NUM_ECC_WORDS]; in uECC_verify() local
246 uECC_vli_set(tx, curve->G, num_words); in uECC_verify()
248 uECC_vli_modSub(z, sum, tx, curve->p, num_words); /* z = x2 - x1 */ in uECC_verify()
249 XYcZ_add(tx, ty, sum, sum + num_words, curve); in uECC_verify()
275 uECC_vli_set(tx, point, num_words); in uECC_verify()
277 apply_z(tx, ty, z, curve); in uECC_verify()
278 uECC_vli_modSub(tz, rx, tx, curve->p, num_words); /* Z = x2 - x1 */ in uECC_verify()
279 XYcZ_add(tx, ty, rx, ry, curve); in uECC_verify()
/nrf52832-nimble/nordic/nrfx/drivers/include/
H A Dnrfx_nfct.h136 * @brief NFCT driver RX/TX buffer descriptor.
140 uint32_t data_size; ///< RX/TX buffer size.
141 uint8_t const * p_data; ///< RX/TX buffer.
158 nrfx_nfct_data_desc_t tx_data; ///< TX buffer.
178 …nrfx_nfct_evt_tx_framestart_t tx_framestart; ///< Start of the TX frame data. Filled when nrfx_nfc…
195 …uint32_t rxtx_int_mask; ///< Mask for enabling RX/TX events. Indicate which events must…
249 * @param[in] p_tx_data Pointer to the TX buffer.
253 * @retval NRFX_ERROR_INVALID_LENGTH If the TX buffer size is invalid.
H A Dnrfx_twim.h107 #define NRFX_TWIM_FLAG_TX_POSTINC (1UL << 0) /**< TX buffer address incremented after tran…
112 #define NRFX_TWIM_FLAG_TX_NO_STOP (1UL << 5) /**< Flag indicating that the TX transfer wil…
129 NRFX_TWIM_XFER_TX, ///< TX transfer.
131 NRFX_TWIM_XFER_TXRX, ///< TX transfer followed by RX transfer with repeated start.
132 NRFX_TWIM_XFER_TXTX ///< TX transfer followed by TX transfer with repeated start.
149 /**@brief Macro for setting the TX transfer descriptor. */
327 * - @ref NRFX_TWIM_FLAG_TX_NO_STOP<span></span>: No stop condition after TX transfer.
378 * @return Start task address (TX or RX) depending on the value of xfer_type.
H A Dnrfx_twi.h102 #define NRFX_TWI_FLAG_TX_NO_STOP (1UL << 5) /**< Flag indicating that the TX transfer will…
119 NRFX_TWI_XFER_TX, ///< TX transfer.
121 NRFX_TWI_XFER_TXRX, ///< TX transfer followed by RX transfer with repeated start.
122 NRFX_TWI_XFER_TXTX ///< TX transfer followed by TX transfer with repeated start.
139 /**@brief Macro for setting the TX transfer descriptor. */
297 * - @ref NRFX_TWI_FLAG_TX_NO_STOP<span></span>: No stop condition after TX transfer.
H A Dnrfx_spi.h107 … /**< This character is used when all bytes from the TX buffer are sent,
135 uint8_t const * p_tx_buffer; ///< Pointer to TX buffer.
136 size_t tx_length; ///< TX buffer length.
155 * @brief Macro for setting duplex TX RX transfer.
161 * @brief Macro for setting TX transfer.
H A Dnrfx_spim.h108 /**< This character is used when all bytes from the TX buffer are sent,
160 #define NRFX_SPIM_FLAG_TX_POSTINC (1UL << 0) /**< TX buffer address incremented after tran…
171 uint8_t const * p_tx_buffer; ///< Pointer to TX buffer.
172 size_t tx_length; ///< TX buffer length.
191 * @brief Macro for setting duplex TX RX transfer.
197 * @brief Macro for setting TX transfer.
/nrf52832-nimble/packages/NimBLE-latest/nimble/drivers/nrf52/src/
H A Dble_phy.c84 /* Maximum tx power */
154 /* delay between EVENTS_READY and start of tx */
471 * Called when we want to wait if the radio is in either the rx or tx
498 ble_phy_set_start_time(uint32_t cputime, uint8_t rem_usecs, bool tx) in ble_phy_set_start_time() argument
506 * We need to adjust start time to include radio ramp-up and TX pipeline in ble_phy_set_start_time()
507 * delay (the latter only if applicable, so only for TX). in ble_phy_set_start_time()
509 * Radio ramp-up time is 40 usecs and TX delay is 3 or 5 usecs depending on in ble_phy_set_start_time()
516 if (tx) { in ble_phy_set_start_time()
632 * @param tx_phy_mode phy mode for last TX (only valid for TX->RX)
644 /* RX shall start exactly T_IFS after TX end captured in CC[2] */ in ble_phy_wfr_enable()
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/nrf52832-nimble/packages/NimBLE-latest/nimble/controller/include/controller/
H A Dble_ll_sched.h36 * Note: worst case time to tx adv, rx scan req and send scan rsp is 1228 usecs.
57 * tx/rx should occur, in ticks.
64 * 2120 usecs for tx/rx and 150 for IFS = 4540 usecs.
124 * remainder: # of usecs from offset till tx/rx should occur
125 * txrx_offset: Number of ticks from start time until tx/rx should occur.
/nrf52832-nimble/rt-thread/components/drivers/audio/
H A Daudio.c41 AUDIO_DBG("TX queue is empty\n"); in _audio_send_replay_frame()
122 /* initialize the Rx/Tx structure according to open flag */ in _audio_dev_open()
259 //push a new frame to tx queue in _audio_dev_write()
265 AUDIO_DBG("TX frame queue push error\n"); in _audio_dev_write()
271 //check tx state... in _audio_dev_write()
373 //resume tx frame... in _audio_dev_control()
521 AUDIO_DBG("audio tx complete ptr=%x...\n",(rt_uint32_t)pbuf); in rt_audio_tx_complete()
/nrf52832-nimble/packages/NimBLE-latest/nimble/host/services/tps/src/
H A Dble_svc_tps.c42 /*** Service: Tx Power Service. */
46 /*** Characteristic: Tx Power Level. */
61 * Simple read access callback for the tx power level
/nrf52832-nimble/rt-thread/libcpu/blackfin/bf53x/
H A Dserial.h8 #define USTAT_TXB_EMPTY 0x02 /* tx buffer empty */
48 /* tx structure */
/nrf52832-nimble/rt-thread/libcpu/avr32/uc3/
H A Dserial.h13 * 2010-03-29 Bernard remove interrupt tx and DMA rx mode.
27 /* data node for Tx Mode */
/nrf52832-nimble/rt-thread/libcpu/arm/sep4020/
H A Dserial.h19 #define USTAT_TXB_EMPTY 0x40 /* tx buffer empty */
77 /* tx structure */
/nrf52832-nimble/nordic/nrfx/hal/
H A Dnrf_nfct.h81 …, /**< Transmission of data in RAM ended, and EasyDMA ended accessing the TX buffer. */
448 … the last symbol of the last received frame and the start of the transmission of a new TX frame.
459 … the last symbol of the last received frame and the start of the transmission of a new TX frame.
469 … the last symbol of the last received frame and the start of the transmission of a new TX frame.
481 … the last symbol of the last received frame and the start of the transmission of a new TX frame.
504 * @brief Function for getting the pointer to the NFCT RX/TX buffer.
511 * @brief Function for setting the the NFCT RX/TX buffer (address and maximum length).
513 * @note Buffer for the NFC RX/TX data is used by EasyDMA and must be located in RAM.
522 * @brief Function for getting the NFCT RX/TX maximum buffer length.
524 …* @return The configured maximum receive or transmit length in bytes (size of the RX/TX buffer for…
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