1*10465441SEvalZero /* 2*10465441SEvalZero * Copyright (c) 2006-2018, RT-Thread Development Team 3*10465441SEvalZero * 4*10465441SEvalZero * SPDX-License-Identifier: Apache-2.0 5*10465441SEvalZero * 6*10465441SEvalZero * Change Logs: 7*10465441SEvalZero * Date Author Notes 8*10465441SEvalZero * 2006-03-13 Bernard first version 9*10465441SEvalZero * 2009-04-20 yi.qiu modified according bernard's stm32 version 10*10465441SEvalZero * 2010-10-6 wangmeng added sep4020 surpport 11*10465441SEvalZero */ 12*10465441SEvalZero 13*10465441SEvalZero #ifndef __SERIAL_H__ 14*10465441SEvalZero #define __SERIAL_H__ 15*10465441SEvalZero 16*10465441SEvalZero #include <sep4020.h> 17*10465441SEvalZero 18*10465441SEvalZero #define USTAT_RCV_READY 0x01 /* receive data ready */ 19*10465441SEvalZero #define USTAT_TXB_EMPTY 0x40 /* tx buffer empty */ 20*10465441SEvalZero #define BPS 115200 /* serial baudrate */ 21*10465441SEvalZero 22*10465441SEvalZero #define UART_RX_BUFFER_SIZE 64 23*10465441SEvalZero #define UART_TX_BUFFER_SIZE 64 24*10465441SEvalZero 25*10465441SEvalZero /*For sep4020's uart have several secondary function*/ 26*10465441SEvalZero /*we use union to decribe it*/ 27*10465441SEvalZero 28*10465441SEvalZero union dlbl_fifo 29*10465441SEvalZero { 30*10465441SEvalZero rt_uint32_t dlbl; 31*10465441SEvalZero rt_uint32_t rxfifo; 32*10465441SEvalZero rt_uint32_t txfifo; 33*10465441SEvalZero }; 34*10465441SEvalZero 35*10465441SEvalZero union dlbh_ier 36*10465441SEvalZero { 37*10465441SEvalZero rt_uint32_t dlbh; 38*10465441SEvalZero rt_uint32_t ier; 39*10465441SEvalZero }; 40*10465441SEvalZero 41*10465441SEvalZero union iir_fcr 42*10465441SEvalZero { 43*10465441SEvalZero rt_uint32_t iir; 44*10465441SEvalZero rt_uint32_t fcr; 45*10465441SEvalZero }; 46*10465441SEvalZero 47*10465441SEvalZero struct serial_int_rx 48*10465441SEvalZero { 49*10465441SEvalZero rt_uint8_t rx_buffer[UART_RX_BUFFER_SIZE]; 50*10465441SEvalZero rt_uint32_t read_index, save_index; 51*10465441SEvalZero }; 52*10465441SEvalZero 53*10465441SEvalZero struct serial_int_tx 54*10465441SEvalZero { 55*10465441SEvalZero rt_uint8_t tx_buffer[UART_TX_BUFFER_SIZE]; 56*10465441SEvalZero rt_uint32_t write_index, save_index; 57*10465441SEvalZero }; 58*10465441SEvalZero 59*10465441SEvalZero typedef struct uartport 60*10465441SEvalZero { 61*10465441SEvalZero union dlbl_fifo dlbl_fifo; 62*10465441SEvalZero union dlbh_ier dlbh_ier; 63*10465441SEvalZero union iir_fcr iir_fcr; 64*10465441SEvalZero rt_uint32_t lcr; 65*10465441SEvalZero rt_uint32_t mcr; 66*10465441SEvalZero rt_uint32_t lsr; 67*10465441SEvalZero rt_uint32_t msr; 68*10465441SEvalZero }uartport; 69*10465441SEvalZero 70*10465441SEvalZero struct serial_device 71*10465441SEvalZero { 72*10465441SEvalZero uartport* uart_device; 73*10465441SEvalZero 74*10465441SEvalZero /* rx structure */ 75*10465441SEvalZero struct serial_int_rx* int_rx; 76*10465441SEvalZero 77*10465441SEvalZero /* tx structure */ 78*10465441SEvalZero struct serial_int_tx* int_tx; 79*10465441SEvalZero }; 80*10465441SEvalZero 81*10465441SEvalZero rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct serial_device *serial); 82*10465441SEvalZero 83*10465441SEvalZero void rt_hw_serial_isr(rt_device_t device); 84*10465441SEvalZero 85*10465441SEvalZero 86*10465441SEvalZero #endif 87