1*150812a8SEvalZero /* 2*150812a8SEvalZero * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA 3*150812a8SEvalZero * All rights reserved. 4*150812a8SEvalZero * 5*150812a8SEvalZero * Redistribution and use in source and binary forms, with or without 6*150812a8SEvalZero * modification, are permitted provided that the following conditions are met: 7*150812a8SEvalZero * 8*150812a8SEvalZero * 1. Redistributions of source code must retain the above copyright notice, this 9*150812a8SEvalZero * list of conditions and the following disclaimer. 10*150812a8SEvalZero * 11*150812a8SEvalZero * 2. Redistributions in binary form must reproduce the above copyright 12*150812a8SEvalZero * notice, this list of conditions and the following disclaimer in the 13*150812a8SEvalZero * documentation and/or other materials provided with the distribution. 14*150812a8SEvalZero * 15*150812a8SEvalZero * 3. Neither the name of the copyright holder nor the names of its 16*150812a8SEvalZero * contributors may be used to endorse or promote products derived from this 17*150812a8SEvalZero * software without specific prior written permission. 18*150812a8SEvalZero * 19*150812a8SEvalZero * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20*150812a8SEvalZero * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21*150812a8SEvalZero * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22*150812a8SEvalZero * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 23*150812a8SEvalZero * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24*150812a8SEvalZero * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25*150812a8SEvalZero * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26*150812a8SEvalZero * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27*150812a8SEvalZero * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28*150812a8SEvalZero * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29*150812a8SEvalZero * POSSIBILITY OF SUCH DAMAGE. 30*150812a8SEvalZero */ 31*150812a8SEvalZero 32*150812a8SEvalZero #ifndef NRFX_TWI_H__ 33*150812a8SEvalZero #define NRFX_TWI_H__ 34*150812a8SEvalZero 35*150812a8SEvalZero #include <nrfx.h> 36*150812a8SEvalZero #include <hal/nrf_twi.h> 37*150812a8SEvalZero 38*150812a8SEvalZero #ifdef __cplusplus 39*150812a8SEvalZero extern "C" { 40*150812a8SEvalZero #endif 41*150812a8SEvalZero 42*150812a8SEvalZero /** 43*150812a8SEvalZero * @defgroup nrfx_twi TWI driver 44*150812a8SEvalZero * @{ 45*150812a8SEvalZero * @ingroup nrf_twi 46*150812a8SEvalZero * @brief TWI peripheral driver. 47*150812a8SEvalZero */ 48*150812a8SEvalZero 49*150812a8SEvalZero /** 50*150812a8SEvalZero * @brief Structure for the TWI master driver instance. 51*150812a8SEvalZero */ 52*150812a8SEvalZero typedef struct 53*150812a8SEvalZero { 54*150812a8SEvalZero NRF_TWI_Type * p_twi; ///< Pointer to a structure with TWI registers. 55*150812a8SEvalZero uint8_t drv_inst_idx; ///< Driver instance index. 56*150812a8SEvalZero } nrfx_twi_t; 57*150812a8SEvalZero 58*150812a8SEvalZero /** 59*150812a8SEvalZero * @brief Macro for creating a TWI master driver instance. 60*150812a8SEvalZero */ 61*150812a8SEvalZero #define NRFX_TWI_INSTANCE(id) \ 62*150812a8SEvalZero { \ 63*150812a8SEvalZero .p_twi = NRFX_CONCAT_2(NRF_TWI, id), \ 64*150812a8SEvalZero .drv_inst_idx = NRFX_CONCAT_3(NRFX_TWI, id, _INST_IDX), \ 65*150812a8SEvalZero } 66*150812a8SEvalZero 67*150812a8SEvalZero enum { 68*150812a8SEvalZero #if NRFX_CHECK(NRFX_TWI0_ENABLED) 69*150812a8SEvalZero NRFX_TWI0_INST_IDX, 70*150812a8SEvalZero #endif 71*150812a8SEvalZero #if NRFX_CHECK(NRFX_TWI1_ENABLED) 72*150812a8SEvalZero NRFX_TWI1_INST_IDX, 73*150812a8SEvalZero #endif 74*150812a8SEvalZero NRFX_TWI_ENABLED_COUNT 75*150812a8SEvalZero }; 76*150812a8SEvalZero 77*150812a8SEvalZero /** 78*150812a8SEvalZero * @brief Structure for the TWI master driver instance configuration. 79*150812a8SEvalZero */ 80*150812a8SEvalZero typedef struct 81*150812a8SEvalZero { 82*150812a8SEvalZero uint32_t scl; ///< SCL pin number. 83*150812a8SEvalZero uint32_t sda; ///< SDA pin number. 84*150812a8SEvalZero nrf_twi_frequency_t frequency; ///< TWI frequency. 85*150812a8SEvalZero uint8_t interrupt_priority; ///< Interrupt priority. 86*150812a8SEvalZero bool hold_bus_uninit; ///< Hold pull up state on gpio pins after uninit. 87*150812a8SEvalZero } nrfx_twi_config_t; 88*150812a8SEvalZero 89*150812a8SEvalZero /** 90*150812a8SEvalZero * @brief TWI master driver instance default configuration. 91*150812a8SEvalZero */ 92*150812a8SEvalZero #define NRFX_TWI_DEFAULT_CONFIG \ 93*150812a8SEvalZero { \ 94*150812a8SEvalZero .frequency = (nrf_twi_frequency_t)NRFX_TWI_DEFAULT_CONFIG_FREQUENCY, \ 95*150812a8SEvalZero .scl = 31, \ 96*150812a8SEvalZero .sda = 31, \ 97*150812a8SEvalZero .interrupt_priority = NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY, \ 98*150812a8SEvalZero .hold_bus_uninit = NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT, \ 99*150812a8SEvalZero } 100*150812a8SEvalZero 101*150812a8SEvalZero #define NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER (1UL << 2) /**< Interrupt after each transfer is suppressed, and the event handler is not called. */ 102*150812a8SEvalZero #define NRFX_TWI_FLAG_TX_NO_STOP (1UL << 5) /**< Flag indicating that the TX transfer will not end with a stop condition. */ 103*150812a8SEvalZero 104*150812a8SEvalZero /** 105*150812a8SEvalZero * @brief TWI master driver event types. 106*150812a8SEvalZero */ 107*150812a8SEvalZero typedef enum 108*150812a8SEvalZero { 109*150812a8SEvalZero NRFX_TWI_EVT_DONE, ///< Transfer completed event. 110*150812a8SEvalZero NRFX_TWI_EVT_ADDRESS_NACK, ///< Error event: NACK received after sending the address. 111*150812a8SEvalZero NRFX_TWI_EVT_DATA_NACK ///< Error event: NACK received after sending a data byte. 112*150812a8SEvalZero } nrfx_twi_evt_type_t; 113*150812a8SEvalZero 114*150812a8SEvalZero /** 115*150812a8SEvalZero * @brief TWI master driver transfer types. 116*150812a8SEvalZero */ 117*150812a8SEvalZero typedef enum 118*150812a8SEvalZero { 119*150812a8SEvalZero NRFX_TWI_XFER_TX, ///< TX transfer. 120*150812a8SEvalZero NRFX_TWI_XFER_RX, ///< RX transfer. 121*150812a8SEvalZero NRFX_TWI_XFER_TXRX, ///< TX transfer followed by RX transfer with repeated start. 122*150812a8SEvalZero NRFX_TWI_XFER_TXTX ///< TX transfer followed by TX transfer with repeated start. 123*150812a8SEvalZero } nrfx_twi_xfer_type_t; 124*150812a8SEvalZero 125*150812a8SEvalZero /** 126*150812a8SEvalZero * @brief Structure for a TWI transfer descriptor. 127*150812a8SEvalZero */ 128*150812a8SEvalZero typedef struct 129*150812a8SEvalZero { 130*150812a8SEvalZero nrfx_twi_xfer_type_t type; ///< Type of transfer. 131*150812a8SEvalZero uint8_t address; ///< Slave address. 132*150812a8SEvalZero size_t primary_length; ///< Number of bytes transferred. 133*150812a8SEvalZero size_t secondary_length; ///< Number of bytes transferred. 134*150812a8SEvalZero uint8_t * p_primary_buf; ///< Pointer to transferred data. 135*150812a8SEvalZero uint8_t * p_secondary_buf; ///< Pointer to transferred data. 136*150812a8SEvalZero } nrfx_twi_xfer_desc_t; 137*150812a8SEvalZero 138*150812a8SEvalZero 139*150812a8SEvalZero /**@brief Macro for setting the TX transfer descriptor. */ 140*150812a8SEvalZero #define NRFX_TWI_XFER_DESC_TX(addr, p_data, length) \ 141*150812a8SEvalZero { \ 142*150812a8SEvalZero .type = NRFX_TWI_XFER_TX, \ 143*150812a8SEvalZero .address = addr, \ 144*150812a8SEvalZero .primary_length = length, \ 145*150812a8SEvalZero .p_primary_buf = p_data, \ 146*150812a8SEvalZero } 147*150812a8SEvalZero 148*150812a8SEvalZero /**@brief Macro for setting the RX transfer descriptor. */ 149*150812a8SEvalZero #define NRFX_TWI_XFER_DESC_RX(addr, p_data, length) \ 150*150812a8SEvalZero { \ 151*150812a8SEvalZero .type = NRFX_TWI_XFER_RX, \ 152*150812a8SEvalZero .address = addr, \ 153*150812a8SEvalZero .primary_length = length, \ 154*150812a8SEvalZero .p_primary_buf = p_data, \ 155*150812a8SEvalZero } 156*150812a8SEvalZero 157*150812a8SEvalZero /**@brief Macro for setting the TXRX transfer descriptor. */ 158*150812a8SEvalZero #define NRFX_TWI_XFER_DESC_TXRX(addr, p_tx, tx_len, p_rx, rx_len) \ 159*150812a8SEvalZero { \ 160*150812a8SEvalZero .type = NRFX_TWI_XFER_TXRX, \ 161*150812a8SEvalZero .address = addr, \ 162*150812a8SEvalZero .primary_length = tx_len, \ 163*150812a8SEvalZero .secondary_length = rx_len, \ 164*150812a8SEvalZero .p_primary_buf = p_tx, \ 165*150812a8SEvalZero .p_secondary_buf = p_rx, \ 166*150812a8SEvalZero } 167*150812a8SEvalZero 168*150812a8SEvalZero /**@brief Macro for setting the TXTX transfer descriptor. */ 169*150812a8SEvalZero #define NRFX_TWI_XFER_DESC_TXTX(addr, p_tx, tx_len, p_tx2, tx_len2) \ 170*150812a8SEvalZero { \ 171*150812a8SEvalZero .type = NRFX_TWI_XFER_TXTX, \ 172*150812a8SEvalZero .address = addr, \ 173*150812a8SEvalZero .primary_length = tx_len, \ 174*150812a8SEvalZero .secondary_length = tx_len2, \ 175*150812a8SEvalZero .p_primary_buf = p_tx, \ 176*150812a8SEvalZero .p_secondary_buf = p_tx2, \ 177*150812a8SEvalZero } 178*150812a8SEvalZero 179*150812a8SEvalZero /** 180*150812a8SEvalZero * @brief Structure for a TWI event. 181*150812a8SEvalZero */ 182*150812a8SEvalZero typedef struct 183*150812a8SEvalZero { 184*150812a8SEvalZero nrfx_twi_evt_type_t type; ///< Event type. 185*150812a8SEvalZero nrfx_twi_xfer_desc_t xfer_desc; ///< Transfer details. 186*150812a8SEvalZero } nrfx_twi_evt_t; 187*150812a8SEvalZero 188*150812a8SEvalZero /** 189*150812a8SEvalZero * @brief TWI event handler prototype. 190*150812a8SEvalZero */ 191*150812a8SEvalZero typedef void (* nrfx_twi_evt_handler_t)(nrfx_twi_evt_t const * p_event, 192*150812a8SEvalZero void * p_context); 193*150812a8SEvalZero 194*150812a8SEvalZero /** 195*150812a8SEvalZero * @brief Function for initializing the TWI driver instance. 196*150812a8SEvalZero * 197*150812a8SEvalZero * @param[in] p_instance Pointer to the driver instance structure. 198*150812a8SEvalZero * @param[in] p_config Pointer to the structure with initial configuration. 199*150812a8SEvalZero * @param[in] event_handler Event handler provided by the user. If NULL, blocking mode is enabled. 200*150812a8SEvalZero * @param[in] p_context Context passed to event handler. 201*150812a8SEvalZero * 202*150812a8SEvalZero * @retval NRFX_SUCCESS If initialization was successful. 203*150812a8SEvalZero * @retval NRFX_ERROR_INVALID_STATE If the driver is in invalid state. 204*150812a8SEvalZero * @retval NRFX_ERROR_BUSY If some other peripheral with the same 205*150812a8SEvalZero * instance ID is already in use. This is 206*150812a8SEvalZero * possible only if @ref nrfx_prs module 207*150812a8SEvalZero * is enabled. 208*150812a8SEvalZero */ 209*150812a8SEvalZero nrfx_err_t nrfx_twi_init(nrfx_twi_t const * p_instance, 210*150812a8SEvalZero nrfx_twi_config_t const * p_config, 211*150812a8SEvalZero nrfx_twi_evt_handler_t event_handler, 212*150812a8SEvalZero void * p_context); 213*150812a8SEvalZero 214*150812a8SEvalZero /** 215*150812a8SEvalZero * @brief Function for uninitializing the TWI instance. 216*150812a8SEvalZero * 217*150812a8SEvalZero * @param[in] p_instance Pointer to the driver instance structure. 218*150812a8SEvalZero */ 219*150812a8SEvalZero void nrfx_twi_uninit(nrfx_twi_t const * p_instance); 220*150812a8SEvalZero 221*150812a8SEvalZero /** 222*150812a8SEvalZero * @brief Function for enabling the TWI instance. 223*150812a8SEvalZero * 224*150812a8SEvalZero * @param[in] p_instance Pointer to the driver instance structure. 225*150812a8SEvalZero */ 226*150812a8SEvalZero void nrfx_twi_enable(nrfx_twi_t const * p_instance); 227*150812a8SEvalZero 228*150812a8SEvalZero /** 229*150812a8SEvalZero * @brief Function for disabling the TWI instance. 230*150812a8SEvalZero * 231*150812a8SEvalZero * @param[in] p_instance Pointer to the driver instance structure. 232*150812a8SEvalZero */ 233*150812a8SEvalZero void nrfx_twi_disable(nrfx_twi_t const * p_instance); 234*150812a8SEvalZero 235*150812a8SEvalZero /** 236*150812a8SEvalZero * @brief Function for sending data to a TWI slave. 237*150812a8SEvalZero * 238*150812a8SEvalZero * The transmission will be stopped when an error occurs. If a transfer is ongoing, 239*150812a8SEvalZero * the function returns the error code @ref NRFX_ERROR_BUSY. 240*150812a8SEvalZero * 241*150812a8SEvalZero * @param[in] p_instance Pointer to the driver instance structure. 242*150812a8SEvalZero * @param[in] address Address of a specific slave device (only 7 LSB). 243*150812a8SEvalZero * @param[in] p_data Pointer to a transmit buffer. 244*150812a8SEvalZero * @param[in] length Number of bytes to send. 245*150812a8SEvalZero * @param[in] no_stop If set, the stop condition is not generated on the bus 246*150812a8SEvalZero * after the transfer has completed successfully (allowing 247*150812a8SEvalZero * for a repeated start in the next transfer). 248*150812a8SEvalZero * 249*150812a8SEvalZero * @retval NRFX_SUCCESS If the procedure was successful. 250*150812a8SEvalZero * @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer. 251*150812a8SEvalZero * @retval NRFX_ERROR_INTERNAL If an error was detected by hardware. 252*150812a8SEvalZero * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address in polling mode. 253*150812a8SEvalZero * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte in polling mode. 254*150812a8SEvalZero */ 255*150812a8SEvalZero nrfx_err_t nrfx_twi_tx(nrfx_twi_t const * p_instance, 256*150812a8SEvalZero uint8_t address, 257*150812a8SEvalZero uint8_t const * p_data, 258*150812a8SEvalZero size_t length, 259*150812a8SEvalZero bool no_stop); 260*150812a8SEvalZero 261*150812a8SEvalZero /** 262*150812a8SEvalZero * @brief Function for reading data from a TWI slave. 263*150812a8SEvalZero * 264*150812a8SEvalZero * The transmission will be stopped when an error occurs. If a transfer is ongoing, 265*150812a8SEvalZero * the function returns the error code @ref NRFX_ERROR_BUSY. 266*150812a8SEvalZero * 267*150812a8SEvalZero * @param[in] p_instance Pointer to the driver instance structure. 268*150812a8SEvalZero * @param[in] address Address of a specific slave device (only 7 LSB). 269*150812a8SEvalZero * @param[in] p_data Pointer to a receive buffer. 270*150812a8SEvalZero * @param[in] length Number of bytes to be received. 271*150812a8SEvalZero * 272*150812a8SEvalZero * @retval NRFX_SUCCESS If the procedure was successful. 273*150812a8SEvalZero * @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer. 274*150812a8SEvalZero * @retval NRFX_ERROR_INTERNAL If an error was detected by hardware. 275*150812a8SEvalZero * @retval NRFX_ERROR_DRV_TWI_ERR_OVERRUN If the unread data was replaced by new data 276*150812a8SEvalZero * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address in polling mode. 277*150812a8SEvalZero * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte in polling mode. 278*150812a8SEvalZero */ 279*150812a8SEvalZero nrfx_err_t nrfx_twi_rx(nrfx_twi_t const * p_instance, 280*150812a8SEvalZero uint8_t address, 281*150812a8SEvalZero uint8_t * p_data, 282*150812a8SEvalZero size_t length); 283*150812a8SEvalZero 284*150812a8SEvalZero /** 285*150812a8SEvalZero * @brief Function for preparing a TWI transfer. 286*150812a8SEvalZero * 287*150812a8SEvalZero * The following transfer types can be configured (@ref nrfx_twi_xfer_desc_t::type): 288*150812a8SEvalZero * - @ref NRFX_TWI_XFER_TXRX<span></span>: Write operation followed by a read operation (without STOP condition in between). 289*150812a8SEvalZero * - @ref NRFX_TWI_XFER_TXTX<span></span>: Write operation followed by a write operation (without STOP condition in between). 290*150812a8SEvalZero * - @ref NRFX_TWI_XFER_TX<span></span>: Write operation (with or without STOP condition). 291*150812a8SEvalZero * - @ref NRFX_TWI_XFER_RX<span></span>: Read operation (with STOP condition). 292*150812a8SEvalZero * 293*150812a8SEvalZero * @note TXRX and TXTX transfers are supported only in non-blocking mode. 294*150812a8SEvalZero * 295*150812a8SEvalZero * Additional options are provided using the flags parameter: 296*150812a8SEvalZero * - @ref NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER<span></span>: No user event handler after transfer completion. In most cases, this also means no interrupt at the end of the transfer. 297*150812a8SEvalZero * - @ref NRFX_TWI_FLAG_TX_NO_STOP<span></span>: No stop condition after TX transfer. 298*150812a8SEvalZero * 299*150812a8SEvalZero * @note 300*150812a8SEvalZero * Some flag combinations are invalid: 301*150812a8SEvalZero * - @ref NRFX_TWI_FLAG_TX_NO_STOP with @ref nrfx_twi_xfer_desc_t::type different than @ref NRFX_TWI_XFER_TX 302*150812a8SEvalZero * 303*150812a8SEvalZero * @param[in] p_instance Pointer to the driver instance structure. 304*150812a8SEvalZero * @param[in] p_xfer_desc Pointer to the transfer descriptor. 305*150812a8SEvalZero * @param[in] flags Transfer options (0 for default settings). 306*150812a8SEvalZero * 307*150812a8SEvalZero * @retval NRFX_SUCCESS If the procedure was successful. 308*150812a8SEvalZero * @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer. 309*150812a8SEvalZero * @retval NRFX_ERROR_NOT_SUPPORTED If the provided parameters are not supported. 310*150812a8SEvalZero * @retval NRFX_ERROR_INTERNAL If an error was detected by hardware. 311*150812a8SEvalZero * @retval NRFX_ERROR_DRV_TWI_ERR_OVERRUN If the unread data was replaced by new data (TXRX and RX) 312*150812a8SEvalZero * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address. 313*150812a8SEvalZero * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte. 314*150812a8SEvalZero */ 315*150812a8SEvalZero nrfx_err_t nrfx_twi_xfer(nrfx_twi_t const * p_instance, 316*150812a8SEvalZero nrfx_twi_xfer_desc_t const * p_xfer_desc, 317*150812a8SEvalZero uint32_t flags); 318*150812a8SEvalZero 319*150812a8SEvalZero /** 320*150812a8SEvalZero * @brief Function for checking the TWI driver state. 321*150812a8SEvalZero * 322*150812a8SEvalZero * @param[in] p_instance TWI instance. 323*150812a8SEvalZero * 324*150812a8SEvalZero * @retval true If the TWI driver is currently busy performing a transfer. 325*150812a8SEvalZero * @retval false If the TWI driver is ready for a new transfer. 326*150812a8SEvalZero */ 327*150812a8SEvalZero bool nrfx_twi_is_busy(nrfx_twi_t const * p_instance); 328*150812a8SEvalZero 329*150812a8SEvalZero /** 330*150812a8SEvalZero * @brief Function for getting the transferred data count. 331*150812a8SEvalZero * 332*150812a8SEvalZero * @param[in] p_instance Pointer to the driver instance structure. 333*150812a8SEvalZero * 334*150812a8SEvalZero * @return Data count. 335*150812a8SEvalZero */ 336*150812a8SEvalZero size_t nrfx_twi_data_count_get(nrfx_twi_t const * const p_instance); 337*150812a8SEvalZero 338*150812a8SEvalZero /** 339*150812a8SEvalZero * @brief Function for returning the address of a STOPPED TWI event. 340*150812a8SEvalZero * 341*150812a8SEvalZero * A STOPPED event can be used to detect the end of a transfer if the @ref NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER 342*150812a8SEvalZero * option is used. 343*150812a8SEvalZero * 344*150812a8SEvalZero * @param[in] p_instance Pointer to the driver instance structure. 345*150812a8SEvalZero * 346*150812a8SEvalZero * @return STOPPED event address. 347*150812a8SEvalZero */ 348*150812a8SEvalZero uint32_t nrfx_twi_stopped_event_get(nrfx_twi_t const * p_instance); 349*150812a8SEvalZero 350*150812a8SEvalZero void nrfx_twi_0_irq_handler(void); 351*150812a8SEvalZero void nrfx_twi_1_irq_handler(void); 352*150812a8SEvalZero 353*150812a8SEvalZero /** @} */ 354*150812a8SEvalZero 355*150812a8SEvalZero #ifdef __cplusplus 356*150812a8SEvalZero } 357*150812a8SEvalZero #endif 358*150812a8SEvalZero 359*150812a8SEvalZero #endif // NRFX_TWI_H__ 360