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/nrf52832-nimble/nordic/nrfx/drivers/include/
H A Dnrfx_qspi.h156 * - blocking mode (without handler) - a delay occurs until the last operation still runs and
158 * - interrupt mode (with handler) - event emission occurs after the last operation
179 * - blocking mode (without handler) - a delay occurs until the last operation still runs and
181 * - interrupt mode (with handler) - event emission occurs after the last operation
206 * - blocking mode (without handler) - a delay occurs until the last operation still runs and
208 * - interrupt mode (with handler) - event emission occurs after the last operation
H A Dnrfx_twi.h238 * The transmission will be stopped when an error occurs. If a transfer is ongoing,
264 * The transmission will be stopped when an error occurs. If a transfer is ongoing,
H A Dnrfx_twim.h248 * The transmission will be stopped when an error occurs. If a transfer is ongoing,
282 * The transmission will be stopped when an error occurs. If a transfer is ongoing,
/nrf52832-nimble/packages/NimBLE-latest/docs/ble_setup/
H A Dble_sync_cb.rst10 occurs in under a second after the application starts. An application
26 stack resets itself when a catastrophic error occurs, such as loss of
/nrf52832-nimble/rt-thread/libcpu/c-sky/common/
H A Dcsi_instr.h43 …For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
52 …etails Wait For Interrupt is a hint instruction that suspends execution until one interrupt occurs.
61 …etails Doze For Interrupt is a hint instruction that suspends execution until one interrupt occurs.
70 …etails Stop For Interrupt is a hint instruction that suspends execution until one interrupt occurs.
/nrf52832-nimble/rt-thread/libcpu/arm/cortex-r4/
H A Dtrap.c78 * which occurs during an instruction prefetch.
96 * which occurs during a data access.
/nrf52832-nimble/rt-thread/libcpu/arm/zynq7000/
H A Dtrap.c77 * which occurs during an instruction prefetch.
95 * which occurs during a data access.
/nrf52832-nimble/rt-thread/libcpu/arm/lpc24xx/
H A Dtrap.c76 * which occurs during an instruction prefetch.
93 * which occurs during a data access.
/nrf52832-nimble/rt-thread/libcpu/arm/s3c24x0/
H A Dtrap.c86 * which occurs during an instruction prefetch.
107 * which occurs during a data access.
/nrf52832-nimble/rt-thread/libcpu/arm/cortex-a/
H A Dtrap.c79 * which occurs during an instruction prefetch.
97 * which occurs during a data access.
/nrf52832-nimble/rt-thread/libcpu/arm/realview-a8-vmm/
H A Dtrap.c83 * which occurs during an instruction prefetch.
101 * which occurs during a data access.
/nrf52832-nimble/rt-thread/libcpu/arm/s3c44b0/
H A Dtrap.c79 * which occurs during an instruction prefetch.
95 * which occurs during a data access.
/nrf52832-nimble/rt-thread/libcpu/arm/sep4020/
H A Dtrap.c81 * which occurs during an instruction prefetch.
100 * which occurs during a data access.
/nrf52832-nimble/rt-thread/libcpu/arm/am335x/
H A Dtrap.c95 * which occurs during an instruction prefetch.
116 * which occurs during a data access.
/nrf52832-nimble/rt-thread/libcpu/arm/arm926/
H A Dtrap.c107 * which occurs during an instruction prefetch.
128 * which occurs during a data access.
/nrf52832-nimble/rt-thread/documentation/doxygen/
H A Dkernel.h92 * - The fast event supports event thread queue. Once a one bit event occurs, the corresponding
156 * The error code is defined to identify which kind of error occurs. When some
/nrf52832-nimble/rt-thread/libcpu/unicore32/sep6200/
H A Dtrap.c95 * which occurs during an instruction prefetch.
114 * which occurs during a data access.
/nrf52832-nimble/rt-thread/components/CMSIS/Include/
H A Dcore_cmInstr.h66 until one of a number of events occurs.
74 a low-power state until one of a number of events occurs.
334 until one of a number of events occurs.
345 a low-power state until one of a number of events occurs.
/nrf52832-nimble/rt-thread/components/libc/aio/
H A Dposix_aio.c202 * The aio_sigevent member specifies the notification which occurs when the
349 * The aio_sigevent member specifies the notification which occurs when the request
400 * shall occur. If sig is not NULL, asynchronous notification occurs as specified
/nrf52832-nimble/packages/NimBLE-latest/nimble/host/mesh/
H A Dsyscfg.yml481 a change occurs.
501 persistent storage after a change occurs. If the node receives
/nrf52832-nimble/rt-thread/components/net/lwip-2.0.2/src/core/ipv6/
H A Dethip6.c67 * an error occurs.
/nrf52832-nimble/rt-thread/libcpu/arm/cortex-m3/
H A Dcontext_iar.S9 ; * 2009-09-27 Bernard add protect when contex switch occurs
/nrf52832-nimble/packages/NimBLE-latest/nimble/host/include/host/
H A Dble_l2cap.h97 * When such an event occurs, the host notifies the application by passing an
/nrf52832-nimble/rt-thread/components/net/lwip-2.1.0/src/core/ipv6/
H A Dethip6.c67 * an error occurs.
/nrf52832-nimble/rt-thread/components/net/lwip-2.0.2/src/include/lwip/
H A Dapi.h165 * SENDPLUS occurs when enough data was delivered to peer so netconn_send() can be called again.
166 * A SENDMINUS event occurs when the next call to a netconn_send() would be blocking.

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