1 /*
2 * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved.
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 /******************************************************************************
18 * @file csi_instr.h
19 * @brief CSI Header File for instruct.
20 * @version V1.0
21 * @date 02. June 2017
22 ******************************************************************************/
23
24 #ifndef _CSI_INSTR_H_
25 #define _CSI_INSTR_H_
26
27
28 #define __CSI_GCC_OUT_REG(r) "=r" (r)
29 #define __CSI_GCC_USE_REG(r) "r" (r)
30
31 /**
32 \brief No Operation
33 \details No Operation does nothing. This instruction can be used for code alignment purposes.
34 */
__NOP(void)35 __ALWAYS_INLINE void __NOP(void)
36 {
37 __ASM volatile("nop");
38 }
39
40
41 /**
42 \brief Wait For Interrupt
43 \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
44 */
__WFI(void)45 __ALWAYS_INLINE void __WFI(void)
46 {
47 __ASM volatile("wait");
48 }
49
50 /**
51 \brief Wait For Interrupt
52 \details Wait For Interrupt is a hint instruction that suspends execution until one interrupt occurs.
53 */
__WAIT(void)54 __ALWAYS_INLINE void __WAIT(void)
55 {
56 __ASM volatile("wait");
57 }
58
59 /**
60 \brief Doze For Interrupt
61 \details Doze For Interrupt is a hint instruction that suspends execution until one interrupt occurs.
62 */
__DOZE(void)63 __ALWAYS_INLINE void __DOZE(void)
64 {
65 __ASM volatile("doze");
66 }
67
68 /**
69 \brief Stop For Interrupt
70 \details Stop For Interrupt is a hint instruction that suspends execution until one interrupt occurs.
71 */
__STOP(void)72 __ALWAYS_INLINE void __STOP(void)
73 {
74 __ASM volatile("stop");
75 }
76
77 /**
78 \brief Instruction Synchronization Barrier
79 \details Instruction Synchronization Barrier flushes the pipeline in the processor,
80 so that all instructions following the ISB are fetched from cache or memory,
81 after the instruction has been completed.
82 */
__ISB(void)83 __ALWAYS_INLINE void __ISB(void)
84 {
85 __ASM volatile("sync"::: "memory");
86 }
87
88
89 /**
90 \brief Data Synchronization Barrier
91 \details Acts as a special kind of Data Memory Barrier.
92 It completes when all explicit memory accesses before this instruction complete.
93 */
__DSB(void)94 __ALWAYS_INLINE void __DSB(void)
95 {
96 __ASM volatile("sync"::: "memory");
97 }
98
99
100 /**
101 \brief Data Memory Barrier
102 \details Ensures the apparent order of the explicit memory operations before
103 and after the instruction, without ensuring their completion.
104 */
__DMB(void)105 __ALWAYS_INLINE void __DMB(void)
106 {
107 __ASM volatile("sync"::: "memory");
108 }
109
110
111 /**
112 \brief Reverse byte order (32 bit)
113 \details Reverses the byte order in integer value.
114 \param [in] value Value to reverse
115 \return Reversed value
116 */
__REV(uint32_t value)117 __ALWAYS_INLINE uint32_t __REV(uint32_t value)
118 {
119 return __builtin_bswap32(value);
120 }
121
122
123 /**
124 \brief Reverse byte order (16 bit)
125 \details Reverses the byte order in two unsigned short values.
126 \param [in] value Value to reverse
127 \return Reversed value
128 */
__REV16(uint32_t value)129 __ALWAYS_INLINE uint32_t __REV16(uint32_t value)
130 {
131 uint32_t result;
132 #if (__CK80X >= 2)
133 __ASM volatile("revh %0, %1" : __CSI_GCC_OUT_REG(result) : __CSI_GCC_USE_REG(value));
134 #else
135 result = ((value & 0xFF000000) >> 8) | ((value & 0x00FF0000) << 8) |
136 ((value & 0x0000FF00) >> 8) | ((value & 0x000000FF) << 8);
137 #endif
138 return (result);
139 }
140
141
142 /**
143 \brief Reverse byte order in signed short value
144 \details Reverses the byte order in a signed short value with sign extension to integer.
145 \param [in] value Value to reverse
146 \return Reversed value
147 */
__REVSH(int32_t value)148 __ALWAYS_INLINE int32_t __REVSH(int32_t value)
149 {
150 return (short)(((value & 0xFF00) >> 8) | ((value & 0x00FF) << 8));
151 }
152
153
154 /**
155 \brief Rotate Right in unsigned value (32 bit)
156 \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
157 \param [in] op1 Value to rotate
158 \param [in] op2 Number of Bits to rotate
159 \return Rotated value
160 */
__ROR(uint32_t op1,uint32_t op2)161 __ALWAYS_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
162 {
163 return (op1 >> op2) | (op1 << (32U - op2));
164 }
165
166
167 /**
168 \brief Breakpoint
169 \details Causes the processor to enter Debug state
170 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
171 */
__BKPT()172 __ALWAYS_INLINE void __BKPT()
173 {
174 __ASM volatile("bkpt");
175 }
176
177 /**
178 \brief Reverse bit order of value
179 \details Reverses the bit order of the given value.
180 \param [in] value Value to reverse
181 \return Reversed value
182 */
__RBIT(uint32_t value)183 __ALWAYS_INLINE uint32_t __RBIT(uint32_t value)
184 {
185 uint32_t result;
186
187 #if (__CK80X >= 0x03U)
188 __ASM volatile("brev %0, %1" : "=r"(result) : "r"(value));
189 #else
190 int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */
191
192 result = value; /* r will be reversed bits of v; first get LSB of v */
193
194 for (value >>= 1U; value; value >>= 1U)
195 {
196 result <<= 1U;
197 result |= value & 1U;
198 s--;
199 }
200
201 result <<= s; /* shift when v's highest bits are zero */
202 #endif
203 return (result);
204 }
205
206
207 /**
208 \brief Count leading zeros
209 \details Counts the number of leading zeros of a data value.
210 \param [in] value Value to count the leading zeros
211 \return number of leading zeros in value
212 */
213 #define __CLZ __builtin_clz
214 /**
215 \details This function saturates a signed value.
216 \param [in] x Value to be saturated
217 \param [in] y Bit position to saturate to [1..32]
218 \return Saturated value.
219 */
__SSAT(int32_t x,uint32_t y)220 __ALWAYS_INLINE int32_t __SSAT(int32_t x, uint32_t y)
221 {
222 int32_t posMax, negMin;
223 uint32_t i;
224
225 posMax = 1;
226
227 for (i = 0; i < (y - 1); i++)
228 {
229 posMax = posMax * 2;
230 }
231
232 if (x > 0)
233 {
234 posMax = (posMax - 1);
235
236 if (x > posMax)
237 {
238 x = posMax;
239 }
240
241 // x &= (posMax * 2 + 1);
242 }
243 else
244 {
245 negMin = -posMax;
246
247 if (x < negMin)
248 {
249 x = negMin;
250 }
251
252 // x &= (posMax * 2 - 1);
253 }
254
255 return (x);
256 }
257
258 /**
259 \brief Unsigned Saturate
260 \details Saturates an unsigned value.
261 \param [in] value Value to be saturated
262 \param [in] sat Bit position to saturate to (0..31)
263 \return Saturated value
264 */
__USAT(uint32_t value,uint32_t sat)265 __ALWAYS_INLINE uint32_t __USAT(uint32_t value, uint32_t sat)
266 {
267 uint32_t result;
268
269 if ((((0xFFFFFFFF >> sat) << sat) & value) != 0)
270 {
271 result = 0xFFFFFFFF >> (32 - sat);
272 }
273 else
274 {
275 result = value;
276 }
277
278 return (result);
279 }
280
281 /**
282 \brief Unsigned Saturate for internal use
283 \details Saturates an unsigned value, should not call directly.
284 \param [in] value Value to be saturated
285 \param [in] sat Bit position to saturate to (0..31)
286 \return Saturated value
287 */
__IUSAT(uint32_t value,uint32_t sat)288 __ALWAYS_INLINE uint32_t __IUSAT(uint32_t value, uint32_t sat)
289 {
290 uint32_t result;
291
292 if (value & 0x80000000) /* only overflow set bit-31 */
293 {
294 result = 0;
295 }
296 else if ((((0xFFFFFFFF >> sat) << sat) & value) != 0)
297 {
298 result = 0xFFFFFFFF >> (32 - sat);
299 }
300 else
301 {
302 result = value;
303 }
304
305 return (result);
306 }
307
308 /**
309 \brief Rotate Right with Extend
310 \details This function moves each bit of a bitstring right by one bit.
311 The carry input is shifted in at the left end of the bitstring.
312 \note carry input will always 0.
313 \param [in] op1 Value to rotate
314 \return Rotated value
315 */
__RRX(uint32_t op1)316 __ALWAYS_INLINE uint32_t __RRX(uint32_t op1)
317 {
318 #if (__CK80X >= 2)
319 uint32_t res = 0;
320 __ASM volatile("bgeni t0, 31\n\t"
321 "lsri %0, 1\n\t"
322 "movt %1, t0\n\t"
323 "or %1, %1, %0\n\t"
324 : "=r"(op1), "=r"(res): "0"(op1), "1"(res): "t0");
325 return res;
326 #else
327 uint32_t res = 0;
328 __ASM volatile("movi r7, 0\n\t"
329 "bseti r7, 31\n\t"
330 "lsri %0, 1\n\t"
331 "bf 1f\n\t"
332 "mov %1, r7\n\t"
333 "1:\n\t"
334 "or %1, %1, %0\n\t"
335 : "=r"(op1), "=r"(res): "0"(op1), "1"(res): "r7");
336 return res;
337 #endif
338 }
339
340 /**
341 \brief LDRT Unprivileged (8 bit)
342 \details Executes a Unprivileged LDRT instruction for 8 bit value.
343 \param [in] addr Pointer to location
344 \return value of type uint8_t at (*ptr)
345 */
__LDRBT(volatile uint8_t * addr)346 __ALWAYS_INLINE uint8_t __LDRBT(volatile uint8_t *addr)
347 {
348 uint32_t result;
349 //#warning "__LDRBT"
350 __ASM volatile("ldb %0, (%1, 0)" : "=r"(result) : "r"(addr));
351 return ((uint8_t) result); /* Add explicit type cast here */
352 }
353
354
355 /**
356 \brief LDRT Unprivileged (16 bit)
357 \details Executes a Unprivileged LDRT instruction for 16 bit values.
358 \param [in] addr Pointer to location
359 \return value of type uint16_t at (*ptr)
360 */
__LDRHT(volatile uint16_t * addr)361 __ALWAYS_INLINE uint16_t __LDRHT(volatile uint16_t *addr)
362 {
363 uint32_t result;
364
365 //#warning "__LDRHT"
366 __ASM volatile("ldh %0, (%1, 0)" : "=r"(result) : "r"(addr));
367 return ((uint16_t) result); /* Add explicit type cast here */
368 }
369
370
371 /**
372 \brief LDRT Unprivileged (32 bit)
373 \details Executes a Unprivileged LDRT instruction for 32 bit values.
374 \param [in] addr Pointer to location
375 \return value of type uint32_t at (*ptr)
376 */
__LDRT(volatile uint32_t * addr)377 __ALWAYS_INLINE uint32_t __LDRT(volatile uint32_t *addr)
378 {
379 uint32_t result;
380
381 //#warning "__LDRT"
382 __ASM volatile("ldw %0, (%1, 0)" : "=r"(result) : "r"(addr));
383 return (result);
384 }
385
386
387 /**
388 \brief STRT Unprivileged (8 bit)
389 \details Executes a Unprivileged STRT instruction for 8 bit values.
390 \param [in] value Value to store
391 \param [in] addr Pointer to location
392 */
__STRBT(uint8_t value,volatile uint8_t * addr)393 __ALWAYS_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr)
394 {
395 //#warning "__STRBT"
396 __ASM volatile("stb %1, (%0, 0)" :: "r"(addr), "r"((uint32_t)value) : "memory");
397 }
398
399
400 /**
401 \brief STRT Unprivileged (16 bit)
402 \details Executes a Unprivileged STRT instruction for 16 bit values.
403 \param [in] value Value to store
404 \param [in] addr Pointer to location
405 */
__STRHT(uint16_t value,volatile uint16_t * addr)406 __ALWAYS_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr)
407 {
408 //#warning "__STRHT"
409 __ASM volatile("sth %1, (%0, 0)" :: "r"(addr), "r"((uint32_t)value) : "memory");
410 }
411
412
413 /**
414 \brief STRT Unprivileged (32 bit)
415 \details Executes a Unprivileged STRT instruction for 32 bit values.
416 \param [in] value Value to store
417 \param [in] addr Pointer to location
418 */
__STRT(uint32_t value,volatile uint32_t * addr)419 __ALWAYS_INLINE void __STRT(uint32_t value, volatile uint32_t *addr)
420 {
421 //#warning "__STRT"
422 __ASM volatile("stw %1, (%0, 0)" :: "r"(addr), "r"(value) : "memory");
423 }
424
425 /*@}*/ /* end of group CSI_Core_InstructionInterface */
426
427
428 /* ########################## FPU functions #################################### */
429
430 /**
431 \brief get FPU type
432 \details returns the FPU type, always 0.
433 \returns
434 - \b 0: No FPU
435 - \b 1: Single precision FPU
436 - \b 2: Double + Single precision FPU
437 */
__get_FPUType(void)438 __ALWAYS_INLINE uint32_t __get_FPUType(void)
439 {
440 uint32_t result;
441
442 __ASM volatile("mfcr %0, cr<13, 0>" : "=r"(result));
443 return 0;
444 }
445
446
447 #endif /* _CSI_INSTR_H_ */
448