xref: /nrf52832-nimble/rt-thread/libcpu/arm/zynq7000/trap.c (revision 104654410c56c573564690304ae786df310c91fc)
1*10465441SEvalZero /*
2*10465441SEvalZero  * Copyright (c) 2006-2018, RT-Thread Development Team
3*10465441SEvalZero  *
4*10465441SEvalZero  * SPDX-License-Identifier: Apache-2.0
5*10465441SEvalZero  *
6*10465441SEvalZero  * Change Logs:
7*10465441SEvalZero  * Date           Author       Notes
8*10465441SEvalZero  * 2013-07-20     Bernard      first version
9*10465441SEvalZero  */
10*10465441SEvalZero 
11*10465441SEvalZero #include <rtthread.h>
12*10465441SEvalZero #include <rthw.h>
13*10465441SEvalZero 
14*10465441SEvalZero #include "zynq7000.h"
15*10465441SEvalZero #include "gic.h"
16*10465441SEvalZero 
17*10465441SEvalZero extern struct rt_thread *rt_current_thread;
18*10465441SEvalZero #ifdef RT_USING_FINSH
19*10465441SEvalZero extern long list_thread(void);
20*10465441SEvalZero #endif
21*10465441SEvalZero 
22*10465441SEvalZero /**
23*10465441SEvalZero  * this function will show registers of CPU
24*10465441SEvalZero  *
25*10465441SEvalZero  * @param regs the registers point
26*10465441SEvalZero  */
rt_hw_show_register(struct rt_hw_exp_stack * regs)27*10465441SEvalZero void rt_hw_show_register (struct rt_hw_exp_stack *regs)
28*10465441SEvalZero {
29*10465441SEvalZero     rt_kprintf("Execption:\n");
30*10465441SEvalZero     rt_kprintf("r00:0x%08x r01:0x%08x r02:0x%08x r03:0x%08x\n", regs->r0, regs->r1, regs->r2, regs->r3);
31*10465441SEvalZero     rt_kprintf("r04:0x%08x r05:0x%08x r06:0x%08x r07:0x%08x\n", regs->r4, regs->r5, regs->r6, regs->r7);
32*10465441SEvalZero     rt_kprintf("r08:0x%08x r09:0x%08x r10:0x%08x\n", regs->r8, regs->r9, regs->r10);
33*10465441SEvalZero     rt_kprintf("fp :0x%08x ip :0x%08x\n", regs->fp, regs->ip);
34*10465441SEvalZero     rt_kprintf("sp :0x%08x lr :0x%08x pc :0x%08x\n", regs->sp, regs->lr, regs->pc);
35*10465441SEvalZero     rt_kprintf("cpsr:0x%08x\n", regs->cpsr);
36*10465441SEvalZero }
37*10465441SEvalZero 
38*10465441SEvalZero /**
39*10465441SEvalZero  * When comes across an instruction which it cannot handle,
40*10465441SEvalZero  * it takes the undefined instruction trap.
41*10465441SEvalZero  *
42*10465441SEvalZero  * @param regs system registers
43*10465441SEvalZero  *
44*10465441SEvalZero  * @note never invoke this function in application
45*10465441SEvalZero  */
rt_hw_trap_undef(struct rt_hw_exp_stack * regs)46*10465441SEvalZero void rt_hw_trap_undef(struct rt_hw_exp_stack *regs)
47*10465441SEvalZero {
48*10465441SEvalZero     rt_kprintf("undefined instruction:\n");
49*10465441SEvalZero     rt_hw_show_register(regs);
50*10465441SEvalZero #ifdef RT_USING_FINSH
51*10465441SEvalZero     list_thread();
52*10465441SEvalZero #endif
53*10465441SEvalZero     rt_hw_cpu_shutdown();
54*10465441SEvalZero }
55*10465441SEvalZero 
56*10465441SEvalZero /**
57*10465441SEvalZero  * The software interrupt instruction (SWI) is used for entering
58*10465441SEvalZero  * Supervisor mode, usually to request a particular supervisor
59*10465441SEvalZero  * function.
60*10465441SEvalZero  *
61*10465441SEvalZero  * @param regs system registers
62*10465441SEvalZero  *
63*10465441SEvalZero  * @note never invoke this function in application
64*10465441SEvalZero  */
rt_hw_trap_swi(struct rt_hw_exp_stack * regs)65*10465441SEvalZero void rt_hw_trap_swi(struct rt_hw_exp_stack *regs)
66*10465441SEvalZero {
67*10465441SEvalZero     rt_kprintf("software interrupt:\n");
68*10465441SEvalZero     rt_hw_show_register(regs);
69*10465441SEvalZero #ifdef RT_USING_FINSH
70*10465441SEvalZero     list_thread();
71*10465441SEvalZero #endif
72*10465441SEvalZero     rt_hw_cpu_shutdown();
73*10465441SEvalZero }
74*10465441SEvalZero 
75*10465441SEvalZero /**
76*10465441SEvalZero  * An abort indicates that the current memory access cannot be completed,
77*10465441SEvalZero  * which occurs during an instruction prefetch.
78*10465441SEvalZero  *
79*10465441SEvalZero  * @param regs system registers
80*10465441SEvalZero  *
81*10465441SEvalZero  * @note never invoke this function in application
82*10465441SEvalZero  */
rt_hw_trap_pabt(struct rt_hw_exp_stack * regs)83*10465441SEvalZero void rt_hw_trap_pabt(struct rt_hw_exp_stack *regs)
84*10465441SEvalZero {
85*10465441SEvalZero     rt_kprintf("prefetch abort:\n");
86*10465441SEvalZero     rt_hw_show_register(regs);
87*10465441SEvalZero #ifdef RT_USING_FINSH
88*10465441SEvalZero     list_thread();
89*10465441SEvalZero #endif
90*10465441SEvalZero     rt_hw_cpu_shutdown();
91*10465441SEvalZero }
92*10465441SEvalZero 
93*10465441SEvalZero /**
94*10465441SEvalZero  * An abort indicates that the current memory access cannot be completed,
95*10465441SEvalZero  * which occurs during a data access.
96*10465441SEvalZero  *
97*10465441SEvalZero  * @param regs system registers
98*10465441SEvalZero  *
99*10465441SEvalZero  * @note never invoke this function in application
100*10465441SEvalZero  */
rt_hw_trap_dabt(struct rt_hw_exp_stack * regs)101*10465441SEvalZero void rt_hw_trap_dabt(struct rt_hw_exp_stack *regs)
102*10465441SEvalZero {
103*10465441SEvalZero     rt_kprintf("data abort:");
104*10465441SEvalZero     rt_hw_show_register(regs);
105*10465441SEvalZero #ifdef RT_USING_FINSH
106*10465441SEvalZero     list_thread();
107*10465441SEvalZero #endif
108*10465441SEvalZero     rt_hw_cpu_shutdown();
109*10465441SEvalZero }
110*10465441SEvalZero 
111*10465441SEvalZero /**
112*10465441SEvalZero  * Normally, system will never reach here
113*10465441SEvalZero  *
114*10465441SEvalZero  * @param regs system registers
115*10465441SEvalZero  *
116*10465441SEvalZero  * @note never invoke this function in application
117*10465441SEvalZero  */
rt_hw_trap_resv(struct rt_hw_exp_stack * regs)118*10465441SEvalZero void rt_hw_trap_resv(struct rt_hw_exp_stack *regs)
119*10465441SEvalZero {
120*10465441SEvalZero     rt_kprintf("reserved trap:\n");
121*10465441SEvalZero     rt_hw_show_register(regs);
122*10465441SEvalZero #ifdef RT_USING_FINSH
123*10465441SEvalZero     list_thread();
124*10465441SEvalZero #endif
125*10465441SEvalZero     rt_hw_cpu_shutdown();
126*10465441SEvalZero }
127*10465441SEvalZero 
128*10465441SEvalZero #define GIC_ACK_INTID_MASK					0x000003ff
129*10465441SEvalZero 
rt_hw_trap_irq()130*10465441SEvalZero void rt_hw_trap_irq()
131*10465441SEvalZero {
132*10465441SEvalZero     void *param;
133*10465441SEvalZero     unsigned long ir;
134*10465441SEvalZero     unsigned long fullir;
135*10465441SEvalZero     rt_isr_handler_t isr_func;
136*10465441SEvalZero     extern struct rt_irq_desc isr_table[];
137*10465441SEvalZero 
138*10465441SEvalZero     fullir = arm_gic_get_active_irq(0);
139*10465441SEvalZero     ir = fullir & GIC_ACK_INTID_MASK;
140*10465441SEvalZero 
141*10465441SEvalZero     /* get interrupt service routine */
142*10465441SEvalZero     isr_func = isr_table[ir].handler;
143*10465441SEvalZero     if (isr_func)
144*10465441SEvalZero     {
145*10465441SEvalZero         param = isr_table[ir].param;
146*10465441SEvalZero         /* turn to interrupt service routine */
147*10465441SEvalZero         isr_func(ir, param);
148*10465441SEvalZero     }
149*10465441SEvalZero 
150*10465441SEvalZero     /* end of interrupt */
151*10465441SEvalZero     arm_gic_ack(0, fullir);
152*10465441SEvalZero }
153*10465441SEvalZero 
rt_hw_trap_fiq()154*10465441SEvalZero void rt_hw_trap_fiq()
155*10465441SEvalZero {
156*10465441SEvalZero     void *param;
157*10465441SEvalZero     unsigned long ir;
158*10465441SEvalZero     unsigned long fullir;
159*10465441SEvalZero     rt_isr_handler_t isr_func;
160*10465441SEvalZero     extern struct rt_irq_desc isr_table[];
161*10465441SEvalZero 
162*10465441SEvalZero     fullir = arm_gic_get_active_irq(0);
163*10465441SEvalZero     ir = fullir & GIC_ACK_INTID_MASK;
164*10465441SEvalZero 
165*10465441SEvalZero     /* get interrupt service routine */
166*10465441SEvalZero     isr_func = isr_table[ir].handler;
167*10465441SEvalZero     param = isr_table[ir].param;
168*10465441SEvalZero 
169*10465441SEvalZero     /* turn to interrupt service routine */
170*10465441SEvalZero     isr_func(ir, param);
171*10465441SEvalZero 
172*10465441SEvalZero     /* end of interrupt */
173*10465441SEvalZero     arm_gic_ack(0, fullir);
174*10465441SEvalZero }
175*10465441SEvalZero 
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