1*10465441SEvalZero /*
2*10465441SEvalZero * Copyright (c) 2006-2018, RT-Thread Development Team
3*10465441SEvalZero *
4*10465441SEvalZero * SPDX-License-Identifier: Apache-2.0
5*10465441SEvalZero *
6*10465441SEvalZero * Change Logs:
7*10465441SEvalZero * Date Author Notes
8*10465441SEvalZero * 2006-09-06 XuXinming first version
9*10465441SEvalZero * 2006-09-15 Bernard modify rt_hw_trap_irq for more effective
10*10465441SEvalZero */
11*10465441SEvalZero
12*10465441SEvalZero #include <rtthread.h>
13*10465441SEvalZero #include <rthw.h>
14*10465441SEvalZero
15*10465441SEvalZero #include "s3c44b0.h"
16*10465441SEvalZero
17*10465441SEvalZero extern unsigned char interrupt_bank0[256];
18*10465441SEvalZero extern unsigned char interrupt_bank1[256];
19*10465441SEvalZero extern unsigned char interrupt_bank2[256];
20*10465441SEvalZero extern unsigned char interrupt_bank3[256];
21*10465441SEvalZero
22*10465441SEvalZero extern struct rt_thread *rt_current_thread;
23*10465441SEvalZero
24*10465441SEvalZero /**
25*10465441SEvalZero * @addtogroup S3C44B0
26*10465441SEvalZero */
27*10465441SEvalZero /*@{*/
28*10465441SEvalZero
29*10465441SEvalZero /**
30*10465441SEvalZero * this function will show registers of CPU
31*10465441SEvalZero *
32*10465441SEvalZero * @param regs the registers point
33*10465441SEvalZero */
rt_hw_show_register(struct rt_hw_register * regs)34*10465441SEvalZero void rt_hw_show_register (struct rt_hw_register *regs)
35*10465441SEvalZero {
36*10465441SEvalZero rt_kprintf("Execption:\n");
37*10465441SEvalZero rt_kprintf("r00:0x%08x r01:0x%08x r02:0x%08x r03:0x%08x\n", regs->r0, regs->r1, regs->r2, regs->r3);
38*10465441SEvalZero rt_kprintf("r04:0x%08x r05:0x%08x r06:0x%08x r07:0x%08x\n", regs->r4, regs->r5, regs->r6, regs->r7);
39*10465441SEvalZero rt_kprintf("r08:0x%08x r09:0x%08x r10:0x%08x\n", regs->r8, regs->r9, regs->r10);
40*10465441SEvalZero rt_kprintf("fp :0x%08x ip :0x%08x\n", regs->fp, regs->ip);
41*10465441SEvalZero rt_kprintf("sp :0x%08x lr :0x%08x pc :0x%08x\n", regs->sp, regs->lr, regs->pc);
42*10465441SEvalZero rt_kprintf("cpsr:0x%08x\n", regs->cpsr);
43*10465441SEvalZero }
44*10465441SEvalZero
45*10465441SEvalZero /**
46*10465441SEvalZero * When ARM7TDMI comes across an instruction which it cannot handle,
47*10465441SEvalZero * it takes the undefined instruction trap.
48*10465441SEvalZero *
49*10465441SEvalZero * @param regs system registers
50*10465441SEvalZero *
51*10465441SEvalZero * @note never invoke this function in application
52*10465441SEvalZero */
rt_hw_trap_udef(struct rt_hw_register * regs)53*10465441SEvalZero void rt_hw_trap_udef(struct rt_hw_register *regs)
54*10465441SEvalZero {
55*10465441SEvalZero rt_hw_show_register(regs);
56*10465441SEvalZero
57*10465441SEvalZero rt_kprintf("undefined instruction\n");
58*10465441SEvalZero rt_hw_cpu_shutdown();
59*10465441SEvalZero }
60*10465441SEvalZero
61*10465441SEvalZero /**
62*10465441SEvalZero * The software interrupt instruction (SWI) is used for entering
63*10465441SEvalZero * Supervisor mode, usually to request a particular supervisor
64*10465441SEvalZero * function.
65*10465441SEvalZero *
66*10465441SEvalZero * @param regs system registers
67*10465441SEvalZero *
68*10465441SEvalZero * @note never invoke this function in application
69*10465441SEvalZero */
rt_hw_trap_swi(struct rt_hw_register * regs)70*10465441SEvalZero void rt_hw_trap_swi(struct rt_hw_register *regs)
71*10465441SEvalZero {
72*10465441SEvalZero rt_kprintf("software interrupt\n");
73*10465441SEvalZero rt_hw_show_register(regs);
74*10465441SEvalZero rt_hw_cpu_shutdown();
75*10465441SEvalZero }
76*10465441SEvalZero
77*10465441SEvalZero /**
78*10465441SEvalZero * An abort indicates that the current memory access cannot be completed,
79*10465441SEvalZero * which occurs during an instruction prefetch.
80*10465441SEvalZero *
81*10465441SEvalZero * @param regs system registers
82*10465441SEvalZero *
83*10465441SEvalZero * @note never invoke this function in application
84*10465441SEvalZero */
rt_hw_trap_pabt(struct rt_hw_register * regs)85*10465441SEvalZero void rt_hw_trap_pabt(struct rt_hw_register *regs)
86*10465441SEvalZero {
87*10465441SEvalZero rt_hw_show_register(regs);
88*10465441SEvalZero
89*10465441SEvalZero rt_kprintf("prefetch abort\n");
90*10465441SEvalZero rt_hw_cpu_shutdown();
91*10465441SEvalZero }
92*10465441SEvalZero
93*10465441SEvalZero /**
94*10465441SEvalZero * An abort indicates that the current memory access cannot be completed,
95*10465441SEvalZero * which occurs during a data access.
96*10465441SEvalZero *
97*10465441SEvalZero * @param regs system registers
98*10465441SEvalZero *
99*10465441SEvalZero * @note never invoke this function in application
100*10465441SEvalZero */
rt_hw_trap_dabt(struct rt_hw_register * regs)101*10465441SEvalZero void rt_hw_trap_dabt(struct rt_hw_register *regs)
102*10465441SEvalZero {
103*10465441SEvalZero rt_hw_show_register(regs);
104*10465441SEvalZero
105*10465441SEvalZero rt_kprintf("data abort\n");
106*10465441SEvalZero rt_hw_cpu_shutdown();
107*10465441SEvalZero }
108*10465441SEvalZero
109*10465441SEvalZero /**
110*10465441SEvalZero * Normally, system will never reach here
111*10465441SEvalZero *
112*10465441SEvalZero * @param regs system registers
113*10465441SEvalZero *
114*10465441SEvalZero * @note never invoke this function in application
115*10465441SEvalZero */
rt_hw_trap_resv(struct rt_hw_register * regs)116*10465441SEvalZero void rt_hw_trap_resv(struct rt_hw_register *regs)
117*10465441SEvalZero {
118*10465441SEvalZero rt_kprintf("not used\n");
119*10465441SEvalZero rt_hw_show_register(regs);
120*10465441SEvalZero rt_hw_cpu_shutdown();
121*10465441SEvalZero }
122*10465441SEvalZero
123*10465441SEvalZero extern rt_isr_handler_t isr_table[];
rt_hw_trap_irq()124*10465441SEvalZero void rt_hw_trap_irq()
125*10465441SEvalZero {
126*10465441SEvalZero register unsigned long ispr, intstat;
127*10465441SEvalZero register rt_isr_handler_t isr_func;
128*10465441SEvalZero
129*10465441SEvalZero #ifdef BSP_INT_DEBUG
130*10465441SEvalZero rt_kprintf("irq coming, ");
131*10465441SEvalZero #endif
132*10465441SEvalZero intstat = I_ISPR & 0x7ffffff;
133*10465441SEvalZero #ifdef BSP_INT_DEBUG
134*10465441SEvalZero rt_kprintf("I_ISPR: %d\n", intstat);
135*10465441SEvalZero #endif
136*10465441SEvalZero
137*10465441SEvalZero ispr = intstat;
138*10465441SEvalZero
139*10465441SEvalZero /* to find interrupt */
140*10465441SEvalZero if ( intstat & 0xff ) /* lowest 8bits */
141*10465441SEvalZero {
142*10465441SEvalZero intstat = interrupt_bank0[intstat & 0xff];
143*10465441SEvalZero isr_func = (rt_isr_handler_t)isr_table[ intstat ];
144*10465441SEvalZero }
145*10465441SEvalZero else if ( intstat & 0xff00 ) /* low 8bits */
146*10465441SEvalZero {
147*10465441SEvalZero intstat = interrupt_bank1[(intstat & 0xff00) >> 8];
148*10465441SEvalZero isr_func = (rt_isr_handler_t)isr_table[ intstat ];
149*10465441SEvalZero }
150*10465441SEvalZero else if ( intstat & 0xff0000 ) /* high 8bits */
151*10465441SEvalZero {
152*10465441SEvalZero intstat = interrupt_bank2[(intstat & 0xff0000) >> 16];
153*10465441SEvalZero isr_func = (rt_isr_handler_t)isr_table[ intstat ];
154*10465441SEvalZero }
155*10465441SEvalZero else if ( intstat & 0xff000000 ) /* highest 8bits */
156*10465441SEvalZero {
157*10465441SEvalZero intstat = interrupt_bank3[(intstat & 0xff000000) >> 24];
158*10465441SEvalZero isr_func = (rt_isr_handler_t)isr_table[ intstat ];
159*10465441SEvalZero }
160*10465441SEvalZero else return;
161*10465441SEvalZero
162*10465441SEvalZero #ifdef BSP_INT_DEBUG
163*10465441SEvalZero rt_kprintf("irq: %d happen\n", intstat);
164*10465441SEvalZero #endif
165*10465441SEvalZero
166*10465441SEvalZero /* turn to interrupt service routine */
167*10465441SEvalZero isr_func(intstat);
168*10465441SEvalZero
169*10465441SEvalZero I_ISPC = ispr; /* clear interrupt */
170*10465441SEvalZero }
171*10465441SEvalZero
rt_hw_trap_fiq()172*10465441SEvalZero void rt_hw_trap_fiq()
173*10465441SEvalZero {
174*10465441SEvalZero rt_kprintf("fast interrupt request\n");
175*10465441SEvalZero }
176*10465441SEvalZero
177*10465441SEvalZero /*@}*/
178