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/nrf52832-nimble/nordic/nrfx/hal/
H A Dnrf_clock.h2 * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
47 * This code can be used to managing low-frequency clock (LFCLK) and the high-frequency clock
63 * @brief Presence of the Low Frequency Clock calibration.
73 * @brief Low-frequency clock sources.
111 * @brief High-frequency clock sources.
151 …* @details The NRF_CLOCK_TASK_LFCLKSTOP task cannot be set when the low-frequency clock is not run…
152 * The NRF_CLOCK_TASK_HFCLKSTOP task cannot be set when the high-frequency clock is not running.
154 typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
165 } nrf_clock_task_t; /*lint -restore */
170 typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
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H A Dnrf_spi.h2 * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
61 /*lint -save -e30*/
63 /*lint -restore*/
96 NRF_SPI_MODE_0, ///< SCK active high, sample on leading edge of clock.
97 NRF_SPI_MODE_1, ///< SCK active high, sample on trailing edge of clock.
225 * @param[in] frequency SPI frequency.
228 nrf_spi_frequency_t frequency);
269 p_reg->INTENSET = spi_int_mask; in nrf_spi_int_enable()
275 p_reg->INTENCLR = spi_int_mask; in nrf_spi_int_disable()
281 return (bool)(p_reg->INTENSET & spi_int); in nrf_spi_int_enable_check()
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H A Dnrf_spim.h2 * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
60 * switched from low to high after this number of bytes is transmitted
77 /*lint -save -e30*/
82 /*lint -restore*/
90 /*lint -save -e30*/
96 /*lint -restore*/
152 NRF_SPIM_MODE_0, ///< SCK active high, sample on leading edge of clock.
153 NRF_SPIM_MODE_1, ///< SCK active high, sample on trailing edge of clock.
173 NRF_SPIM_CSN_POL_LOW = SPIM_CSNPOL_CSNPOL_LOW, ///< Active low (idle state high).
174 NRF_SPIM_CSN_POL_HIGH = SPIM_CSNPOL_CSNPOL_HIGH ///< Active high (idle state low).
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/nrf52832-nimble/nordic/nrfx/drivers/include/
H A Dnrfx_clock.h2 * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
115 * @brief Function for starting the high-accuracy source HFCLK.
120 * @brief Function for stoping external high-accuracy source HFCLK.
139 …* @retval NRFX_ERROR_INVALID_STATE If the low-frequency of high-frequency clock is …
H A Dnrfx_gpiote.h2 * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
56 bool hi_accuracy : 1; /**< True when high accuracy (IN_EVENT) is used. */
60 /**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect low-to-high transiti…
70 /**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect high-to-low transiti…
90 /**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect low-to-high transiti…
102 /**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect high-to-low transiti…
142 /**@brief Macro for configuring a pin to use the GPIO OUT TASK to change the state from high to low.
151 /**@brief Macro for configuring a pin to use the GPIO OUT TASK to change the state from low to high.
301 * - lower accuracy but low power (high frequency clock not needed)
302 * - higher accuracy (high frequency clock required)
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H A Dnrfx_spi.h2 * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
103 * If the signal should be active high,
106 uint8_t orc; ///< Over-run character.
109 nrf_spi_frequency_t frequency; ///< SPI frequency. member
125 .frequency = NRF_SPI_FREQ_4M, \
H A Dnrfx_spim.h2 * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
107 uint8_t orc; ///< Over-run character.
110 nrf_spim_frequency_t frequency; ///< SPI frequency. member
154 .frequency = NRF_SPIM_FREQ_4M, \
267 * - @ref NRFX_SPIM_FLAG_TX_POSTINC and @ref NRFX_SPIM_FLAG_RX_POSTINC<span></span>:
268 * Post-incrementation of buffer addresses. Supported only by SPIM.
269 * - @ref NRFX_SPIM_FLAG_HOLD_XFER<span></span>: Driver is not starting the transfer. Use this
272 * - @ref NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER<span></span>: No user event handler after transfer
279 * - @ref NRFX_SPIM_FLAG_REPEATED_XFER<span></span>: Prepare for repeated transfers. You can set
324 * of command bytes and high during transmission of data bytes.
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H A Dnrfx_rtc.h2 * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA
167 * - The maximum preemption time in ticks (8 - bit value) is known and is less than 7.7 ms
168 * (for prescaler = 0, RTC frequency 32 kHz).
169 …* - The requested absolute compare value is not bigger than (0x00FFFFFF) - tick_latency. I…
237 * When a stack (for example SoftDevice) is used and it occupies high priority interrupts,
311 *p_mask = nrf_rtc_int_get(p_instance->p_reg); in nrfx_rtc_int_disable()
312 nrf_rtc_int_disable(p_instance->p_reg, NRF_RTC_INT_TICK_MASK | in nrfx_rtc_int_disable()
322 nrf_rtc_int_enable(p_instance->p_reg, mask); in nrfx_rtc_int_enable()
327 return nrf_rtc_counter_get(p_instance->p_reg); in nrfx_rtc_counter_get()
332 nrf_rtc_task_trigger(p_instance->p_reg, NRF_RTC_TASK_CLEAR); in nrfx_rtc_counter_clear()
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/nrf52832-nimble/packages/NimBLE-latest/docs/
H A Dindex.rst2 ----------------
4 Apache Mynewt offers the world's first fully open-source Bluetooth Low
10 countries. It uses a spread spectrum, frequency hopping, full-duplex
11 signal. BLE FHSS employs 40 2-MHz-wide channels to ensure greater
12 reliability over longer distances. It also features 0-dBm (1 mW) power
38 - LE Advertising Extensions
39 - 2Msym/s PHY for higher throughput
40 - Coded PHY for LE Long Range
41 - High Duty Cycle Non-Connectable Advertising
42 - Channel Selection Algorithm #2 to utilize channels in more efficient
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/nrf52832-nimble/packages/NimBLE-latest/porting/nimble/include/os/
H A Dos_cputime.h10 * http://www.apache.org/licenses/LICENSE-2.0
23 * @defgroup OSCPUTime High Resolution Timers
39 * NOTE: these definitions allow one to override the cputime frequency used.
43 * For those who want a different cputime frequency, you can set the config
44 * definition for OS_CPUTIME_FREQ to the desired frequency in your project,
88 #define CPUTIME_LT(__t1, __t2) ((int32_t) ((__t1) - (__t2)) < 0)
90 #define CPUTIME_GT(__t1, __t2) ((int32_t) ((__t1) - (__t2)) > 0)
92 #define CPUTIME_GEQ(__t1, __t2) ((int32_t) ((__t1) - (__t2)) >= 0)
94 #define CPUTIME_LEQ(__t1, __t2) ((int32_t) ((__t1) - (__t2)) <= 0)
101 * @param clock_freq The desired cputime frequency, in hertz (Hz).
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/nrf52832-nimble/rt-thread/src/
H A DKconfig1 menu "RT-Thread Kernel"
15 This option should be selected by machines which have an SMP-
17 The only effect of this option is to make the SMP-related
54 int "Tick frequency, Hz"
58 System's tick frequency, Hz.
96 the timeout function context of soft-timer is under a high priority timer
198 menu "Inter-Thread communication"
323 RT-Thread version number
/nrf52832-nimble/nordic/nrfx/mdk/
H A Dnrf51_bitfields.h3 Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
399 /* Description: High frequency clock status. */
423 /* Description: Low frequency clock status. */
466 /* Description: Crystal frequency. */
468 /* Bits 7..0 : External Xtal frequency selection. */
526 /* Description: Pre-programmed factory code present. */
528 /* Bits 7..0 : Pre-programmed factory code present. */
537 /* Bits 31..16 : Firmware Identification Number pre-loaded into the flash. */
580 #define GPIO_OUT_PIN31_High (1UL) /*!< Pin driver is high. */
586 #define GPIO_OUT_PIN30_High (1UL) /*!< Pin driver is high. */
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H A Dnrf51.svd1 <?xml version="1.0" encoding="utf-8"?>
2 <!-- File naming: <vendor>_<part/series name>_svd.xml -->
3 …rsion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" noNamespaceSchemaLocation="CMSIS-
4 <vendor>Nordic Semiconductor</vendor> <!-- Name for Doxygroup -->
5 <vendorID>Nordic</vendorID> <!-- Vendor ID -->
6 …1</name> <!-- Official name of part or part series -->
8 … <!-- Version of this description. It is the run of the automatic g…
9 …<description>nRF51 reference description for radio MCU with ARM 32-bit Cortex-M0 Microcontroller a…
11 Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.\n
40 <!-- Register Properties Group -->
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H A Dnrf52_bitfields.h3 Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
122 /* Bits 31..0 : Pointer to the resolvable address (6-bytes) */
1011 #define CCM_MODE_LENGTH_Default (0UL) /*!< Default length. Effective length of LENGTH field is 5-bi…
1012 #define CCM_MODE_LENGTH_Extended (1UL) /*!< Extended length. Effective length of LENGTH field is 8-
1050 /* Bits 31..0 : Pointer to a scratch data area used for temporary storage during key-stream generat…
1191 #define CLOCK_LFCLKSRC_BYPASS_Disabled (0UL) /*!< Disable (use with Xtal or low-swing external sour…
1192 #define CLOCK_LFCLKSRC_BYPASS_Enabled (1UL) /*!< Enable (use with rail-to-rail external source) */
1214 #define CLOCK_TRACECONFIG_TRACEMUX_GPIO (0UL) /*!< GPIOs multiplexed onto all trace-pins */
1358 #define COMP_RESULT_RESULT_Below (0UL) /*!< Input voltage is below the threshold (VIN+ &lt; VIN-) */
1359 #define COMP_RESULT_RESULT_Above (1UL) /*!< Input voltage is above the threshold (VIN+ &gt; VIN-) */
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H A Dnrf52810_bitfields.h3 Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
157 /* Bits 31..0 : Pointer to the resolvable address (6-bytes) */
480 /* Description: Start generation of key-stream. This operation will stop by itself when completed. …
508 /* Description: Key-stream generation complete */
522 /* Description: Deprecated register - CCM error event */
609 …ective length of LENGTH field in encrypted/decrypted packet is 5 bits. A key-stream for packet pay…
610 …ective length of LENGTH field in encrypted/decrypted packet is 8 bits. A key-stream for packet pay…
650 /* Bits 31..0 : Pointer to a scratch data area used for temporary storage during key-stream generat…
656 /* Description: Length of key-stream generated when MODE.LENGTH = Extended. */
658 /* Bits 7..0 : Length of key-stream generated when MODE.LENGTH = Extended. This value must be great…
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H A Dnrf52840_bitfields.h3 Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
157 /* Bits 31..0 : Pointer to the resolvable address (6-bytes) */
173 /* Description: Description cluster[n]: Configure the word-aligned start address of region n to pro…
175 /* Bits 31..0 : Valid word-aligned start address of region n to protect. Address must point to a fl…
206 /* Description: Start generation of key-stream. This operation will stop by itself when completed. …
234 /* Description: Key-stream generation complete */
248 /* Description: Deprecated register - CCM error event */
335 …ective length of LENGTH field in encrypted/decrypted packet is 5 bits. A key-stream for packet pay…
336 …ective length of LENGTH field in encrypted/decrypted packet is 8 bits. A key-stream for packet pay…
376 /* Bits 31..0 : Pointer to a scratch data area used for temporary storage during key-stream generat…
[all …]
H A Dnrf52.svd1 <?xml version="1.0" encoding="utf-8"?>
2 <!-- File naming: <vendor>_<part/series name>_svd.xml -->
3 …rsion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" noNamespaceSchemaLocation="CMSIS-
9 …<description>nRF52832 reference description for radio MCU with ARM 32-bit Cortex-M4 Microcontrolle…
11 Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.\n
77 <access>read-only</access>
92 <access>read-only</access>
109 <access>read-only</access>
126 <access>read-only</access>
143 <access>read-only</access>
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H A Dnrf52810.svd1 <?xml version="1.0" encoding="utf-8"?>
2 <!-- File naming: <vendor>_<part/series name>_svd.xml -->
3 …rsion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" noNamespaceSchemaLocation="CMSIS-
9 …<description>nRF52810 reference description for radio MCU with ARM 32-bit Cortex-M4 Microcontrolle…
11 Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.\n
77 <access>read-only</access>
92 <access>read-only</access>
109 <access>read-only</access>
126 <access>read-only</access>
143 <access>read-only</access>
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H A Dnrf9160_bitfields.h3 Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
254 #define CLOCK_HFCLKSTAT_SRC_HFXO (1UL) /*!< HFXO - 64 MHz clock derived from external 32 MHz crysta…
1250 #define FICR_INFO_PACKAGE_PACKAGE_CC (0x2000UL) /*!< CCxx - 236 ball wlCSP */
1375 …ollection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high. */
1377 /* Bit 0 : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high. */
1612 …TE_CONFIG_OUTINIT_High (1UL) /*!< Task mode: Initial value of pin before task triggering is high */
1635 /* Description: Inter-IC Sound 0 */
1680 /* Description: The RXD.PTR register has been copied to internal double-buffers.
1683 /* Bit 0 : The RXD.PTR register has been copied to internal double-buffers.
1700 /* Description: The TDX.PTR register has been copied to internal double-buffers.
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/nrf52832-nimble/packages/NimBLE-latest/nimble/controller/
H A Dsyscfg.yml9 # http://www.apache.org/licenses/LICENSE-2.0
187 The settling time of the high-frequency oscillator. This is
285 chip specific location. If non-zero, this address will
296 This options enables controller to send a vendor-specific event on
/nrf52832-nimble/packages/NimBLE-latest/nimble/drivers/nrf52/src/
H A Dble_phy.c10 * http://www.apache.org/licenses/LICENSE-2.0
45 * Pre-programmed channels: CH20, CH21, CH23, CH25, CH31
47 * - CH4 = cancel wfr timer on address match
48 * - CH5 = disable radio on wfr timer expiry
49 * - CH17 = (optional) gpio debug for radio ramp-up
50 * - CH18 = (optional) gpio debug for wfr timer RX enabled
51 * - CH19 = (optional) gpio debug for wfr timer radio disabled
86 #define NRF_TX_PWR_MIN_DBM (-40)
88 /* NRF_RADIO->PCNF0 configuration values */
133 /* Make sure word-aligned for faster copies */
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/nrf52832-nimble/nordic/nrfx/templates/nRF52810/
H A Dnrfx_config.h8 // <e> NRFX_CLOCK_ENABLED - nrfx_clock - CLOCK peripheral driver
13 // <o> NRFX_CLOCK_CONFIG_LF_SRC - LF Clock Source
25 // <q> NRFX_CLOCK_CONFIG_LF_CAL_ENABLED - Enables LF Clock Calibration Support
31 // <o> NRFX_CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority
46 // <e> NRFX_CLOCK_CONFIG_LOG_ENABLED - Enables logging in the module.
51 // <o> NRFX_CLOCK_CONFIG_LOG_LEVEL - Default Severity level
63 // <o> NRFX_CLOCK_CONFIG_INFO_COLOR - ANSI escape code prefix.
79 // <o> NRFX_CLOCK_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
99 // <e> NRFX_COMP_ENABLED - nrfx_comp - COMP peripheral driver
104 // <o> NRFX_COMP_CONFIG_REF - Reference voltage
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/nrf52832-nimble/drivers/
H A Dnrfx_config.h8 // <e> NRFX_CLOCK_ENABLED - nrfx_clock - CLOCK peripheral driver
13 // <o> NRFX_CLOCK_CONFIG_LF_SRC - LF Clock Source
25 // <q> NRFX_CLOCK_CONFIG_LF_CAL_ENABLED - Enables LF Clock Calibration Support
31 // <o> NRFX_CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority
46 // <e> NRFX_CLOCK_CONFIG_LOG_ENABLED - Enables logging in the module.
51 // <o> NRFX_CLOCK_CONFIG_LOG_LEVEL - Default Severity level
63 // <o> NRFX_CLOCK_CONFIG_INFO_COLOR - ANSI escape code prefix.
79 // <o> NRFX_CLOCK_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
99 // <e> NRFX_COMP_ENABLED - nrfx_comp - COMP peripheral driver
104 // <o> NRFX_COMP_CONFIG_REF - Reference voltage
[all …]
/nrf52832-nimble/nordic/nrfx/templates/nRF52832/
H A Dnrfx_config.h8 // <e> NRFX_CLOCK_ENABLED - nrfx_clock - CLOCK peripheral driver
13 // <o> NRFX_CLOCK_CONFIG_LF_SRC - LF Clock Source
25 // <q> NRFX_CLOCK_CONFIG_LF_CAL_ENABLED - Enables LF Clock Calibration Support
31 // <o> NRFX_CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority
46 // <e> NRFX_CLOCK_CONFIG_LOG_ENABLED - Enables logging in the module.
51 // <o> NRFX_CLOCK_CONFIG_LOG_LEVEL - Default Severity level
63 // <o> NRFX_CLOCK_CONFIG_INFO_COLOR - ANSI escape code prefix.
79 // <o> NRFX_CLOCK_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
99 // <e> NRFX_COMP_ENABLED - nrfx_comp - COMP peripheral driver
104 // <o> NRFX_COMP_CONFIG_REF - Reference voltage
[all …]
/nrf52832-nimble/nordic/nrfx/templates/nRF51/
H A Dnrfx_config.h8 // <e> NRFX_ADC_ENABLED - nrfx_adc - ADC peripheral driver
13 // <o> NRFX_ADC_CONFIG_IRQ_PRIORITY - Interrupt priority
24 // <e> NRFX_ADC_CONFIG_LOG_ENABLED - Enables logging in the module.
29 // <o> NRFX_ADC_CONFIG_LOG_LEVEL - Default Severity level
41 // <o> NRFX_ADC_CONFIG_INFO_COLOR - ANSI escape code prefix.
57 // <o> NRFX_ADC_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
77 // <e> NRFX_CLOCK_ENABLED - nrfx_clock - CLOCK peripheral driver
82 // <o> NRFX_CLOCK_CONFIG_LF_SRC - LF Clock Source
92 // <q> NRFX_CLOCK_CONFIG_LF_CAL_ENABLED - Enables LF Clock Calibration Support
98 // <o> NRFX_CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority
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