xref: /nrf52832-nimble/nordic/nrfx/drivers/include/nrfx_gpiote.h (revision 150812a83cab50279bd772ef6db1bfaf255f2c5b)
1*150812a8SEvalZero /*
2*150812a8SEvalZero  * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
3*150812a8SEvalZero  * All rights reserved.
4*150812a8SEvalZero  *
5*150812a8SEvalZero  * Redistribution and use in source and binary forms, with or without
6*150812a8SEvalZero  * modification, are permitted provided that the following conditions are met:
7*150812a8SEvalZero  *
8*150812a8SEvalZero  * 1. Redistributions of source code must retain the above copyright notice, this
9*150812a8SEvalZero  *    list of conditions and the following disclaimer.
10*150812a8SEvalZero  *
11*150812a8SEvalZero  * 2. Redistributions in binary form must reproduce the above copyright
12*150812a8SEvalZero  *    notice, this list of conditions and the following disclaimer in the
13*150812a8SEvalZero  *    documentation and/or other materials provided with the distribution.
14*150812a8SEvalZero  *
15*150812a8SEvalZero  * 3. Neither the name of the copyright holder nor the names of its
16*150812a8SEvalZero  *    contributors may be used to endorse or promote products derived from this
17*150812a8SEvalZero  *    software without specific prior written permission.
18*150812a8SEvalZero  *
19*150812a8SEvalZero  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20*150812a8SEvalZero  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21*150812a8SEvalZero  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22*150812a8SEvalZero  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23*150812a8SEvalZero  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24*150812a8SEvalZero  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25*150812a8SEvalZero  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26*150812a8SEvalZero  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27*150812a8SEvalZero  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28*150812a8SEvalZero  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29*150812a8SEvalZero  * POSSIBILITY OF SUCH DAMAGE.
30*150812a8SEvalZero  */
31*150812a8SEvalZero 
32*150812a8SEvalZero #ifndef NRFX_GPIOTE_H__
33*150812a8SEvalZero #define NRFX_GPIOTE_H__
34*150812a8SEvalZero 
35*150812a8SEvalZero #include <nrfx.h>
36*150812a8SEvalZero #include <hal/nrf_gpiote.h>
37*150812a8SEvalZero #include <hal/nrf_gpio.h>
38*150812a8SEvalZero 
39*150812a8SEvalZero #ifdef __cplusplus
40*150812a8SEvalZero extern "C" {
41*150812a8SEvalZero #endif
42*150812a8SEvalZero 
43*150812a8SEvalZero /**
44*150812a8SEvalZero  * @defgroup nrfx_gpiote GPIOTE driver
45*150812a8SEvalZero  * @{
46*150812a8SEvalZero  * @ingroup nrf_gpiote
47*150812a8SEvalZero  * @brief   GPIOTE peripheral driver.
48*150812a8SEvalZero  */
49*150812a8SEvalZero 
50*150812a8SEvalZero /**@brief Input pin configuration. */
51*150812a8SEvalZero typedef struct
52*150812a8SEvalZero {
53*150812a8SEvalZero     nrf_gpiote_polarity_t sense;               /**< Transition that triggers interrupt. */
54*150812a8SEvalZero     nrf_gpio_pin_pull_t   pull;                /**< Pulling mode. */
55*150812a8SEvalZero     bool                  is_watcher      : 1; /**< True when the input pin is tracking an output pin. */
56*150812a8SEvalZero     bool                  hi_accuracy     : 1; /**< True when high accuracy (IN_EVENT) is used. */
57*150812a8SEvalZero     bool                  skip_gpio_setup : 1; /**< Do not change GPIO configuration */
58*150812a8SEvalZero } nrfx_gpiote_in_config_t;
59*150812a8SEvalZero 
60*150812a8SEvalZero /**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect low-to-high transition.
61*150812a8SEvalZero  * @details Set hi_accu to true to use IN_EVENT. */
62*150812a8SEvalZero #define NRFX_GPIOTE_CONFIG_IN_SENSE_LOTOHI(hi_accu) \
63*150812a8SEvalZero     {                                               \
64*150812a8SEvalZero         .is_watcher = false,                        \
65*150812a8SEvalZero         .hi_accuracy = hi_accu,                     \
66*150812a8SEvalZero         .pull = NRF_GPIO_PIN_NOPULL,                \
67*150812a8SEvalZero         .sense = NRF_GPIOTE_POLARITY_LOTOHI,        \
68*150812a8SEvalZero     }
69*150812a8SEvalZero 
70*150812a8SEvalZero /**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect high-to-low transition.
71*150812a8SEvalZero  * @details Set hi_accu to true to use IN_EVENT. */
72*150812a8SEvalZero #define NRFX_GPIOTE_CONFIG_IN_SENSE_HITOLO(hi_accu) \
73*150812a8SEvalZero     {                                               \
74*150812a8SEvalZero         .is_watcher = false,                        \
75*150812a8SEvalZero         .hi_accuracy = hi_accu,                     \
76*150812a8SEvalZero         .pull = NRF_GPIO_PIN_NOPULL,                \
77*150812a8SEvalZero         .sense = NRF_GPIOTE_POLARITY_HITOLO,        \
78*150812a8SEvalZero     }
79*150812a8SEvalZero 
80*150812a8SEvalZero /**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect any change on the pin.
81*150812a8SEvalZero  * @details Set hi_accu to true to use IN_EVENT.*/
82*150812a8SEvalZero #define NRFX_GPIOTE_CONFIG_IN_SENSE_TOGGLE(hi_accu) \
83*150812a8SEvalZero     {                                               \
84*150812a8SEvalZero         .is_watcher = false,                        \
85*150812a8SEvalZero         .hi_accuracy = hi_accu,                     \
86*150812a8SEvalZero         .pull = NRF_GPIO_PIN_NOPULL,                \
87*150812a8SEvalZero         .sense = NRF_GPIOTE_POLARITY_TOGGLE,        \
88*150812a8SEvalZero     }
89*150812a8SEvalZero 
90*150812a8SEvalZero /**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect low-to-high transition.
91*150812a8SEvalZero  * @details Set hi_accu to true to use IN_EVENT.
92*150812a8SEvalZero  * @note This macro prepares configuration that skips GPIO setup. */
93*150812a8SEvalZero #define NRFX_GPIOTE_RAW_CONFIG_IN_SENSE_LOTOHI(hi_accu) \
94*150812a8SEvalZero     {                                               \
95*150812a8SEvalZero         .is_watcher = false,                        \
96*150812a8SEvalZero         .hi_accuracy = hi_accu,                     \
97*150812a8SEvalZero         .pull = NRF_GPIO_PIN_NOPULL,                \
98*150812a8SEvalZero         .sense = NRF_GPIOTE_POLARITY_LOTOHI,        \
99*150812a8SEvalZero         .skip_gpio_setup = true,                    \
100*150812a8SEvalZero     }
101*150812a8SEvalZero 
102*150812a8SEvalZero /**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect high-to-low transition.
103*150812a8SEvalZero  * @details Set hi_accu to true to use IN_EVENT.
104*150812a8SEvalZero  * @note This macro prepares configuration that skips GPIO setup. */
105*150812a8SEvalZero #define NRFX_GPIOTE_RAW_CONFIG_IN_SENSE_HITOLO(hi_accu) \
106*150812a8SEvalZero     {                                               \
107*150812a8SEvalZero         .is_watcher = false,                        \
108*150812a8SEvalZero         .hi_accuracy = hi_accu,                     \
109*150812a8SEvalZero         .pull = NRF_GPIO_PIN_NOPULL,                \
110*150812a8SEvalZero         .sense = NRF_GPIOTE_POLARITY_HITOLO,        \
111*150812a8SEvalZero         .skip_gpio_setup = true,                    \
112*150812a8SEvalZero     }
113*150812a8SEvalZero 
114*150812a8SEvalZero /**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect any change on the pin.
115*150812a8SEvalZero  * @details Set hi_accu to true to use IN_EVENT.
116*150812a8SEvalZero  * @note This macro prepares configuration that skips GPIO setup. */
117*150812a8SEvalZero #define NRFX_GPIOTE_RAW_CONFIG_IN_SENSE_TOGGLE(hi_accu) \
118*150812a8SEvalZero     {                                               \
119*150812a8SEvalZero         .is_watcher = false,                        \
120*150812a8SEvalZero         .hi_accuracy = hi_accu,                     \
121*150812a8SEvalZero         .pull = NRF_GPIO_PIN_NOPULL,                \
122*150812a8SEvalZero         .sense = NRF_GPIOTE_POLARITY_TOGGLE,        \
123*150812a8SEvalZero         .skip_gpio_setup = true,                    \
124*150812a8SEvalZero     }
125*150812a8SEvalZero 
126*150812a8SEvalZero 
127*150812a8SEvalZero /**@brief Output pin configuration. */
128*150812a8SEvalZero typedef struct
129*150812a8SEvalZero {
130*150812a8SEvalZero     nrf_gpiote_polarity_t action;     /**< Configuration of the pin task. */
131*150812a8SEvalZero     nrf_gpiote_outinit_t  init_state; /**< Initial state of the output pin. */
132*150812a8SEvalZero     bool                  task_pin;   /**< True if the pin is controlled by a GPIOTE task. */
133*150812a8SEvalZero } nrfx_gpiote_out_config_t;
134*150812a8SEvalZero 
135*150812a8SEvalZero /**@brief Macro for configuring a pin to use as output. GPIOTE is not used for the pin. */
136*150812a8SEvalZero #define NRFX_GPIOTE_CONFIG_OUT_SIMPLE(init_high)                                                \
137*150812a8SEvalZero     {                                                                                           \
138*150812a8SEvalZero         .init_state = init_high ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW, \
139*150812a8SEvalZero         .task_pin = false,                                                                      \
140*150812a8SEvalZero     }
141*150812a8SEvalZero 
142*150812a8SEvalZero /**@brief Macro for configuring a pin to use the GPIO OUT TASK to change the state from high to low.
143*150812a8SEvalZero  * @details The task will clear the pin. Therefore, the pin is set initially.  */
144*150812a8SEvalZero #define NRFX_GPIOTE_CONFIG_OUT_TASK_LOW              \
145*150812a8SEvalZero     {                                                \
146*150812a8SEvalZero         .init_state = NRF_GPIOTE_INITIAL_VALUE_HIGH, \
147*150812a8SEvalZero         .task_pin   = true,                          \
148*150812a8SEvalZero         .action     = NRF_GPIOTE_POLARITY_HITOLO,    \
149*150812a8SEvalZero     }
150*150812a8SEvalZero 
151*150812a8SEvalZero /**@brief Macro for configuring a pin to use the GPIO OUT TASK to change the state from low to high.
152*150812a8SEvalZero  * @details The task will set the pin. Therefore, the pin is cleared initially.  */
153*150812a8SEvalZero #define NRFX_GPIOTE_CONFIG_OUT_TASK_HIGH            \
154*150812a8SEvalZero     {                                               \
155*150812a8SEvalZero         .init_state = NRF_GPIOTE_INITIAL_VALUE_LOW, \
156*150812a8SEvalZero         .task_pin   = true,                         \
157*150812a8SEvalZero         .action     = NRF_GPIOTE_POLARITY_LOTOHI,   \
158*150812a8SEvalZero     }
159*150812a8SEvalZero 
160*150812a8SEvalZero /**@brief Macro for configuring a pin to use the GPIO OUT TASK to toggle the pin state.
161*150812a8SEvalZero  * @details The initial pin state must be provided.  */
162*150812a8SEvalZero #define NRFX_GPIOTE_CONFIG_OUT_TASK_TOGGLE(init_high)                                           \
163*150812a8SEvalZero     {                                                                                           \
164*150812a8SEvalZero         .init_state = init_high ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW, \
165*150812a8SEvalZero         .task_pin   = true,                                                                     \
166*150812a8SEvalZero         .action     = NRF_GPIOTE_POLARITY_TOGGLE,                                               \
167*150812a8SEvalZero     }
168*150812a8SEvalZero 
169*150812a8SEvalZero /** @brief Pin. */
170*150812a8SEvalZero typedef uint32_t nrfx_gpiote_pin_t;
171*150812a8SEvalZero 
172*150812a8SEvalZero /**
173*150812a8SEvalZero  * @brief Pin event handler prototype.
174*150812a8SEvalZero  *
175*150812a8SEvalZero  * @param pin    Pin that triggered this event.
176*150812a8SEvalZero  * @param action Action that lead to triggering this event.
177*150812a8SEvalZero  */
178*150812a8SEvalZero typedef void (*nrfx_gpiote_evt_handler_t)(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action);
179*150812a8SEvalZero 
180*150812a8SEvalZero /**
181*150812a8SEvalZero  * @brief Function for initializing the GPIOTE module.
182*150812a8SEvalZero  *
183*150812a8SEvalZero  * @details Only static configuration is supported to prevent the shared
184*150812a8SEvalZero  * resource being customized by the initiator.
185*150812a8SEvalZero  *
186*150812a8SEvalZero  * @retval NRFX_SUCCESS             If initialization was successful.
187*150812a8SEvalZero  * @retval NRFX_ERROR_INVALID_STATE If the driver was already initialized.
188*150812a8SEvalZero  */
189*150812a8SEvalZero nrfx_err_t nrfx_gpiote_init(void);
190*150812a8SEvalZero 
191*150812a8SEvalZero /**
192*150812a8SEvalZero  * @brief Function for checking if the GPIOTE module is initialized.
193*150812a8SEvalZero  *
194*150812a8SEvalZero  * @details The GPIOTE module is a shared module. Therefore, you should check if
195*150812a8SEvalZero  * the module is already initialized and skip initialization if it is.
196*150812a8SEvalZero  *
197*150812a8SEvalZero  * @retval true  If the module is already initialized.
198*150812a8SEvalZero  * @retval false If the module is not initialized.
199*150812a8SEvalZero  */
200*150812a8SEvalZero bool nrfx_gpiote_is_init(void);
201*150812a8SEvalZero 
202*150812a8SEvalZero /**
203*150812a8SEvalZero  * @brief Function for uninitializing the GPIOTE module.
204*150812a8SEvalZero  */
205*150812a8SEvalZero void nrfx_gpiote_uninit(void);
206*150812a8SEvalZero 
207*150812a8SEvalZero /**
208*150812a8SEvalZero  * @brief Function for initializing a GPIOTE output pin.
209*150812a8SEvalZero  * @details The output pin can be controlled by the CPU or by PPI. The initial
210*150812a8SEvalZero  * configuration specifies which mode is used. If PPI mode is used, the driver
211*150812a8SEvalZero  * attempts to allocate one of the available GPIOTE channels. If no channel is
212*150812a8SEvalZero  * available, an error is returned.
213*150812a8SEvalZero  *
214*150812a8SEvalZero  * @param[in] pin      Pin.
215*150812a8SEvalZero  * @param[in] p_config Initial configuration.
216*150812a8SEvalZero  *
217*150812a8SEvalZero  * @retval NRFX_SUCCESS             If initialization was successful.
218*150812a8SEvalZero  * @retval NRFX_ERROR_INVALID_STATE If the driver is not initialized or the pin is already used.
219*150812a8SEvalZero  * @retval NRFX_ERROR_NO_MEM        If no GPIOTE channel is available.
220*150812a8SEvalZero  */
221*150812a8SEvalZero nrfx_err_t nrfx_gpiote_out_init(nrfx_gpiote_pin_t                pin,
222*150812a8SEvalZero                                 nrfx_gpiote_out_config_t const * p_config);
223*150812a8SEvalZero 
224*150812a8SEvalZero /**
225*150812a8SEvalZero  * @brief Function for uninitializing a GPIOTE output pin.
226*150812a8SEvalZero  * @details The driver frees the GPIOTE channel if the output pin was using one.
227*150812a8SEvalZero  *
228*150812a8SEvalZero  * @param[in] pin Pin.
229*150812a8SEvalZero  */
230*150812a8SEvalZero void nrfx_gpiote_out_uninit(nrfx_gpiote_pin_t pin);
231*150812a8SEvalZero 
232*150812a8SEvalZero /**
233*150812a8SEvalZero  * @brief Function for setting a GPIOTE output pin.
234*150812a8SEvalZero  *
235*150812a8SEvalZero  * @param[in] pin Pin.
236*150812a8SEvalZero  */
237*150812a8SEvalZero void nrfx_gpiote_out_set(nrfx_gpiote_pin_t pin);
238*150812a8SEvalZero 
239*150812a8SEvalZero /**
240*150812a8SEvalZero  * @brief Function for clearing a GPIOTE output pin.
241*150812a8SEvalZero  *
242*150812a8SEvalZero  * @param[in] pin Pin.
243*150812a8SEvalZero  */
244*150812a8SEvalZero void nrfx_gpiote_out_clear(nrfx_gpiote_pin_t pin);
245*150812a8SEvalZero 
246*150812a8SEvalZero /**
247*150812a8SEvalZero  * @brief Function for toggling a GPIOTE output pin.
248*150812a8SEvalZero  *
249*150812a8SEvalZero  * @param[in] pin Pin.
250*150812a8SEvalZero  */
251*150812a8SEvalZero void nrfx_gpiote_out_toggle(nrfx_gpiote_pin_t pin);
252*150812a8SEvalZero 
253*150812a8SEvalZero /**
254*150812a8SEvalZero  * @brief Function for enabling a GPIOTE output pin task.
255*150812a8SEvalZero  *
256*150812a8SEvalZero  * @param[in] pin Pin.
257*150812a8SEvalZero  */
258*150812a8SEvalZero void nrfx_gpiote_out_task_enable(nrfx_gpiote_pin_t pin);
259*150812a8SEvalZero 
260*150812a8SEvalZero /**
261*150812a8SEvalZero  * @brief Function for disabling a GPIOTE output pin task.
262*150812a8SEvalZero  *
263*150812a8SEvalZero  * @param[in] pin Pin.
264*150812a8SEvalZero  */
265*150812a8SEvalZero void nrfx_gpiote_out_task_disable(nrfx_gpiote_pin_t pin);
266*150812a8SEvalZero 
267*150812a8SEvalZero /**
268*150812a8SEvalZero  * @brief Function for getting the address of a configurable GPIOTE task.
269*150812a8SEvalZero  *
270*150812a8SEvalZero  * @param[in] pin Pin.
271*150812a8SEvalZero  *
272*150812a8SEvalZero  * @return Address of OUT task.
273*150812a8SEvalZero  */
274*150812a8SEvalZero uint32_t nrfx_gpiote_out_task_addr_get(nrfx_gpiote_pin_t pin);
275*150812a8SEvalZero 
276*150812a8SEvalZero #if defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__NRFX_DOXYGEN__)
277*150812a8SEvalZero /**
278*150812a8SEvalZero  * @brief Function for getting the address of a configurable GPIOTE task.
279*150812a8SEvalZero  *
280*150812a8SEvalZero  * @param[in] pin Pin.
281*150812a8SEvalZero  *
282*150812a8SEvalZero  * @return Address of SET task.
283*150812a8SEvalZero  */
284*150812a8SEvalZero uint32_t nrfx_gpiote_set_task_addr_get(nrfx_gpiote_pin_t pin);
285*150812a8SEvalZero #endif // defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__NRFX_DOXYGEN__)
286*150812a8SEvalZero 
287*150812a8SEvalZero #if defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__)
288*150812a8SEvalZero /**
289*150812a8SEvalZero  * @brief Function for getting the address of a configurable GPIOTE task.
290*150812a8SEvalZero  *
291*150812a8SEvalZero  * @param[in] pin Pin.
292*150812a8SEvalZero  *
293*150812a8SEvalZero  * @return Address of CLR task.
294*150812a8SEvalZero  */
295*150812a8SEvalZero uint32_t nrfx_gpiote_clr_task_addr_get(nrfx_gpiote_pin_t pin);
296*150812a8SEvalZero #endif // defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__)
297*150812a8SEvalZero 
298*150812a8SEvalZero /**
299*150812a8SEvalZero  * @brief Function for initializing a GPIOTE input pin.
300*150812a8SEvalZero  * @details The input pin can act in two ways:
301*150812a8SEvalZero  * - lower accuracy but low power (high frequency clock not needed)
302*150812a8SEvalZero  * - higher accuracy (high frequency clock required)
303*150812a8SEvalZero  *
304*150812a8SEvalZero  * The initial configuration specifies which mode is used.
305*150812a8SEvalZero  * If high-accuracy mode is used, the driver attempts to allocate one
306*150812a8SEvalZero  * of the available GPIOTE channels. If no channel is
307*150812a8SEvalZero  * available, an error is returned.
308*150812a8SEvalZero  * In low accuracy mode SENSE feature is used. In this case only one active pin
309*150812a8SEvalZero  * can be detected at a time. It can be worked around by setting all of the used
310*150812a8SEvalZero  * low accuracy pins to toggle mode.
311*150812a8SEvalZero  * For more information about SENSE functionality, refer to Product Specification.
312*150812a8SEvalZero  *
313*150812a8SEvalZero  * @param[in] pin         Pin.
314*150812a8SEvalZero  * @param[in] p_config    Initial configuration.
315*150812a8SEvalZero  * @param[in] evt_handler User function to be called when the configured transition occurs.
316*150812a8SEvalZero  *
317*150812a8SEvalZero  * @retval NRFX_SUCCESS             If initialization was successful.
318*150812a8SEvalZero  * @retval NRFX_ERROR_INVALID_STATE If the driver is not initialized or the pin is already used.
319*150812a8SEvalZero  * @retval NRFX_ERROR_NO_MEM        If no GPIOTE channel is available.
320*150812a8SEvalZero  */
321*150812a8SEvalZero nrfx_err_t nrfx_gpiote_in_init(nrfx_gpiote_pin_t               pin,
322*150812a8SEvalZero                                nrfx_gpiote_in_config_t const * p_config,
323*150812a8SEvalZero                                nrfx_gpiote_evt_handler_t       evt_handler);
324*150812a8SEvalZero 
325*150812a8SEvalZero /**
326*150812a8SEvalZero  * @brief Function for uninitializing a GPIOTE input pin.
327*150812a8SEvalZero  * @details The driver frees the GPIOTE channel if the input pin was using one.
328*150812a8SEvalZero  *
329*150812a8SEvalZero  * @param[in] pin Pin.
330*150812a8SEvalZero  */
331*150812a8SEvalZero void nrfx_gpiote_in_uninit(nrfx_gpiote_pin_t pin);
332*150812a8SEvalZero 
333*150812a8SEvalZero /**
334*150812a8SEvalZero  * @brief Function for enabling sensing of a GPIOTE input pin.
335*150812a8SEvalZero  *
336*150812a8SEvalZero  * @details If the input pin is configured as high-accuracy pin, the function
337*150812a8SEvalZero  * enables an IN_EVENT. Otherwise, the function enables the GPIO sense mechanism.
338*150812a8SEvalZero  * Note that a PORT event is shared between multiple pins, therefore the
339*150812a8SEvalZero  * interrupt is always enabled.
340*150812a8SEvalZero  *
341*150812a8SEvalZero  * @param[in] pin        Pin.
342*150812a8SEvalZero  * @param[in] int_enable True to enable the interrupt. Always valid for a high-accuracy pin.
343*150812a8SEvalZero  */
344*150812a8SEvalZero void nrfx_gpiote_in_event_enable(nrfx_gpiote_pin_t pin, bool int_enable);
345*150812a8SEvalZero 
346*150812a8SEvalZero /**
347*150812a8SEvalZero  * @brief Function for disabling a GPIOTE input pin.
348*150812a8SEvalZero  *
349*150812a8SEvalZero  * @param[in] pin Pin.
350*150812a8SEvalZero  */
351*150812a8SEvalZero void nrfx_gpiote_in_event_disable(nrfx_gpiote_pin_t pin);
352*150812a8SEvalZero 
353*150812a8SEvalZero /**
354*150812a8SEvalZero  * @brief Function for checking if a GPIOTE input pin is set.
355*150812a8SEvalZero  *
356*150812a8SEvalZero  * @param[in] pin Pin.
357*150812a8SEvalZero  *
358*150812a8SEvalZero  * @retval true  If the input pin is set.
359*150812a8SEvalZero  * @retval false If the input pin is not set.
360*150812a8SEvalZero  */
361*150812a8SEvalZero bool nrfx_gpiote_in_is_set(nrfx_gpiote_pin_t pin);
362*150812a8SEvalZero 
363*150812a8SEvalZero /**
364*150812a8SEvalZero  * @brief Function for getting the address of a GPIOTE input pin event.
365*150812a8SEvalZero  * @details If the pin is configured to use low-accuracy mode, the address of the PORT event is returned.
366*150812a8SEvalZero  *
367*150812a8SEvalZero  * @param[in] pin Pin.
368*150812a8SEvalZero  */
369*150812a8SEvalZero uint32_t nrfx_gpiote_in_event_addr_get(nrfx_gpiote_pin_t pin);
370*150812a8SEvalZero 
371*150812a8SEvalZero /**
372*150812a8SEvalZero  * @brief Function for forcing a specific state on the pin configured as task.
373*150812a8SEvalZero  *
374*150812a8SEvalZero  * @param[in] pin   Pin.
375*150812a8SEvalZero  * @param[in] state Pin state.
376*150812a8SEvalZero  */
377*150812a8SEvalZero void nrfx_gpiote_out_task_force(nrfx_gpiote_pin_t pin, uint8_t state);
378*150812a8SEvalZero 
379*150812a8SEvalZero /**
380*150812a8SEvalZero  * @brief Function for triggering the task OUT manually.
381*150812a8SEvalZero  *
382*150812a8SEvalZero  * @param[in] pin Pin.
383*150812a8SEvalZero  */
384*150812a8SEvalZero void nrfx_gpiote_out_task_trigger(nrfx_gpiote_pin_t pin);
385*150812a8SEvalZero 
386*150812a8SEvalZero #if defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__NRFX_DOXYGEN__)
387*150812a8SEvalZero /**
388*150812a8SEvalZero  * @brief Function for triggering the task SET manually.
389*150812a8SEvalZero  *
390*150812a8SEvalZero  * @param[in] pin Pin.
391*150812a8SEvalZero  */
392*150812a8SEvalZero void nrfx_gpiote_set_task_trigger(nrfx_gpiote_pin_t pin);
393*150812a8SEvalZero #endif // defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__NRFX_DOXYGEN__)
394*150812a8SEvalZero 
395*150812a8SEvalZero #if defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__)
396*150812a8SEvalZero /**
397*150812a8SEvalZero  * @brief Function for triggering the task CLR manually.
398*150812a8SEvalZero  *
399*150812a8SEvalZero  * @param[in] pin Pin.
400*150812a8SEvalZero  */
401*150812a8SEvalZero void nrfx_gpiote_clr_task_trigger(nrfx_gpiote_pin_t pin);
402*150812a8SEvalZero #endif // defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__)
403*150812a8SEvalZero 
404*150812a8SEvalZero 
405*150812a8SEvalZero void nrfx_gpiote_irq_handler(void);
406*150812a8SEvalZero 
407*150812a8SEvalZero 
408*150812a8SEvalZero /** @} */
409*150812a8SEvalZero 
410*150812a8SEvalZero #ifdef __cplusplus
411*150812a8SEvalZero }
412*150812a8SEvalZero #endif
413*150812a8SEvalZero 
414*150812a8SEvalZero #endif // NRFX_GPIOTE_H__
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