1*150812a8SEvalZero /*
2*150812a8SEvalZero * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
3*150812a8SEvalZero * All rights reserved.
4*150812a8SEvalZero *
5*150812a8SEvalZero * Redistribution and use in source and binary forms, with or without
6*150812a8SEvalZero * modification, are permitted provided that the following conditions are met:
7*150812a8SEvalZero *
8*150812a8SEvalZero * 1. Redistributions of source code must retain the above copyright notice, this
9*150812a8SEvalZero * list of conditions and the following disclaimer.
10*150812a8SEvalZero *
11*150812a8SEvalZero * 2. Redistributions in binary form must reproduce the above copyright
12*150812a8SEvalZero * notice, this list of conditions and the following disclaimer in the
13*150812a8SEvalZero * documentation and/or other materials provided with the distribution.
14*150812a8SEvalZero *
15*150812a8SEvalZero * 3. Neither the name of the copyright holder nor the names of its
16*150812a8SEvalZero * contributors may be used to endorse or promote products derived from this
17*150812a8SEvalZero * software without specific prior written permission.
18*150812a8SEvalZero *
19*150812a8SEvalZero * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20*150812a8SEvalZero * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21*150812a8SEvalZero * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22*150812a8SEvalZero * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23*150812a8SEvalZero * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24*150812a8SEvalZero * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25*150812a8SEvalZero * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26*150812a8SEvalZero * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27*150812a8SEvalZero * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28*150812a8SEvalZero * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29*150812a8SEvalZero * POSSIBILITY OF SUCH DAMAGE.
30*150812a8SEvalZero */
31*150812a8SEvalZero
32*150812a8SEvalZero #ifndef NRF_CLOCK_H__
33*150812a8SEvalZero #define NRF_CLOCK_H__
34*150812a8SEvalZero
35*150812a8SEvalZero #include <nrfx.h>
36*150812a8SEvalZero
37*150812a8SEvalZero #ifdef __cplusplus
38*150812a8SEvalZero extern "C" {
39*150812a8SEvalZero #endif
40*150812a8SEvalZero
41*150812a8SEvalZero /**
42*150812a8SEvalZero * @defgroup nrf_clock_hal Clock HAL
43*150812a8SEvalZero * @{
44*150812a8SEvalZero * @ingroup nrf_clock
45*150812a8SEvalZero * @brief Hardware access layer for managing the CLOCK peripheral.
46*150812a8SEvalZero *
47*150812a8SEvalZero * This code can be used to managing low-frequency clock (LFCLK) and the high-frequency clock
48*150812a8SEvalZero * (HFCLK) settings.
49*150812a8SEvalZero */
50*150812a8SEvalZero
51*150812a8SEvalZero #define NRF_CLOCK_TASK_TRIGGER (1UL)
52*150812a8SEvalZero #define NRF_CLOCK_EVENT_CLEAR (0UL)
53*150812a8SEvalZero
54*150812a8SEvalZero #if defined(NRF52810_XXAA) || \
55*150812a8SEvalZero defined(NRF52832_XXAA) || defined(NRF52832_XXAB) || \
56*150812a8SEvalZero defined(NRF52840_XXAA)
57*150812a8SEvalZero // Enable support for external LFCLK sources. Read more in the Product Specification.
58*150812a8SEvalZero #define NRF_CLOCK_USE_EXTERNAL_LFCLK_SOURCES
59*150812a8SEvalZero #endif
60*150812a8SEvalZero
61*150812a8SEvalZero #if defined(CLOCK_CTIV_CTIV_Msk) || defined(__NRFX_DOXYGEN__)
62*150812a8SEvalZero /**
63*150812a8SEvalZero * @brief Presence of the Low Frequency Clock calibration.
64*150812a8SEvalZero *
65*150812a8SEvalZero * In some MCUs there is possibility to use LFCLK calibration.
66*150812a8SEvalZero */
67*150812a8SEvalZero #define NRF_CLOCK_HAS_CALIBRATION 1
68*150812a8SEvalZero #else
69*150812a8SEvalZero #define NRF_CLOCK_HAS_CALIBRATION 0
70*150812a8SEvalZero #endif // defined(CLOCK_CTIV_CTIV_Msk) || defined(__NRFX_DOXYGEN__)
71*150812a8SEvalZero
72*150812a8SEvalZero /**
73*150812a8SEvalZero * @brief Low-frequency clock sources.
74*150812a8SEvalZero * @details Used by LFCLKSRC, LFCLKSTAT, and LFCLKSRCCOPY registers.
75*150812a8SEvalZero */
76*150812a8SEvalZero typedef enum
77*150812a8SEvalZero {
78*150812a8SEvalZero #if defined(CLOCK_LFCLKSRC_SRC_RC) || defined(__NRFX_DOXYGEN__)
79*150812a8SEvalZero NRF_CLOCK_LFCLK_RC = CLOCK_LFCLKSRC_SRC_RC, /**< Internal 32 kHz RC oscillator. */
80*150812a8SEvalZero #else
81*150812a8SEvalZero NRF_CLOCK_LFCLK_RC = CLOCK_LFCLKSRC_SRC_LFRC, /**< Internal 32 kHz RC oscillator. */
82*150812a8SEvalZero #endif
83*150812a8SEvalZero
84*150812a8SEvalZero #if defined(CLOCK_LFCLKSRC_SRC_Xtal) || defined(__NRFX_DOXYGEN__)
85*150812a8SEvalZero NRF_CLOCK_LFCLK_Xtal = CLOCK_LFCLKSRC_SRC_Xtal, /**< External 32 kHz crystal. */
86*150812a8SEvalZero #else
87*150812a8SEvalZero NRF_CLOCK_LFCLK_Xtal = CLOCK_LFCLKSRC_SRC_LFXO, /**< External 32 kHz crystal. */
88*150812a8SEvalZero #endif
89*150812a8SEvalZero
90*150812a8SEvalZero #if defined(CLOCK_LFCLKSRC_SRC_Synth) || defined(__NRFX_DOXYGEN__)
91*150812a8SEvalZero NRF_CLOCK_LFCLK_Synth = CLOCK_LFCLKSRC_SRC_Synth, /**< Internal 32 kHz synthesizer from HFCLK system clock. */
92*150812a8SEvalZero #endif
93*150812a8SEvalZero #if defined(NRF_CLOCK_USE_EXTERNAL_LFCLK_SOURCES) || defined(__NRFX_DOXYGEN__)
94*150812a8SEvalZero /**
95*150812a8SEvalZero * External 32 kHz low swing signal. Used only with the LFCLKSRC register.
96*150812a8SEvalZero * For the others @ref NRF_CLOCK_LFCLK_Xtal is returned for this setting.
97*150812a8SEvalZero */
98*150812a8SEvalZero NRF_CLOCK_LFCLK_Xtal_Low_Swing = (CLOCK_LFCLKSRC_SRC_Xtal |
99*150812a8SEvalZero (CLOCK_LFCLKSRC_EXTERNAL_Enabled << CLOCK_LFCLKSRC_EXTERNAL_Pos)),
100*150812a8SEvalZero /**
101*150812a8SEvalZero * External 32 kHz full swing signal. Used only with the LFCLKSRC register.
102*150812a8SEvalZero * For the others @ref NRF_CLOCK_LFCLK_Xtal is returned for this setting.
103*150812a8SEvalZero */
104*150812a8SEvalZero NRF_CLOCK_LFCLK_Xtal_Full_Swing = (CLOCK_LFCLKSRC_SRC_Xtal |
105*150812a8SEvalZero (CLOCK_LFCLKSRC_BYPASS_Enabled << CLOCK_LFCLKSRC_BYPASS_Pos) |
106*150812a8SEvalZero (CLOCK_LFCLKSRC_EXTERNAL_Enabled << CLOCK_LFCLKSRC_EXTERNAL_Pos)),
107*150812a8SEvalZero #endif // defined(NRF_CLOCK_USE_EXTERNAL_LFCLK_SOURCES) || defined(__NRFX_DOXYGEN__)
108*150812a8SEvalZero } nrf_clock_lfclk_t;
109*150812a8SEvalZero
110*150812a8SEvalZero /**
111*150812a8SEvalZero * @brief High-frequency clock sources.
112*150812a8SEvalZero */
113*150812a8SEvalZero typedef enum
114*150812a8SEvalZero {
115*150812a8SEvalZero #if defined(CLOCK_HFCLKSTAT_SRC_RC) || defined(__NRFX_DOXYGEN__)
116*150812a8SEvalZero NRF_CLOCK_HFCLK_LOW_ACCURACY = CLOCK_HFCLKSTAT_SRC_RC, /**< Internal 16 MHz RC oscillator. */
117*150812a8SEvalZero #endif
118*150812a8SEvalZero #if defined(CLOCK_HFCLKSTAT_SRC_Xtal) || defined(__NRFX_DOXYGEN__)
119*150812a8SEvalZero NRF_CLOCK_HFCLK_HIGH_ACCURACY = CLOCK_HFCLKSTAT_SRC_Xtal /**< External 16 MHz/32 MHz crystal oscillator. */
120*150812a8SEvalZero #else
121*150812a8SEvalZero NRF_CLOCK_HFCLK_HIGH_ACCURACY = CLOCK_HFCLKSTAT_SRC_HFXO /**< External 32 MHz crystal oscillator. */
122*150812a8SEvalZero #endif
123*150812a8SEvalZero } nrf_clock_hfclk_t;
124*150812a8SEvalZero
125*150812a8SEvalZero /**
126*150812a8SEvalZero * @brief Trigger status of task LFCLKSTART/HFCLKSTART.
127*150812a8SEvalZero * @details Used by LFCLKRUN and HFCLKRUN registers.
128*150812a8SEvalZero */
129*150812a8SEvalZero typedef enum
130*150812a8SEvalZero {
131*150812a8SEvalZero NRF_CLOCK_START_TASK_NOT_TRIGGERED = CLOCK_LFCLKRUN_STATUS_NotTriggered, /**< Task LFCLKSTART/HFCLKSTART has not been triggered. */
132*150812a8SEvalZero NRF_CLOCK_START_TASK_TRIGGERED = CLOCK_LFCLKRUN_STATUS_Triggered /**< Task LFCLKSTART/HFCLKSTART has been triggered. */
133*150812a8SEvalZero } nrf_clock_start_task_status_t;
134*150812a8SEvalZero
135*150812a8SEvalZero /**
136*150812a8SEvalZero * @brief Interrupts.
137*150812a8SEvalZero */
138*150812a8SEvalZero typedef enum
139*150812a8SEvalZero {
140*150812a8SEvalZero NRF_CLOCK_INT_HF_STARTED_MASK = CLOCK_INTENSET_HFCLKSTARTED_Msk, /**< Interrupt on HFCLKSTARTED event. */
141*150812a8SEvalZero NRF_CLOCK_INT_LF_STARTED_MASK = CLOCK_INTENSET_LFCLKSTARTED_Msk, /**< Interrupt on LFCLKSTARTED event. */
142*150812a8SEvalZero #if (NRF_CLOCK_HAS_CALIBRATION) || defined(__NRFX_DOXYGEN__)
143*150812a8SEvalZero NRF_CLOCK_INT_DONE_MASK = CLOCK_INTENSET_DONE_Msk, /**< Interrupt on DONE event. */
144*150812a8SEvalZero NRF_CLOCK_INT_CTTO_MASK = CLOCK_INTENSET_CTTO_Msk /**< Interrupt on CTTO event. */
145*150812a8SEvalZero #endif
146*150812a8SEvalZero } nrf_clock_int_mask_t;
147*150812a8SEvalZero
148*150812a8SEvalZero /**
149*150812a8SEvalZero * @brief Tasks.
150*150812a8SEvalZero *
151*150812a8SEvalZero * @details The NRF_CLOCK_TASK_LFCLKSTOP task cannot be set when the low-frequency clock is not running.
152*150812a8SEvalZero * The NRF_CLOCK_TASK_HFCLKSTOP task cannot be set when the high-frequency clock is not running.
153*150812a8SEvalZero */
154*150812a8SEvalZero typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
155*150812a8SEvalZero {
156*150812a8SEvalZero NRF_CLOCK_TASK_HFCLKSTART = offsetof(NRF_CLOCK_Type, TASKS_HFCLKSTART), /**< Start HFCLK clock source.*/
157*150812a8SEvalZero NRF_CLOCK_TASK_HFCLKSTOP = offsetof(NRF_CLOCK_Type, TASKS_HFCLKSTOP), /**< Stop HFCLK clock source.*/
158*150812a8SEvalZero NRF_CLOCK_TASK_LFCLKSTART = offsetof(NRF_CLOCK_Type, TASKS_LFCLKSTART), /**< Start LFCLK clock source.*/
159*150812a8SEvalZero NRF_CLOCK_TASK_LFCLKSTOP = offsetof(NRF_CLOCK_Type, TASKS_LFCLKSTOP), /**< Stop LFCLK clock source.*/
160*150812a8SEvalZero #if (NRF_CLOCK_HAS_CALIBRATION) || defined(__NRFX_DOXYGEN__)
161*150812a8SEvalZero NRF_CLOCK_TASK_CAL = offsetof(NRF_CLOCK_Type, TASKS_CAL), /**< Start calibration of LFCLK RC oscillator.*/
162*150812a8SEvalZero NRF_CLOCK_TASK_CTSTART = offsetof(NRF_CLOCK_Type, TASKS_CTSTART), /**< Start calibration timer.*/
163*150812a8SEvalZero NRF_CLOCK_TASK_CTSTOP = offsetof(NRF_CLOCK_Type, TASKS_CTSTOP) /**< Stop calibration timer.*/
164*150812a8SEvalZero #endif
165*150812a8SEvalZero } nrf_clock_task_t; /*lint -restore */
166*150812a8SEvalZero
167*150812a8SEvalZero /**
168*150812a8SEvalZero * @brief Events.
169*150812a8SEvalZero */
170*150812a8SEvalZero typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
171*150812a8SEvalZero {
172*150812a8SEvalZero NRF_CLOCK_EVENT_HFCLKSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_HFCLKSTARTED), /**< HFCLK oscillator started.*/
173*150812a8SEvalZero NRF_CLOCK_EVENT_LFCLKSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_LFCLKSTARTED), /**< LFCLK oscillator started.*/
174*150812a8SEvalZero #if (NRF_CLOCK_HAS_CALIBRATION) || defined(__NRFX_DOXYGEN__)
175*150812a8SEvalZero NRF_CLOCK_EVENT_DONE = offsetof(NRF_CLOCK_Type, EVENTS_DONE), /**< Calibration of LFCLK RC oscillator completed.*/
176*150812a8SEvalZero NRF_CLOCK_EVENT_CTTO = offsetof(NRF_CLOCK_Type, EVENTS_CTTO) /**< Calibration timer time-out.*/
177*150812a8SEvalZero #endif
178*150812a8SEvalZero } nrf_clock_event_t; /*lint -restore */
179*150812a8SEvalZero
180*150812a8SEvalZero /**
181*150812a8SEvalZero * @brief Function for enabling a specific interrupt.
182*150812a8SEvalZero *
183*150812a8SEvalZero * @param[in] int_mask Interrupt.
184*150812a8SEvalZero */
185*150812a8SEvalZero __STATIC_INLINE void nrf_clock_int_enable(uint32_t int_mask);
186*150812a8SEvalZero
187*150812a8SEvalZero /**
188*150812a8SEvalZero * @brief Function for disabling a specific interrupt.
189*150812a8SEvalZero *
190*150812a8SEvalZero * @param[in] int_mask Interrupt.
191*150812a8SEvalZero */
192*150812a8SEvalZero __STATIC_INLINE void nrf_clock_int_disable(uint32_t int_mask);
193*150812a8SEvalZero
194*150812a8SEvalZero /**
195*150812a8SEvalZero * @brief Function for retrieving the state of a specific interrupt.
196*150812a8SEvalZero *
197*150812a8SEvalZero * @param[in] int_mask Interrupt.
198*150812a8SEvalZero *
199*150812a8SEvalZero * @retval true If the interrupt is enabled.
200*150812a8SEvalZero * @retval false If the interrupt is not enabled.
201*150812a8SEvalZero */
202*150812a8SEvalZero __STATIC_INLINE bool nrf_clock_int_enable_check(nrf_clock_int_mask_t int_mask);
203*150812a8SEvalZero
204*150812a8SEvalZero /**
205*150812a8SEvalZero * @brief Function for retrieving the address of a specific task.
206*150812a8SEvalZero * @details This function can be used by the PPI module.
207*150812a8SEvalZero *
208*150812a8SEvalZero * @param[in] task Task.
209*150812a8SEvalZero *
210*150812a8SEvalZero * @return Address of the requested task register.
211*150812a8SEvalZero */
212*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_clock_task_address_get(nrf_clock_task_t task);
213*150812a8SEvalZero
214*150812a8SEvalZero /**
215*150812a8SEvalZero * @brief Function for setting a specific task.
216*150812a8SEvalZero *
217*150812a8SEvalZero * @param[in] task Task.
218*150812a8SEvalZero */
219*150812a8SEvalZero __STATIC_INLINE void nrf_clock_task_trigger(nrf_clock_task_t task);
220*150812a8SEvalZero
221*150812a8SEvalZero /**
222*150812a8SEvalZero * @brief Function for retrieving the address of a specific event.
223*150812a8SEvalZero * @details This function can be used by the PPI module.
224*150812a8SEvalZero *
225*150812a8SEvalZero * @param[in] event Event.
226*150812a8SEvalZero *
227*150812a8SEvalZero * @return Address of the requested event register.
228*150812a8SEvalZero */
229*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_clock_event_address_get(nrf_clock_event_t event);
230*150812a8SEvalZero
231*150812a8SEvalZero /**
232*150812a8SEvalZero * @brief Function for clearing a specific event.
233*150812a8SEvalZero *
234*150812a8SEvalZero * @param[in] event Event.
235*150812a8SEvalZero */
236*150812a8SEvalZero __STATIC_INLINE void nrf_clock_event_clear(nrf_clock_event_t event);
237*150812a8SEvalZero
238*150812a8SEvalZero /**
239*150812a8SEvalZero * @brief Function for retrieving the state of a specific event.
240*150812a8SEvalZero *
241*150812a8SEvalZero * @param[in] event Event.
242*150812a8SEvalZero *
243*150812a8SEvalZero * @retval true If the event is set.
244*150812a8SEvalZero * @retval false If the event is not set.
245*150812a8SEvalZero */
246*150812a8SEvalZero __STATIC_INLINE bool nrf_clock_event_check(nrf_clock_event_t event);
247*150812a8SEvalZero
248*150812a8SEvalZero /**
249*150812a8SEvalZero * @brief Function for changing the low-frequency clock source.
250*150812a8SEvalZero * @details This function cannot be called when the low-frequency clock is running.
251*150812a8SEvalZero *
252*150812a8SEvalZero * @param[in] source New low-frequency clock source.
253*150812a8SEvalZero */
254*150812a8SEvalZero __STATIC_INLINE void nrf_clock_lf_src_set(nrf_clock_lfclk_t source);
255*150812a8SEvalZero
256*150812a8SEvalZero /**
257*150812a8SEvalZero * @brief Function for retrieving the selected source for the low-frequency clock.
258*150812a8SEvalZero *
259*150812a8SEvalZero * @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator
260*150812a8SEvalZero * is the selected source for the low-frequency clock.
261*150812a8SEvalZero * @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator
262*150812a8SEvalZero * is the selected source for the low-frequency clock.
263*150812a8SEvalZero * @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from
264*150812a8SEvalZero * the HFCLK is the selected source for the low-frequency clock.
265*150812a8SEvalZero */
266*150812a8SEvalZero __STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_src_get(void);
267*150812a8SEvalZero
268*150812a8SEvalZero /**
269*150812a8SEvalZero * @brief Function for retrieving the active source of the low-frequency clock.
270*150812a8SEvalZero *
271*150812a8SEvalZero * @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator
272*150812a8SEvalZero * is the active source of the low-frequency clock.
273*150812a8SEvalZero * @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator
274*150812a8SEvalZero * is the active source of the low-frequency clock.
275*150812a8SEvalZero * @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from
276*150812a8SEvalZero * the HFCLK is the active source of the low-frequency clock.
277*150812a8SEvalZero */
278*150812a8SEvalZero __STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_actv_src_get(void);
279*150812a8SEvalZero
280*150812a8SEvalZero /**
281*150812a8SEvalZero * @brief Function for retrieving the clock source for the LFCLK clock when
282*150812a8SEvalZero * the task LKCLKSTART is triggered.
283*150812a8SEvalZero *
284*150812a8SEvalZero * @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator
285*150812a8SEvalZero * is running and generating the LFCLK clock.
286*150812a8SEvalZero * @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator
287*150812a8SEvalZero * is running and generating the LFCLK clock.
288*150812a8SEvalZero * @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from
289*150812a8SEvalZero * the HFCLK is running and generating the LFCLK clock.
290*150812a8SEvalZero */
291*150812a8SEvalZero __STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_srccopy_get(void);
292*150812a8SEvalZero
293*150812a8SEvalZero /**
294*150812a8SEvalZero * @brief Function for retrieving the state of the LFCLK clock.
295*150812a8SEvalZero *
296*150812a8SEvalZero * @retval false If the LFCLK clock is not running.
297*150812a8SEvalZero * @retval true If the LFCLK clock is running.
298*150812a8SEvalZero */
299*150812a8SEvalZero __STATIC_INLINE bool nrf_clock_lf_is_running(void);
300*150812a8SEvalZero
301*150812a8SEvalZero /**
302*150812a8SEvalZero * @brief Function for retrieving the trigger status of the task LFCLKSTART.
303*150812a8SEvalZero *
304*150812a8SEvalZero * @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED If the task LFCLKSTART has not been triggered.
305*150812a8SEvalZero * @retval NRF_CLOCK_START_TASK_TRIGGERED If the task LFCLKSTART has been triggered.
306*150812a8SEvalZero */
307*150812a8SEvalZero __STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_lf_start_task_status_get(void);
308*150812a8SEvalZero
309*150812a8SEvalZero /**
310*150812a8SEvalZero * @brief Function for retrieving the active source of the high-frequency clock.
311*150812a8SEvalZero *
312*150812a8SEvalZero * @retval NRF_CLOCK_HFCLK_LOW_ACCURACY If the internal RC oscillator is the active
313*150812a8SEvalZero * source of the high-frequency clock.
314*150812a8SEvalZero * @retval NRF_CLOCK_HFCLK_HIGH_ACCURACY If an external crystal oscillator is the active
315*150812a8SEvalZero * source of the high-frequency clock.
316*150812a8SEvalZero */
317*150812a8SEvalZero __STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hf_src_get(void);
318*150812a8SEvalZero
319*150812a8SEvalZero /**
320*150812a8SEvalZero * @brief Function for retrieving the state of the HFCLK clock.
321*150812a8SEvalZero *
322*150812a8SEvalZero * @param[in] clk_src Clock source to be checked.
323*150812a8SEvalZero *
324*150812a8SEvalZero * @retval false If the HFCLK clock is not running.
325*150812a8SEvalZero * @retval true If the HFCLK clock is running.
326*150812a8SEvalZero */
327*150812a8SEvalZero __STATIC_INLINE bool nrf_clock_hf_is_running(nrf_clock_hfclk_t clk_src);
328*150812a8SEvalZero
329*150812a8SEvalZero /**
330*150812a8SEvalZero * @brief Function for retrieving the trigger status of the task HFCLKSTART.
331*150812a8SEvalZero *
332*150812a8SEvalZero * @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED If the task HFCLKSTART has not been triggered.
333*150812a8SEvalZero * @retval NRF_CLOCK_START_TASK_TRIGGERED If the task HFCLKSTART has been triggered.
334*150812a8SEvalZero */
335*150812a8SEvalZero __STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_hf_start_task_status_get(void);
336*150812a8SEvalZero
337*150812a8SEvalZero #if (NRF_CLOCK_HAS_CALIBRATION) || defined(__NRFX_DOXYGEN__)
338*150812a8SEvalZero /**
339*150812a8SEvalZero * @brief Function for changing the calibration timer interval.
340*150812a8SEvalZero *
341*150812a8SEvalZero * @param[in] interval New calibration timer interval in 0.25 s resolution
342*150812a8SEvalZero * (range: 0.25 seconds to 31.75 seconds).
343*150812a8SEvalZero */
344*150812a8SEvalZero __STATIC_INLINE void nrf_clock_cal_timer_timeout_set(uint32_t interval);
345*150812a8SEvalZero #endif
346*150812a8SEvalZero
347*150812a8SEvalZero #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
348*150812a8SEvalZero /**
349*150812a8SEvalZero * @brief Function for setting the subscribe configuration for a given
350*150812a8SEvalZero * CLOCK task.
351*150812a8SEvalZero *
352*150812a8SEvalZero * @param[in] task Task for which to set the configuration.
353*150812a8SEvalZero * @param[in] channel Channel through which to subscribe events.
354*150812a8SEvalZero */
355*150812a8SEvalZero __STATIC_INLINE void nrf_clock_subscribe_set(nrf_clock_task_t task,
356*150812a8SEvalZero uint8_t channel);
357*150812a8SEvalZero
358*150812a8SEvalZero /**
359*150812a8SEvalZero * @brief Function for clearing the subscribe configuration for a given
360*150812a8SEvalZero * CLOCK task.
361*150812a8SEvalZero *
362*150812a8SEvalZero * @param[in] task Task for which to clear the configuration.
363*150812a8SEvalZero */
364*150812a8SEvalZero __STATIC_INLINE void nrf_clock_subscribe_clear(nrf_clock_task_t task);
365*150812a8SEvalZero
366*150812a8SEvalZero /**
367*150812a8SEvalZero * @brief Function for setting the publish configuration for a given
368*150812a8SEvalZero * CLOCK event.
369*150812a8SEvalZero *
370*150812a8SEvalZero * @param[in] event Event for which to set the configuration.
371*150812a8SEvalZero * @param[in] channel Channel through which to publish the event.
372*150812a8SEvalZero */
373*150812a8SEvalZero __STATIC_INLINE void nrf_clock_publish_set(nrf_clock_event_t event,
374*150812a8SEvalZero uint8_t channel);
375*150812a8SEvalZero
376*150812a8SEvalZero /**
377*150812a8SEvalZero * @brief Function for clearing the publish configuration for a given
378*150812a8SEvalZero * CLOCK event.
379*150812a8SEvalZero *
380*150812a8SEvalZero * @param[in] event Event for which to clear the configuration.
381*150812a8SEvalZero */
382*150812a8SEvalZero __STATIC_INLINE void nrf_clock_publish_clear(nrf_clock_event_t event);
383*150812a8SEvalZero #endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
384*150812a8SEvalZero
385*150812a8SEvalZero #ifndef SUPPRESS_INLINE_IMPLEMENTATION
386*150812a8SEvalZero
nrf_clock_int_enable(uint32_t int_mask)387*150812a8SEvalZero __STATIC_INLINE void nrf_clock_int_enable(uint32_t int_mask)
388*150812a8SEvalZero {
389*150812a8SEvalZero NRF_CLOCK->INTENSET = int_mask;
390*150812a8SEvalZero }
391*150812a8SEvalZero
nrf_clock_int_disable(uint32_t int_mask)392*150812a8SEvalZero __STATIC_INLINE void nrf_clock_int_disable(uint32_t int_mask)
393*150812a8SEvalZero {
394*150812a8SEvalZero NRF_CLOCK->INTENCLR = int_mask;
395*150812a8SEvalZero }
396*150812a8SEvalZero
nrf_clock_int_enable_check(nrf_clock_int_mask_t int_mask)397*150812a8SEvalZero __STATIC_INLINE bool nrf_clock_int_enable_check(nrf_clock_int_mask_t int_mask)
398*150812a8SEvalZero {
399*150812a8SEvalZero return (bool)(NRF_CLOCK->INTENCLR & int_mask);
400*150812a8SEvalZero }
401*150812a8SEvalZero
nrf_clock_task_address_get(nrf_clock_task_t task)402*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_clock_task_address_get(nrf_clock_task_t task)
403*150812a8SEvalZero {
404*150812a8SEvalZero return ((uint32_t )NRF_CLOCK + task);
405*150812a8SEvalZero }
406*150812a8SEvalZero
nrf_clock_task_trigger(nrf_clock_task_t task)407*150812a8SEvalZero __STATIC_INLINE void nrf_clock_task_trigger(nrf_clock_task_t task)
408*150812a8SEvalZero {
409*150812a8SEvalZero *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + task)) = NRF_CLOCK_TASK_TRIGGER;
410*150812a8SEvalZero }
411*150812a8SEvalZero
nrf_clock_event_address_get(nrf_clock_event_t event)412*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_clock_event_address_get(nrf_clock_event_t event)
413*150812a8SEvalZero {
414*150812a8SEvalZero return ((uint32_t)NRF_CLOCK + event);
415*150812a8SEvalZero }
416*150812a8SEvalZero
nrf_clock_event_clear(nrf_clock_event_t event)417*150812a8SEvalZero __STATIC_INLINE void nrf_clock_event_clear(nrf_clock_event_t event)
418*150812a8SEvalZero {
419*150812a8SEvalZero *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + event)) = NRF_CLOCK_EVENT_CLEAR;
420*150812a8SEvalZero #if __CORTEX_M == 0x04
421*150812a8SEvalZero volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + (uint32_t)event));
422*150812a8SEvalZero (void)dummy;
423*150812a8SEvalZero #endif
424*150812a8SEvalZero }
425*150812a8SEvalZero
nrf_clock_event_check(nrf_clock_event_t event)426*150812a8SEvalZero __STATIC_INLINE bool nrf_clock_event_check(nrf_clock_event_t event)
427*150812a8SEvalZero {
428*150812a8SEvalZero return (bool)*((volatile uint32_t *)((uint8_t *)NRF_CLOCK + event));
429*150812a8SEvalZero }
430*150812a8SEvalZero
nrf_clock_lf_src_set(nrf_clock_lfclk_t source)431*150812a8SEvalZero __STATIC_INLINE void nrf_clock_lf_src_set(nrf_clock_lfclk_t source)
432*150812a8SEvalZero {
433*150812a8SEvalZero NRF_CLOCK->LFCLKSRC = (uint32_t)(source);
434*150812a8SEvalZero }
435*150812a8SEvalZero
nrf_clock_lf_src_get(void)436*150812a8SEvalZero __STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_src_get(void)
437*150812a8SEvalZero {
438*150812a8SEvalZero return (nrf_clock_lfclk_t)(NRF_CLOCK->LFCLKSRC);
439*150812a8SEvalZero }
440*150812a8SEvalZero
nrf_clock_lf_actv_src_get(void)441*150812a8SEvalZero __STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_actv_src_get(void)
442*150812a8SEvalZero {
443*150812a8SEvalZero return (nrf_clock_lfclk_t)((NRF_CLOCK->LFCLKSTAT &
444*150812a8SEvalZero CLOCK_LFCLKSTAT_SRC_Msk) >> CLOCK_LFCLKSTAT_SRC_Pos);
445*150812a8SEvalZero }
446*150812a8SEvalZero
nrf_clock_lf_srccopy_get(void)447*150812a8SEvalZero __STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_srccopy_get(void)
448*150812a8SEvalZero {
449*150812a8SEvalZero return (nrf_clock_lfclk_t)((NRF_CLOCK->LFCLKSRCCOPY &
450*150812a8SEvalZero CLOCK_LFCLKSRCCOPY_SRC_Msk) >> CLOCK_LFCLKSRCCOPY_SRC_Pos);
451*150812a8SEvalZero }
452*150812a8SEvalZero
nrf_clock_lf_is_running(void)453*150812a8SEvalZero __STATIC_INLINE bool nrf_clock_lf_is_running(void)
454*150812a8SEvalZero {
455*150812a8SEvalZero return ((NRF_CLOCK->LFCLKSTAT &
456*150812a8SEvalZero CLOCK_LFCLKSTAT_STATE_Msk) >> CLOCK_LFCLKSTAT_STATE_Pos);
457*150812a8SEvalZero }
458*150812a8SEvalZero
nrf_clock_lf_start_task_status_get(void)459*150812a8SEvalZero __STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_lf_start_task_status_get(void)
460*150812a8SEvalZero {
461*150812a8SEvalZero return (nrf_clock_start_task_status_t)((NRF_CLOCK->LFCLKRUN &
462*150812a8SEvalZero CLOCK_LFCLKRUN_STATUS_Msk) >> CLOCK_LFCLKRUN_STATUS_Pos);
463*150812a8SEvalZero }
464*150812a8SEvalZero
nrf_clock_hf_src_get(void)465*150812a8SEvalZero __STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hf_src_get(void)
466*150812a8SEvalZero {
467*150812a8SEvalZero return (nrf_clock_hfclk_t)((NRF_CLOCK->HFCLKSTAT &
468*150812a8SEvalZero CLOCK_HFCLKSTAT_SRC_Msk) >> CLOCK_HFCLKSTAT_SRC_Pos);
469*150812a8SEvalZero }
470*150812a8SEvalZero
nrf_clock_hf_is_running(nrf_clock_hfclk_t clk_src)471*150812a8SEvalZero __STATIC_INLINE bool nrf_clock_hf_is_running(nrf_clock_hfclk_t clk_src)
472*150812a8SEvalZero {
473*150812a8SEvalZero return (NRF_CLOCK->HFCLKSTAT & (CLOCK_HFCLKSTAT_STATE_Msk | CLOCK_HFCLKSTAT_SRC_Msk)) ==
474*150812a8SEvalZero (CLOCK_HFCLKSTAT_STATE_Msk | (clk_src << CLOCK_HFCLKSTAT_SRC_Pos));
475*150812a8SEvalZero }
476*150812a8SEvalZero
nrf_clock_hf_start_task_status_get(void)477*150812a8SEvalZero __STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_hf_start_task_status_get(void)
478*150812a8SEvalZero {
479*150812a8SEvalZero return (nrf_clock_start_task_status_t)((NRF_CLOCK->HFCLKRUN &
480*150812a8SEvalZero CLOCK_HFCLKRUN_STATUS_Msk) >> CLOCK_HFCLKRUN_STATUS_Pos);
481*150812a8SEvalZero }
482*150812a8SEvalZero
483*150812a8SEvalZero #if (NRF_CLOCK_HAS_CALIBRATION)
nrf_clock_cal_timer_timeout_set(uint32_t interval)484*150812a8SEvalZero __STATIC_INLINE void nrf_clock_cal_timer_timeout_set(uint32_t interval)
485*150812a8SEvalZero {
486*150812a8SEvalZero NRF_CLOCK->CTIV = ((interval << CLOCK_CTIV_CTIV_Pos) & CLOCK_CTIV_CTIV_Msk);
487*150812a8SEvalZero }
488*150812a8SEvalZero #endif
489*150812a8SEvalZero
490*150812a8SEvalZero #if defined(DPPI_PRESENT)
nrf_clock_subscribe_set(nrf_clock_task_t task,uint8_t channel)491*150812a8SEvalZero __STATIC_INLINE void nrf_clock_subscribe_set(nrf_clock_task_t task,
492*150812a8SEvalZero uint8_t channel)
493*150812a8SEvalZero {
494*150812a8SEvalZero *((volatile uint32_t *) ((uint8_t *) NRF_CLOCK + (uint32_t) task + 0x80uL)) =
495*150812a8SEvalZero ((uint32_t)channel | CLOCK_SUBSCRIBE_HFCLKSTART_EN_Msk);
496*150812a8SEvalZero }
497*150812a8SEvalZero
nrf_clock_subscribe_clear(nrf_clock_task_t task)498*150812a8SEvalZero __STATIC_INLINE void nrf_clock_subscribe_clear(nrf_clock_task_t task)
499*150812a8SEvalZero {
500*150812a8SEvalZero *((volatile uint32_t *) ((uint8_t *) NRF_CLOCK + (uint32_t) task + 0x80uL)) = 0;
501*150812a8SEvalZero }
502*150812a8SEvalZero
nrf_clock_publish_set(nrf_clock_event_t event,uint8_t channel)503*150812a8SEvalZero __STATIC_INLINE void nrf_clock_publish_set(nrf_clock_event_t event,
504*150812a8SEvalZero uint8_t channel)
505*150812a8SEvalZero {
506*150812a8SEvalZero *((volatile uint32_t *) ((uint8_t *) NRF_CLOCK + (uint32_t) event + 0x80uL)) =
507*150812a8SEvalZero ((uint32_t)channel | CLOCK_PUBLISH_HFCLKSTARTED_EN_Msk);
508*150812a8SEvalZero }
509*150812a8SEvalZero
nrf_clock_publish_clear(nrf_clock_event_t event)510*150812a8SEvalZero __STATIC_INLINE void nrf_clock_publish_clear(nrf_clock_event_t event)
511*150812a8SEvalZero {
512*150812a8SEvalZero *((volatile uint32_t *) ((uint8_t *) NRF_CLOCK + (uint32_t) event + 0x80uL)) = 0;
513*150812a8SEvalZero }
514*150812a8SEvalZero #endif // defined(DPPI_PRESENT)
515*150812a8SEvalZero
516*150812a8SEvalZero #endif // SUPPRESS_INLINE_IMPLEMENTATION
517*150812a8SEvalZero
518*150812a8SEvalZero /** @} */
519*150812a8SEvalZero
520*150812a8SEvalZero #ifdef __cplusplus
521*150812a8SEvalZero }
522*150812a8SEvalZero #endif
523*150812a8SEvalZero
524*150812a8SEvalZero #endif // NRF_CLOCK_H__
525