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/nrf52832-nimble/nordic/nrfx/hal/
H A Dnrf_pwm.h121 …NRF_PWM_MODE_UP = PWM_MODE_UPDOWN_Up, ///< Up counter (edge-aligned PWM duty cycle…
122 …_UP_AND_DOWN = PWM_MODE_UPDOWN_UpAndDown, ///< Up and down counter (center-aligned PWM duty cycle).
168 * @brief Type used for defining duty cycle values for a sequence
174 * @brief Structure for defining duty cycle values for a sequence
178 uint16_t group_0; ///< Duty cycle value for group 0 (channels 0 and 1).
179 uint16_t group_1; ///< Duty cycle value for group 1 (channels 2 and 3).
183 * @brief Structure for defining duty cycle values for a sequence
188 uint16_t channel_0; ///< Duty cycle value for channel 0.
189 uint16_t channel_1; ///< Duty cycle value for channel 1.
190 uint16_t channel_2; ///< Duty cycle value for channel 2.
[all …]
/nrf52832-nimble/nordic/nrfx/drivers/include/
H A Dnrfx_pwm.h142 of duty cycle values, this might result in
242 * @note The array containing the duty cycle values for the specified sequence
269 * @note The array containing the duty cycle values for the specified sequence
303 * This means that if the active sequence is configured to repeat each duty
348 * @brief Function for updating the pointer to the duty cycle values
353 * @param[in] values New pointer to the duty cycle values.
360 * @brief Function for updating the number of duty cycle values
365 * @param[in] length New number of the duty cycle values.
372 * @brief Function for updating the number of repeats for duty cycle values
/nrf52832-nimble/packages/NimBLE-latest/
H A DREADME.md10 - 高速不可连接广播(High Duty Cycle Non-Connectable Advertising)
17 - 低速定向广播(Low Duty Cycle Directed Advertising)
/nrf52832-nimble/packages/NimBLE-latest/docs/mesh/
H A Dindex.rst35 - Low Power - operate within a mesh network at significantly reduced receiver duty cycles only in …
/nrf52832-nimble/packages/NimBLE-latest/docs/
H A Dindex.rst41 - High Duty Cycle Non-Connectable Advertising
/nrf52832-nimble/packages/NimBLE-latest/nimble/controller/src/
H A Dble_ll_adv.c1594 * For high duty directed advertising we need to send connection in ble_ll_adv_sm_stop_timeout()
1616 * For high duty directed advertising we need to send connection in ble_ll_adv_sm_stop_limit_reached()
1650 /* Set the time at which we must end directed, high-duty cycle advertising. in ble_ll_adv_scheduled()
1744 /* Set it to max. allowed for high duty cycle advertising */ in ble_ll_adv_sm_start()
2219 /* High Duty Directed advertising is special */ in ble_ll_adv_ext_set_param()
/nrf52832-nimble/packages/NimBLE-latest/nimble/host/mesh/
H A Dsyscfg.yml207 the help of a reduced scan duty cycle. The downside of this
/nrf52832-nimble/packages/NimBLE-latest/apps/bletest/src/
H A Dbletest_hci.c433 /* Do not check if high duty-cycle directed */ in bletest_hci_le_set_multi_adv_params()
/nrf52832-nimble/packages/NimBLE-latest/nimble/host/src/
H A Dble_gap.c1975 /* Zero is the default value for filter policy and high duty cycle */ in ble_gap_adv_params_tx()
2017 /* High duty cycle only allowed for directed advertising. */ in ble_gap_adv_validate()
2024 /* High duty cycle only allowed for directed advertising. */ in ble_gap_adv_validate()
2330 /* Zero is the default value for filter policy and high duty cycle */ in ble_gap_ext_adv_params_tx()
H A Dble_hs_hci_cmd.c191 /* Do not check if high duty-cycle directed */ in ble_hs_hci_cmd_body_le_set_adv_params()
/nrf52832-nimble/packages/NimBLE-latest/nimble/host/include/host/
H A Dble_gap.h185 /** If do High Duty cycle for Directed Advertising */
/nrf52832-nimble/nordic/nrfx/mdk/
H A Dnrf52810.h442 …t CNT; /*!< (@ 0x00000004) Description cluster[n]: Number of values (duty
H A Dnrf9160.h587 …T; /*!< (@ 0x00000004) Description cluster: Number of values (duty cycles)
H A Dnrf9160_bitfields.h5334 #define PWM_MODE_UPDOWN_Up (0UL) /*!< Up counter, edge-aligned PWM duty cycle */
5335 #define PWM_MODE_UPDOWN_UpAndDown (1UL) /*!< Up and down counter, center-aligned PWM duty cycle */
5392 /* Description: Description cluster: Number of values (duty cycles) in this sequence */
5394 /* Bits 14..0 : Number of values (duty cycles) in this sequence */
H A Dnrf52810_bitfields.h5436 #define PWM_MODE_UPDOWN_Up (0UL) /*!< Up counter, edge-aligned PWM duty cycle */
5437 #define PWM_MODE_UPDOWN_UpAndDown (1UL) /*!< Up and down counter, center-aligned PWM duty cycle */
5494 /* Description: Description cluster[n]: Number of values (duty cycles) in this sequence */
5496 /* Bits 14..0 : Number of values (duty cycles) in this sequence */
H A Dnrf52.h503 …t CNT; /*!< (@ 0x00000004) Description cluster[0]: Amount of values (duty
H A Dnrf52_bitfields.h8122 #define PWM_MODE_UPDOWN_Up (0UL) /*!< Up counter - edge aligned PWM duty-cycle */
8123 #define PWM_MODE_UPDOWN_UpAndDown (1UL) /*!< Up and down counter - center aligned PWM duty cycle */
8180 /* Description: Description cluster[0]: Amount of values (duty cycles) in this sequence */
8182 /* Bits 14..0 : Amount of values (duty cycles) in this sequence */
H A Dnrf52840.h556 …t CNT; /*!< (@ 0x00000004) Description cluster[n]: Number of values (duty
H A Dnrf52810.svd21617 <description>Up counter, edge-aligned PWM duty cycle</description>
21622 <description>Up and down counter, center-aligned PWM duty cycle</description>
21802 … <description>Description cluster[n]: Number of values (duty cycles) in this sequence</description>
21809 <description>Number of values (duty cycles) in this sequence</description>
H A Dnrf52840_bitfields.h8884 #define PWM_MODE_UPDOWN_Up (0UL) /*!< Up counter, edge-aligned PWM duty cycle */
8885 #define PWM_MODE_UPDOWN_UpAndDown (1UL) /*!< Up and down counter, center-aligned PWM duty cycle */
8942 /* Description: Description cluster[n]: Number of values (duty cycles) in this sequence */
8944 /* Bits 14..0 : Number of values (duty cycles) in this sequence */
H A Dnrf9160.svd23992 <description>Up counter, edge-aligned PWM duty cycle</description>
23997 <description>Up and down counter, center-aligned PWM duty cycle</description>
24178 … <description>Description cluster: Number of values (duty cycles) in this sequence</description>
24185 <description>Number of values (duty cycles) in this sequence</description>
H A Dnrf52.svd26980 <description>Up counter - edge aligned PWM duty-cycle</description>
26985 <description>Up and down counter - center aligned PWM duty cycle</description>
27165 …<description>Description cluster[0]: Amount of values (duty cycles) in this sequence</description>
27172 <description>Amount of values (duty cycles) in this sequence</description>
H A Dnrf52840.svd29965 <description>Up counter, edge-aligned PWM duty cycle</description>
29970 <description>Up and down counter, center-aligned PWM duty cycle</description>
30150 … <description>Description cluster[n]: Number of values (duty cycles) in this sequence</description>
30157 <description>Number of values (duty cycles) in this sequence</description>