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/nrf52832-nimble/nordic/nrfx/hal/
H A Dnrf_clock.h42 * @defgroup nrf_clock_hal Clock HAL
45 * @brief Hardware access layer for managing the CLOCK peripheral.
47 * This code can be used to managing low-frequency clock (LFCLK) and the high-frequency clock
63 * @brief Presence of the Low Frequency Clock calibration.
73 * @brief Low-frequency clock sources.
91 …FCLK_Synth = CLOCK_LFCLKSRC_SRC_Synth, /**< Internal 32 kHz synthesizer from HFCLK system clock. */
111 * @brief High-frequency clock sources.
151 …* @details The NRF_CLOCK_TASK_LFCLKSTOP task cannot be set when the low-frequency clock is not run…
152 * The NRF_CLOCK_TASK_HFCLKSTOP task cannot be set when the high-frequency clock is not running.
156 …NRF_CLOCK_TASK_HFCLKSTART = offsetof(NRF_CLOCK_Type, TASKS_HFCLKSTART), /**< Start HFCLK clock sou…
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/nrf52832-nimble/rt-thread/components/net/uip/uip/
H A Duip_clock.h2 * \defgroup clock Clock interface
4 * The clock interface is the interface between the \ref timer "timer library"
5 * and the platform specific clock functionality. The clock
9 * The clock interface does only one this: it measures time. The clock
50 * $Id: clock.h,v 1.3 2006/06/11 21:46:39 adam Exp $
55 #include "clock-arch.h"
58 * Initialize the clock library.
60 * This function initializes the clock library and should be called
67 * Get the current clock time.
69 * This function returns the current system clock time.
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/nrf52832-nimble/rt-thread/components/net/uip/doc/html/
H A Da00157.html3 <title>uIP 1.0: Clock interface</title>
16 <h1>Clock interface</h1><hr><a name="_details"></a><h2>Detailed Description</h2>
17 The clock interface is the interface between the <a class="el" href="a00156.html">timer library</a>…
19 The clock interface must be implemented for each platform that uses the <a class="el" href="a00156.…
20 The clock interface does only one this: it measures time. The clock interface provides a macro, CLO…
27 …nchor" name="ge3ced0551b26c9b99cb45a86f34d100a"></a><!-- doxytag: member="clock::CLOCK_SECOND" ref…
30 <tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">A second, measured in system clock time…
34 <tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Initialize the clock library. <a href=…
37 <tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Get the current clock time. <a href="#…
40 <a class="anchor" name="g78ab77b57cf2e00089f0a3a22508524c"></a><!-- doxytag: member="clock.h::clock…
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H A Da00188.html3 <title>uIP 1.0: uip/clock.h Source File</title>
21 <h1>uip/clock.h</h1><div class="fragment"><pre class="fragment"><a name="l00001"></a>00001 <span cl…
22 <a name="l00002"></a>00002 <span class="comment"> * \defgroup clock Clock interface</span>
24 <a name="l00004"></a>00004 <span class="comment"> * The clock interface is the interface between th…
25 …></a>00005 <span class="comment"> * and the platform specific clock functionality. The clock</span>
29 …0009"></a>00009 <span class="comment"> * The clock interface does only one this: it measures time.…
70 <a name="l00050"></a>00050 <span class="comment"> * $Id: clock.h,v 1.3 2006/06/11 21:46:39 adam Exp…
75 <a name="l00055"></a>00055 <span class="preprocessor">#include "clock-arch.h"</span>
78 <a name="l00058"></a>00058 <span class="comment"> * Initialize the clock library.</span>
80 <a name="l00060"></a>00060 <span class="comment"> * This function initializes the clock library and…
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/nrf52832-nimble/rt-thread/libcpu/arm/sep4020/
H A Dclk.c15 #define SYSCLK 72000000 /* system clock we want */
42 /* set the clock */ in rt_hw_set_system_clock()
50 /* set the clock */ in rt_hw_set_usb_clock()
58 * @brief System Clock Configuration
62 /* set system clock */ in rt_hw_clock_init()
64 /* set usb clock */ in rt_hw_clock_init()
69 * @brief Get system clock
84 /* caculate the system clock */ in rt_hw_get_clock()
94 * @brief Enable module clock
102 * @brief Disable module clock
/nrf52832-nimble/rt-thread/libcpu/arm/AT91SAM7X/
H A Dstart_rvds.S96 ;// <i> External Reset Time in 2^(ERSTL+1) Slow Clock Cycles
110 ;// <i> Number of Master Clock Cycles in 1us
122 ;// <i> Number of Master Clock Cycles in 1us
163 PMC_OUT EQU (0x03<<14) ; PLL Clock Frequency Range
165 PMC_USBDIV EQU (0x03<<28) ; USB Clock Divider
166 PMC_CSS EQU (3<<0) ; Clock Source Selection
170 PMC_MCKRDY EQU (1<<3) ; Master Clock Status
182 ;// <o2.14..15> OUT: PLL Clock Frequency Range
186 ;// <o2.28..29> USBDIV: USB Clock Divider
189 ;// <o3.0..1> CSS: Clock Source Selection
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/nrf52832-nimble/rt-thread/libcpu/arm/AT91SAM7S/
H A Dstart_rvds.S93 ;// <i> External Reset Time in 2^(ERSTL+1) Slow Clock Cycles
107 ;// <i> Number of Master Clock Cycles in 1us
119 ;// <i> Number of Master Clock Cycles in 1us
160 PMC_OUT EQU (0x03<<14) ; PLL Clock Frequency Range
162 PMC_USBDIV EQU (0x03<<28) ; USB Clock Divider
163 PMC_CSS EQU (3<<0) ; Clock Source Selection
167 PMC_MCKRDY EQU (1<<3) ; Master Clock Status
179 ;// <o2.14..15> OUT: PLL Clock Frequency Range
183 ;// <o2.28..29> USBDIV: USB Clock Divider
186 ;// <o3.0..1> CSS: Clock Source Selection
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/nrf52832-nimble/packages/NimBLE-latest/docs/ble_setup/
H A Dble_lp_clock.rst1 Configure clock for controller
6 Hz clock, the OS cputime has to be configured accordingly.
24 - OS cputime timer source shall be set to 32768 Hz clock source
25 - Default 1 MHz clock source can be disabled if not used by application
26 - 32768 Hz clock source shall be enabled
30 Hz clock. Also, timer 0 can be disabled since this is the default source
31 for OS cputime clock and is no longer used. The configuration will look
54 controller to turn on the necessary clock source(s) for the radio and
/nrf52832-nimble/nordic/nrfx/drivers/include/
H A Dnrfx_clock.h44 * @defgroup nrfx_clock CLOCK driver
47 * @brief CLOCK peripheral driver.
51 * @brief Clock events.
62 * @brief Clock event handler.
82 * @brief Function for enabling interrupts in the clock module.
87 * @brief Function for disabling interrupts in the clock module.
92 * @brief Function for uninitializing the clock module.
139 …* @retval NRFX_ERROR_INVALID_STATE If the low-frequency of high-frequency clock is …
165 /**@brief Function for returning a requested task address for the clock driver module.
173 /**@brief Function for returning a requested event address for the clock driver module.
/nrf52832-nimble/packages/NimBLE-latest/nimble/controller/src/
H A Dble_ll_xcvr.c90 * Called when the timer to turn on the RF CLOCK expires. This function checks
91 * the state of the clock. If the clock is off, the clock is turned on.
108 * start the clock at some later point.
110 * NOTE: presumes that the state of the rf clock was checked prior to calling.
122 * Starts the timer that will turn the rf clock on. The 'cputime' is
123 * the time at which the clock needs to be settled.
/nrf52832-nimble/rt-thread/libcpu/mips/x1000/
H A Dx1000_cpm.h83 /* Clock control register(CPCCR) */
120 /* Clock Status register(CPCSR) */
131 /* DDR clock divider register(DDCDR) */
146 /*MACPHY clock divider Register (MACCDR)*/
154 /* I2S device clock divider register(I2SCDR) */
164 /* I2S device clock divider register(I2SCDR1) */
170 /* LCD pix clock divider register(LPCDR) */
181 /* MSC clock divider register(MSCCDR) */
195 /* OTG PHY clock divider register(USBCDR) */
205 /* SSI clock divider register(SSICDR) */
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/nrf52832-nimble/rt-thread/libcpu/arm/lpc24xx/
H A Dstart_rvds.S27 ; * NO_CLOCK_SETUP: when set the startup code will not initialize Clock
28 ; * (used mostly when clock is already initialized from script .ini
123 ;----------------------- Clock Definitions -------------------------------------
131 CCLKCFG_OFS EQU 0x104 ; CPU Clock Divider Reg Offset
132 USBCLKCFG_OFS EQU 0x108 ; USB Clock Divider Reg Offset
133 CLKSRCSEL_OFS EQU 0x10C ; Clock Source Sel Reg Offset
135 PCLKSEL0_OFS EQU 0x1A8 ; Periph Clock Sel Reg 0 Offset
136 PCLKSEL1_OFS EQU 0x1AC ; Periph Clock Sel Reg 0 Offset
151 ;// <e> Clock Setup
160 ;// <h> PLL Clock Source Select Register (CLKSRCSEL)
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/nrf52832-nimble/rt-thread/components/drivers/include/drivers/
H A Dspi.h21 #define RT_SPI_CPHA (1<<0) /* bit[0]:CPHA, clock phase */
22 #define RT_SPI_CPOL (1<<1) /* bit[1]:CPOL, clock polarity */
24 * At CPOL=0 the base value of the clock is zero
25 * - For CPHA=0, data are captured on the clock's rising edge (low->high transition)
26 * and data are propagated on a falling edge (high->low clock transition).
27 * - For CPHA=1, data are captured on the clock's falling edge and data are
29 * At CPOL=1 the base value of the clock is one (inversion of CPOL=0)
30 * - For CPHA=0, data are captured on clock's falling edge and data are propagated
32 * - For CPHA=1, data are captured on clock's rising edge and data are propagated
/nrf52832-nimble/rt-thread/libcpu/arm/lpc214x/
H A Dstart_rvds.S94 ;// <i> Peripheral Bus Clock Rate
95 ;// <o1.0..1> VPBDIV: VPB Clock
96 ;// <0=> VPB Clock = CPU Clock / 4
97 ;// <1=> VPB Clock = CPU Clock
98 ;// <2=> VPB Clock = CPU Clock / 2
100 ;// <0=> XCLK Pin = CPU Clock / 4
101 ;// <1=> XCLK Pin = CPU Clock
102 ;// <2=> XCLK Pin = CPU Clock / 2
332 ; Switch to PLL Clock
/nrf52832-nimble/rt-thread/components/drivers/sdio/
H A Dmmcsd_core.c233 * of 64 clock cycles. in mmcsd_get_cid()
310 * of 64 clock cycles. in mmcsd_get_csd()
391 mmcsd_dbg("clock %uHz busmode %u powermode %u cs %u Vdd %u " in mmcsd_set_iocfg()
393 io_cfg->clock, io_cfg->bus_mode, in mmcsd_set_iocfg()
410 * Sets the host clock to the highest possible frequency that
417 LOG_W("clock too low!"); in mmcsd_set_clock()
420 host->io_cfg.clock = clk; in mmcsd_set_clock()
479 (card->host->io_cfg.clock / 1000); in mmcsd_set_data_timeout()
570 host->io_cfg.clock = host->freq_min; in mmcsd_power_up()
575 * This delay must be at least 74 clock sizes, or 1 ms, or the in mmcsd_power_up()
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/nrf52832-nimble/rt-thread/components/net/lwip-2.1.0/src/include/lwip/apps/
H A Dsntp_opts.h109 * Compensate for the round-trip delay by calculating the clock offset from
114 * for setting the system clock with sub-second precision. Likewise, either
121 * between the local clock and the NTP server clock must not be larger than
123 * to setting the clock without compensation. In order to ensure that the local
124 * clock is always within the permitted range for compensation, even at first
/nrf52832-nimble/nordic/nrfx/mdk/
H A Dsystem_nrf52810.h33 extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
52 * @brief Updates the SystemCoreClock with current core Clock
H A Dsystem_nrf52840.h33 extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
52 * @brief Updates the SystemCoreClock with current core Clock
H A Dsystem_nrf9160.h33 extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
52 * @brief Updates the SystemCoreClock with current core Clock
H A Dsystem_nrf52.h33 extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
52 * @brief Updates the SystemCoreClock with current core Clock
H A Dsystem_nrf51.h33 extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
52 * @brief Updates the SystemCoreClock with current core Clock
/nrf52832-nimble/packages/NimBLE-latest/nimble/controller/
H A Dsyscfg.yml28 Used by BSP packages to configure LP clock for controller.
46 # Sleep clock accuracy (sca). This is the amount of drift in the system
63 # if your clock drift is 101 ppm, your master should be set to 2.
64 # if your clock drift is 20, your master sca should be set to 7.
69 description: 'The system clock accuracy of the device.'
188 used to turn on/off the clock used for the radio (assuming
/nrf52832-nimble/rt-thread/components/net/lwip-1.4.1/src/netif/ppp/
H A Drandm.c64 * real-time clock. We'll accumulate more randomness as soon
173 * The current method uses the fields from the real time clock,
177 * repeat after each boot and the real time clock may not be
189 * Initialize our seed using the real-time clock, the idle in avRandomInit()
191 * tick counter. The real-time clock and the hardware in avRandomInit()
239 * seeded by the real time clock.
/nrf52832-nimble/rt-thread/components/net/uip/rt-thread/
H A Dclock-arch.c31 * $Id: clock-arch.c,v 1.2 2006/06/12 08:00:31 adam Exp $
36 * Implementation of architecture-specific clock functionality
41 #include "clock-arch.h"
/nrf52832-nimble/rt-thread/components/net/uip/unix/
H A Dclock-arch.c31 * $Id: clock-arch.c,v 1.2 2006/06/12 08:00:31 adam Exp $
36 * Implementation of architecture-specific clock functionality
41 #include "clock-arch.h"

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