1*042d53a7SEvalZeroConfigure clock for controller 2*042d53a7SEvalZero------------------------------ 3*042d53a7SEvalZero 4*042d53a7SEvalZeroThe NimBLE stack uses OS cputime for scheduling various events inside 5*042d53a7SEvalZerocontroller. Since the code of controller is optimized to work with 32768 6*042d53a7SEvalZeroHz clock, the OS cputime has to be configured accordingly. 7*042d53a7SEvalZero 8*042d53a7SEvalZeroTo make things easier, controller package (``net/nimble/controller``) 9*042d53a7SEvalZerodefines new system configuration setting ``BLE_LP_CLOCK`` as sets it to 10*042d53a7SEvalZero``1`` so other packages can be configured if necessary. The next section 11*042d53a7SEvalZerodescribes configuration required for controller to work properly. 12*042d53a7SEvalZero 13*042d53a7SEvalZeroSystem configuration 14*042d53a7SEvalZero~~~~~~~~~~~~~~~~~~~~ 15*042d53a7SEvalZero 16*042d53a7SEvalZero**Note:** All BSPs based on nRF5x have below settings automatically 17*042d53a7SEvalZeroapplied when ``BLE_LP_CLOCK`` is set, there is no need to configure this 18*042d53a7SEvalZeroin application. 19*042d53a7SEvalZero 20*042d53a7SEvalZeroThe following things need to be configured for NimBLE controller to work 21*042d53a7SEvalZeroproperly: 22*042d53a7SEvalZero 23*042d53a7SEvalZero- OS cputime frequency shall be set to ``32768`` 24*042d53a7SEvalZero- OS cputime timer source shall be set to 32768 Hz clock source 25*042d53a7SEvalZero- Default 1 MHz clock source can be disabled if not used by application 26*042d53a7SEvalZero- 32768 Hz clock source shall be enabled 27*042d53a7SEvalZero- Crystal settling time shall be set to non-zero value (see below) 28*042d53a7SEvalZero 29*042d53a7SEvalZeroFor example, on nRF52 platform timer 5 can be used as source for 32768 30*042d53a7SEvalZeroHz clock. Also, timer 0 can be disabled since this is the default source 31*042d53a7SEvalZerofor OS cputime clock and is no longer used. The configuration will look 32*042d53a7SEvalZeroas below: 33*042d53a7SEvalZero 34*042d53a7SEvalZero:: 35*042d53a7SEvalZero 36*042d53a7SEvalZero syscfg.vals: 37*042d53a7SEvalZero OS_CPUTIME_FREQ: 32768 38*042d53a7SEvalZero OS_CPUTIME_TIMER_NUM: 5 39*042d53a7SEvalZero TIMER_0: 0 40*042d53a7SEvalZero TIMER_5: 1 41*042d53a7SEvalZero BLE_XTAL_SETTLE_TIME: 1500 42*042d53a7SEvalZero 43*042d53a7SEvalZeroOn nRF51 platform the only difference is to use timer 3 instead of timer 44*042d53a7SEvalZero5. 45*042d53a7SEvalZero 46*042d53a7SEvalZeroOn platforms without 32768 Hz crystal available it usually can be 47*042d53a7SEvalZerosynthesized by setting ``XTAL_32768_SYNTH`` to ``1`` - this is also 48*042d53a7SEvalZeroalready configured in existing BSPs. 49*042d53a7SEvalZero 50*042d53a7SEvalZeroCrystal settle time configuration 51*042d53a7SEvalZero~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 52*042d53a7SEvalZero 53*042d53a7SEvalZeroThe configuration variable ``BLE_XTAL_SETTLE_TIME`` is used by the 54*042d53a7SEvalZerocontroller to turn on the necessary clock source(s) for the radio and 55*042d53a7SEvalZeroassociated peripherals prior to Bluetooth events (advertising, scanning, 56*042d53a7SEvalZeroconnections, etc). For the nRF5x platforms, the HFXO needs to be turned 57*042d53a7SEvalZeroon prior to using the radio and the ``BLE_XTAL_SETTLE_TIME`` must be set 58*042d53a7SEvalZeroto accommodate this time. The amount of time required is board 59*042d53a7SEvalZerodependent, so users must characterize their hardware and set 60*042d53a7SEvalZero``BLE_XTAL_SETTLE_TIME`` accordingly. The current value of 1500 61*042d53a7SEvalZeromicroseconds is a fairly long time and was intended to work for most, if 62*042d53a7SEvalZeronot all, platforms. 63*042d53a7SEvalZero 64*042d53a7SEvalZeroNote that changing this time will impact battery life with the amount 65*042d53a7SEvalZerodepending on the application. The HFXO draws a fairly large amount of 66*042d53a7SEvalZerocurrent when running so keeping this time as small as possible will 67*042d53a7SEvalZeroreduce overall current drain. 68