Home
last modified time | relevance | path

Searched full:bits (Results 1 – 25 of 306) sorted by relevance

12345678910>>...13

/nrf52832-nimble/rt-thread/components/dfs/filesystems/jffs2/cyg/compress/src/
H A Dinffast.c46 state->bits < 8
56 - The maximum input bits used by a length/distance pair is 15 bits for the
57 length code, 5 bits for the length extra, 15 bits for the distance code,
58 and 13 bits for the distance extra. This totals 48 bits, or six bytes.
85 unsigned bits; /* local strm->bits */ local
91 unsigned op; /* code bits, operation, extra bits, or */
112 bits = state->bits;
121 if (bits < 15) {
122 hold += (unsigned long)(PUP(in)) << bits;
123 bits += 8;
[all …]
H A Dinfback.c83 unsigned sym, bits; local
94 bits = 9;
95 inflate_table(LENS, state->lens, 288, &(next), &(bits), state->work);
101 bits = 5;
102 inflate_table(DISTS, state->lens, 32, &(next), &(bits), state->work);
126 bits = state->bits; \
137 state->bits = bits; \
144 bits = 0; \
167 hold += (unsigned long)(*next++) << bits; \
168 bits += 8; \
[all …]
H A Dalgorithm.txt67 inflate() sets up a first level table that covers some number of bits of
68 input less than the length of longest code. It gets that many bits from the
70 code is that many bits or less and how many, and if it is, it will tell
72 grabs more bits and tries to decode a longer code.
74 How many bits to make the first lookup is a tradeoff between the time it
78 building the table ends up taking a lot longer for more bits since short
80 simply to make the number of bits in the first table a variable, and then
84 of the first table is nine bits. Also the distance trees have 30 possible
85 values, and the size of the first table is six bits. Note that for each of
88 little more than eight bits for 286 symbols and a little less than five bits
[all …]
H A Dinflate.c30 * - Add comments on state->bits assertion in inffast.c
122 state->bits = 0;
128 int ZEXPORT inflatePrime(strm, bits, value) in inflatePrime() argument
130 int bits;
137 if (bits > 16 || state->bits + bits > 32) return Z_STREAM_ERROR;
138 value &= (1L << bits) - 1;
139 state->hold += value << state->bits;
140 state->bits += bits;
215 unsigned sym, bits; local
226 bits = 9;
[all …]
H A Dinftrees.h14 table that indexes more bits of the code. op indicates whether
17 pointer, the low four bits of op is the number of index bits of
18 that table. For a length or distance, the low four bits of op
19 is the number of extra bits to get after the code. bits is
20 the number of bits in this code or part of the code to drop off
25 unsigned char op; /* operation, extra bits, table bits */
26 unsigned char bits; /* bits in this part of the code */ member
32 0000tttt - table link, tttt != 0 is the number of table index bits
33 0001eeee - length or distance, eeee is the number of extra bits
55 unsigned FAR *bits, unsigned short FAR *work));
H A Dinftrees.c23 whose indices are 0..2^bits-1. work is a writable array of at least
27 on return points to the next available entry's address. bits is the
28 requested root table index bits, and on return it is the actual root
29 table index bits. It will differ if the request is greater than the
32 int inflate_table(type, lens, codes, table, bits, work) in inflate_table() argument
37 unsigned FAR *bits;
40 unsigned len; /* a code's length in bits */
43 unsigned root; /* number of index bits for root table */
44 unsigned curr; /* number of index bits for current table */
45 unsigned drop; /* code bits to drop for sub-table */
[all …]
H A Dtrees.c47 /* Bit length codes must not exceed MAX_BL_BITS bits */
53 /* repeat previous bit length 3-6 times (2 bits of repeat count) */
56 /* repeat a zero length 3-10 times (3 bits of repeat count) */
59 /* repeat a zero length 11-138 times (7 bits of repeat count) */
61 local const int extra_lbits[LENGTH_CODES] /* extra bits for each length code */
64 local const int extra_dbits[D_CODES] /* extra bits for each distance code */
67 local const int extra_blbits[BL_CODES]/* extra bits for each bit length code */
77 /* Number of bits used within bi_buf. (bi_buf might be implemented on
78 * more than 16 bits on some systems.)
99 * 5 bits.)
[all …]
H A Dinflate.h32 TYPE, /* i: waiting for type bits, including last-flag bit */
40 LENEXT, /* i: waiting for length extra bits */
42 DISTEXT, /* i: waiting for distance extra bits */
95 unsigned bits; /* number of bits in "in" */ member
100 unsigned extra; /* extra bits needed */
104 unsigned lenbits; /* index bits for lencode */
105 unsigned distbits; /* index bits for distcode */
H A Dinfblock.c16 #define bits word.what.Bits macro
28 3. There is an implied maximum of 7 bits for the bit length table and
29 15 bits for the actual data.
37 zero distance codes, which is sent as one code of zero bits in
42 cannot be used though, since there is no length base or extra bits
44 However, static trees define 32 codes (all 5 bits) to fill out the
48 8. The five bits following the block type is really the number of
50 9. Length codes 8,16,16 are interpreted as 13 length codes of 8 bits
56 11. Correction: 4 Bits: # of Bit Length codes - 4 (4 - 19)
127 uInt k; /* bits in bit buffer */
[all …]
H A Dinfutil.h15 TYPE, /* get type bits (3, including end bit) */
37 uInt table; /* table lengths (14 bits) */
51 uInt bitk; /* bits in bit buffer */
71 /* get bytes and bits */
87 /* masks for lower bits (size given to avoid silly warnings with Visual C++) */
/nrf52832-nimble/rt-thread/components/dfs/filesystems/jffs2/src/
H A Dcompr_rubin.c22 static void init_rubin(struct rubin_state *rs, int div, int *bits) in init_rubin() argument
31 rs->bits[c] = bits[c]; in init_rubin()
83 static void init_decode(struct rubin_state *rs, int div, int *bits) in init_decode() argument
85 init_rubin(rs, div, bits); in init_decode()
98 int c, bits = 0; in __do_decode() local
101 * First, work out how many bits we need from the input stream. in __do_decode()
106 bits++; in __do_decode()
115 rs->bit_number += bits; in __do_decode()
118 * Now get the bits. We really want this to be "get n bits". in __do_decode()
126 } while (--bits); in __do_decode()
[all …]
/nrf52832-nimble/rt-thread/components/net/freemodbus/modbus/functions/
H A Dmbutils.c63 /* How many bits precede our bits to set. */ in xMBUtilSetBits()
66 /* Move bit field into position over bits to set */ in xMBUtilSetBits()
69 /* Prepare a mask for setting the new bits. */ in xMBUtilSetBits()
73 /* copy bits into temporary storage. */ in xMBUtilSetBits()
77 /* Zero out bit field bits and then or value bits into them. */ in xMBUtilSetBits()
80 /* move bits back into storage */ in xMBUtilSetBits()
97 /* How many bits precede our bits to set. */ in xMBUtilGetBits()
100 /* Prepare a mask for setting the new bits. */ in xMBUtilGetBits()
103 /* copy bits into temporary storage. */ in xMBUtilGetBits()
107 /* throw away unneeded bits. */ in xMBUtilGetBits()
[all …]
/nrf52832-nimble/rt-thread/components/net/freemodbus/modbus/include/
H A Dmbutils.h47 /*! \brief Function to set bits in a byte buffer.
50 * The array used for storing the bits must always be a multiple of two
51 * bytes. Up to eight bits can be set or cleared in one operation.
57 * \param usBitOffset The starting address of the bits to set. The first
59 * \param ucNBits Number of bits to modify. The value must always be smaller
61 * \param ucValues Thew new values for the bits. The value for the first bit
74 * // Set bits 8 - 11 to 0x05 and bits 12 - 15 to 0x0A;
81 /*! \brief Function to read bits in a byte buffer.
87 * \param usBitOffset The starting address of the bits to set. The first
89 * \param ucNBits Number of bits to modify. The value must always be smaller
[all …]
/nrf52832-nimble/rt-thread/components/net/lwip-2.1.0/src/include/netif/ppp/
H A Dmppe.h51 /* option bits for ccp_options.mppe */
60 #define MPPE_OPT_UNKNOWN 0x40 /* Bits !defined in RFC 3078 were set */
64 * And unfortunately, we cannot share the same bits for the option
92 /* S,L bits */ \
98 /* M,D,C bits not supported */ \
112 /* S,L bits */ \
118 /* M,D,C bits */ \
126 /* Other bits */ \
160 * If we want to support 56-bit, the unit has to change to bits
162 u8_t bits; /* MPPE control bits */ member
H A Dvj.h44 * The first octet contains the packet type (top 3 bits), TCP
46 * numbers have changed (bottom 5 bits). The next octet is a
78 * three bits are actual packet type. For backward compatibility
79 * and in the interest of conserving bits, numbers are chosen so the
90 /* Bits in first octet of compressed packet */
91 #define NEW_C 0x40 /* flag bits for what changed in a packet */
/nrf52832-nimble/rt-thread/components/net/lwip-2.0.2/src/include/netif/ppp/
H A Dmppe.h47 /* option bits for ccp_options.mppe */
56 #define MPPE_OPT_UNKNOWN 0x40 /* Bits !defined in RFC 3078 were set */
60 * And unfortunately, we cannot share the same bits for the option
88 /* S,L bits */ \
94 /* M,D,C bits not supported */ \
108 /* S,L bits */ \
114 /* M,D,C bits */ \
122 /* Other bits */ \
156 * If we want to support 56-bit, the unit has to change to bits
158 u8_t bits; /* MPPE control bits */ member
H A Dvj.h40 * The first octet contains the packet type (top 3 bits), TCP
42 * numbers have changed (bottom 5 bits). The next octet is a
74 * three bits are actual packet type. For backward compatibility
75 * and in the interest of conserving bits, numbers are chosen so the
86 /* Bits in first octet of compressed packet */
87 #define NEW_C 0x40 /* flag bits for what changed in a packet */
/nrf52832-nimble/rt-thread/libcpu/arm/am335x/
H A Dstart_iar.s14 ; Mode, correspords to bits 0-5 in CPSR
16 MODE_MSK DEFINE 0x1F ; Bit mask for mode bits in CPSR
126 BIC r0, r0, #MODE_MSK ; Clear the mode bits
127 ORR r0, r0, #IRQ_MODE ; Set IRQ mode bits
133 BIC r0, r0, #MODE_MSK ; Clear the mode bits
134 ORR r0, r0, #FIQ_MODE ; Set FIR mode bits
139 BIC r0,r0,#MODE_MSK ; Clear the mode bits
140 ORR r0,r0,#ABT_MODE ; Set Abort mode bits
145 BIC r0,r0,#MODE_MSK ; Clear the mode bits
146 ORR r0,r0,#UND_MODE ; Set Undefined mode bits
[all …]
/nrf52832-nimble/rt-thread/libcpu/arm/AT91SAM7S/
H A Dserial.h28 #define AT91C_US_RSTSTA ((unsigned int) 0x1 << 8) /* US Reset Status Bits */
44 #define AT91C_US_CHRL_5_BITS ((unsigned int) 0x0 << 6) /* USAR) Character Length: 5 bits */
45 #define AT91C_US_CHRL_6_BITS ((unsigned int) 0x1 << 6) /* USAR) Character Length: 6 bits */
46 #define AT91C_US_CHRL_7_BITS ((unsigned int) 0x2 << 6) /* USAR) Character Length: 7 bits */
47 #define AT91C_US_CHRL_8_BITS ((unsigned int) 0x3 << 6) /* USAR) Character Length: 8 bits */
57 …gned int) 0x1 << 12) /* USART Asynchronous (SYNC=0) 2 stop bits Synchronous (SYNC=1) 2 stop bits */
58 #define AT91C_US_NBSTOP_2_BIT ((unsigned int) 0x2 << 12) /* USART 2 stop bits */
/nrf52832-nimble/packages/NimBLE-latest/ext/tinycrypt/include/tinycrypt/
H A Dccm_mode.h141 * The byte FLAGS is composed by the following 8 bits:
142 * 0-2 bits: used to represent the value of q-1
150 * The byte FLAGS is composed by the following 8 bits:
151 * 0-2 bits: used to represent the value of q-1
152 * 3-5 bits: mac length (encoded as: (mlen-2)/2)
187 * The byte FLAGS is composed by the following 8 bits:
188 * 0-2 bits: used to represent the value of q-1
196 * The byte FLAGS is composed by the following 8 bits:
197 * 0-2 bits: used to represent the value of q-1
198 * 3-5 bits: mac length (encoded as: (mlen-2)/2)
/nrf52832-nimble/rt-thread/libcpu/mips/common/
H A Dmipsregs.h144 * Bits 18 - 20 of the FPU Status Register will be read as 0,
176 /* Bits 0 and 1 of FPU Status Register specify the rounding mode */
185 * R4x00 interrupt enable / cause bits
197 * R4x00 interrupt cause bits
240 /* bits 6 & 7 are reserved on R[23]000 */
246 * Bits specific to the R4640/R4650
291 * Status register bits available in all MIPS CPUs.
372 * Bits in the coprocessor 0 config register.
374 /* Generic bits. */
386 /* Bits common to various processors. */
[all …]
/nrf52832-nimble/rt-thread/components/net/lwip-2.1.0/src/netif/
H A Dlowpan6_common.c502 …GF(LWIP_LOWPAN6_DECOMPRESSION_DEBUG, ("SAM == 00, no src compression, fetching 128bits inline\n")); in lowpan6_decompress_hdr()
507 … LWIP_DEBUGF(LWIP_LOWPAN6_DECOMPRESSION_DEBUG, ("SAM == 01, src compression, 64bits inline\n")); in lowpan6_decompress_hdr()
508 /* set 64 bits to link local */ in lowpan6_decompress_hdr()
515 … LWIP_DEBUGF(LWIP_LOWPAN6_DECOMPRESSION_DEBUG, ("SAM == 10, src compression, 16bits inline\n")); in lowpan6_decompress_hdr()
516 /* set 96 bits to link local */ in lowpan6_decompress_hdr()
520 /* extract remaining 16bits from inline bytes, increase offset */ in lowpan6_decompress_hdr()
525 …LWIP_DEBUGF(LWIP_LOWPAN6_DECOMPRESSION_DEBUG, ("SAM == 11, src compression, 0bits inline, using ot… in lowpan6_decompress_hdr()
573 /* determine further address bits */ in lowpan6_decompress_hdr()
575 /* SAM=01, load additional 64bits */ in lowpan6_decompress_hdr()
577 …LWIP_DEBUGF(LWIP_LOWPAN6_DECOMPRESSION_DEBUG, ("SAM == 01, context compression, 64bits inline\n")); in lowpan6_decompress_hdr()
[all …]
/nrf52832-nimble/rt-thread/components/net/lwip-1.4.1/src/netif/ppp/
H A Dvj.h37 * The first octet contains the packet type (top 3 bits), TCP
39 * numbers have changed (bottom 5 bits). The next octet is a
71 * three bits are actual packet type. For backward compatibility
72 * and in the interest of conserving bits, numbers are chosen so the
83 /* Bits in first octet of compressed packet */
84 #define NEW_C 0x40 /* flag bits for what changed in a packet */
/nrf52832-nimble/rt-thread/components/net/lwip-2.1.0/src/include/netif/
H A Dieee802154.h75 /* Addressing modes (2 bits) */
82 #define IEEE_802154_FC_FT_MASK 0x0007 /* bits 0..2: Frame Type */
98 #define IEEE_802154_FC_DST_ADDR_MODE_MASK 0x0c00 /* bits 10..11: Destination Addressing Mode */
102 #define IEEE_802154_FC_FRAME_VERSION_MASK 0x3000 /* bits 12..13: Frame Version */
104 #define IEEE_802154_FC_SRC_ADDR_MODE_MASK 0xc000 /* bits 14..15: Source Addressing Mode */
/nrf52832-nimble/nordic/nrfx/mdk/
H A Dnrf9160_bitfields.h82 /* Bits 3..0 : Channel that task HFCLKSTART will subscribe to */
95 /* Bits 3..0 : Channel that task HFCLKSTOP will subscribe to */
108 /* Bits 3..0 : Channel that task LFCLKSTART will subscribe to */
121 /* Bits 3..0 : Channel that task LFCLKSTOP will subscribe to */
152 /* Bits 3..0 : Channel that event HFCLKSTARTED will publish to. */
165 /* Bits 3..0 : Channel that event LFCLKSTARTED will publish to. */
274 /* Bits 1..0 : Active clock source */
284 /* Bits 1..0 : Clock source */
294 /* Bits 1..0 : Clock source */
321 /* Bits 31..0 : Data received from debugger */
[all …]

12345678910>>...13