| /nrf52832-nimble/nordic/nrfx/drivers/src/ |
| H A D | nrfx_gpiote.c | 50 /* Check if every pin can be encoded on provided number of bits. */
103 __STATIC_INLINE bool pin_in_use(uint32_t pin) in pin_in_use() argument
105 return (m_cb.pin_assignments[pin] != PIN_NOT_USED); in pin_in_use()
109 __STATIC_INLINE bool pin_in_use_as_non_task_out(uint32_t pin) in pin_in_use_as_non_task_out() argument
111 return (m_cb.pin_assignments[pin] == PIN_USED); in pin_in_use_as_non_task_out()
115 __STATIC_INLINE bool pin_in_use_by_te(uint32_t pin) in pin_in_use_by_te() argument
117 return (m_cb.pin_assignments[pin] >= 0 && m_cb.pin_assignments[pin] < GPIOTE_CH_NUM) ? in pin_in_use_by_te()
122 __STATIC_INLINE bool pin_in_use_by_port(uint32_t pin) in pin_in_use_by_port() argument
124 return (m_cb.pin_assignments[pin] >= GPIOTE_CH_NUM); in pin_in_use_by_port()
128 __STATIC_INLINE bool pin_in_use_by_gpiote(uint32_t pin) in pin_in_use_by_gpiote() argument
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| /nrf52832-nimble/nordic/nrfx/drivers/include/ |
| H A D | nrfx_gpiote.h | 50 /**@brief Input pin configuration. */
55 …ol is_watcher : 1; /**< True when the input pin is tracking an output pin. */
60 /**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect low-to-high transiti…
70 /**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect high-to-low transiti…
80 /**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect any change on the pi…
90 /**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect low-to-high transiti…
102 /**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect high-to-low transiti…
114 /**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect any change on the pi…
127 /**@brief Output pin configuration. */
130 nrf_gpiote_polarity_t action; /**< Configuration of the pin task. */
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| H A D | nrfx_spis.h | 81 * @brief This value can be provided instead of a pin number for the signals MOSI
83 * does not need to be connected to a pin.
127 uint32_t miso_pin; //!< SPI MISO pin (optional).
130 uint32_t mosi_pin; //!< SPI MOSI pin (optional).
133 uint32_t sck_pin; //!< SPI SCK pin.
134 uint32_t csn_pin; //!< SPI CSN pin.
137 nrf_gpio_pin_pull_t csn_pullup; //!< CSN pin pull-up configuration.
138 nrf_gpio_pin_drive_t miso_drive; //!< MISO pin drive configuration.
161 * to detect falling edges on CSN pin.
177 * on CSN pin cannot be initialized. Possible
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| H A D | nrfx_i2s.h | 51 * @brief This value can be provided instead of a pin number for the signals
53 * and therefore does not need to be connected to a pin.
60 uint8_t sck_pin; ///< SCK pin number.
61 uint8_t lrck_pin; ///< LRCK pin number.
62 uint8_t mck_pin; ///< MCK pin number.
65 uint8_t sdout_pin; ///< SDOUT pin number.
68 uint8_t sdin_pin; ///< SDIN pin number.
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| H A D | nrfx_spim.h | 84 * @brief This value can be provided instead of a pin number for signals MOSI,
86 * therefore does not need to be connected to a pin.
95 uint8_t sck_pin; ///< SCK pin number.
96 uint8_t mosi_pin; ///< MOSI pin number (optional).
99 uint8_t miso_pin; ///< MISO pin number (optional).
102 uint8_t ss_pin; ///< Slave Select pin number (optional).
105 bool ss_active_high; ///< Polarity of the Slave Select pin during transmission.
114 uint8_t dcx_pin; ///< D/CX pin number (optional).
120 … use_hw_ss; ///< Indication to use software or hardware controlled Slave Select pin.
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| H A D | nrfx_spi.h | 81 * @brief This value can be provided instead of a pin number for signals MOSI,
83 * therefore does not need to be connected to a pin.
92 uint8_t sck_pin; ///< SCK pin number.
93 uint8_t mosi_pin; ///< MOSI pin number (optional).
96 uint8_t miso_pin; ///< MISO pin number (optional).
99 uint8_t ss_pin; ///< Slave Select pin number (optional).
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| /nrf52832-nimble/nordic/nrfx/hal/ |
| H A D | nrf_gpio.h | 64 * @brief Macro for mapping port and pin numbers to values understandable for nrf_gpio functions.
66 #define NRF_GPIO_PIN_MAP(port, pin) (((port) << 5) | ((pin) & 0x1F)) argument
69 * @brief Pin direction definitions.
87 …* @brief Enumerator used for selecting the pin to be pulled down or up at the time of pin configur…
91 NRF_GPIO_PIN_NOPULL = GPIO_PIN_CNF_PULL_Disabled, ///< Pin pull-up resistor disabled.
92 NRF_GPIO_PIN_PULLDOWN = GPIO_PIN_CNF_PULL_Pulldown, ///< Pin pull-down resistor enabled.
93 NRF_GPIO_PIN_PULLUP = GPIO_PIN_CNF_PULL_Pullup, ///< Pin pull-up resistor enabled.
112 * @brief Enumerator used for selecting the pin to sense high or low level on the pin input.
116 NRF_GPIO_PIN_NOSENSE = GPIO_PIN_CNF_SENSE_Disabled, ///< Pin sense level disabled.
117 NRF_GPIO_PIN_SENSE_LOW = GPIO_PIN_CNF_SENSE_Low, ///< Pin sense low level.
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| H A D | nrf_gpiote.h | 274 * @param[in] pin Pin associated with event.
277 __STATIC_INLINE void nrf_gpiote_event_configure(uint32_t idx, uint32_t pin,
280 /**@brief Function for getting the pin associated with a GPIOTE event.
284 * @return Pin number.
312 * @param[in] pin Pin associated with event.
314 * @param[in] init_val Initial value of the pin.
316 __STATIC_INLINE void nrf_gpiote_task_configure(uint32_t idx, uint32_t pin,
320 /**@brief Function for forcing a specific state on the pin connected to GPIOTE.
323 * @param[in] init_val Pin state.
423 __STATIC_INLINE void nrf_gpiote_event_configure(uint32_t idx, uint32_t pin, nrf_gpiote_polarity_t p… in nrf_gpiote_event_configure() argument
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| H A D | nrf_spim.h | 51 * shall not be connected to a physical pin.
169 * @brief SPI CSN pin polarity.
348 * value instead of its pin number.
351 * @param[in] sck_pin SCK pin number.
352 * @param[in] mosi_pin MOSI pin number.
353 * @param[in] miso_pin MISO pin number.
362 * @brief Function for configuring the SPIM hardware CSN pin.
365 * value instead of its pin number.
368 * @param[in] pin CSN pin number.
369 * @param[in] polarity CSN pin polarity.
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| H A D | nrf_uart.h | 237 * @param pseltxd TXD pin number.
238 * @param pselrxd RXD pin number.
250 * @brief Function for getting TX pin.
257 * @brief Function for getting RX pin.
264 * @brief Function for getting RTS pin.
271 * @brief Function for getting CTS pin.
282 * @param pselrts RTS pin number.
283 * @param pselcts CTS pin number.
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| H A D | nrf_qspi.h | 51 * will not be connected to a physical pin.
56 * @brief Macro for setting proper values to pin registers.
59 #define NRF_QSPI_PIN_VAL(pin) (pin) == NRF_QSPI_PIN_NOT_CONNECTED ? 0xFFFFFFFF : (pin) argument
199 uint8_t sck_pin; /**< SCK pin number. */
200 uint8_t csn_pin; /**< Chip select pin number. */
201 uint8_t io0_pin; /**< IO0/MOSI pin number. */
202 uint8_t io1_pin; /**< IO1/MISO pin number. */
203 uint8_t io2_pin; /**< IO2 pin number (optional).
206 uint8_t io3_pin; /**< IO3 pin number (optional).
354 * value instead of its pin number.
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| /nrf52832-nimble/drivers/ |
| H A D | drv_gpio.c | 17 #define NRF_GPIO_INDEX(pin) (pin) argument
18 #define NRF_GPIO_PORT(pin) (NRF_P0) argument
19 #define NRF_GPIO_MASK(pin) (1 << NRF_GPIO_INDEX(pin)) argument
38 rt_int16_t pin; member
45 static void nrf_pin_mode(struct rt_device *device, rt_base_t pin, rt_base_t mode) in nrf_pin_mode() argument
50 int index = NRF_GPIO_INDEX(pin); in nrf_pin_mode()
73 port = NRF_GPIO_PORT(pin); in nrf_pin_mode()
79 port->DIRSET = NRF_GPIO_MASK(pin); in nrf_pin_mode()
80 port->OUTCLR = NRF_GPIO_MASK(pin); in nrf_pin_mode()
85 port->DIRCLR = NRF_GPIO_MASK(pin); in nrf_pin_mode()
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| /nrf52832-nimble/rt-thread/components/drivers/misc/ |
| H A D | pin.c | 11 #include <drivers/pin.h>
21 struct rt_device_pin *pin = (struct rt_device_pin *)dev; in _pin_read() local
24 RT_ASSERT(pin != RT_NULL); in _pin_read()
29 status->status = pin->ops->pin_read(dev, status->pin); in _pin_read()
36 struct rt_device_pin *pin = (struct rt_device_pin *)dev; in _pin_write() local
39 RT_ASSERT(pin != RT_NULL); in _pin_write()
44 pin->ops->pin_write(dev, (rt_base_t)status->pin, (rt_base_t)status->status); in _pin_write()
52 struct rt_device_pin *pin = (struct rt_device_pin *)dev; in _pin_control() local
55 RT_ASSERT(pin != RT_NULL); in _pin_control()
60 pin->ops->pin_mode(dev, (rt_base_t)mode->pin, (rt_base_t)mode->mode); in _pin_control()
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| /nrf52832-nimble/rt-thread/components/drivers/include/drivers/ |
| H A D | pin.h | 22 /* pin device and operations for RT-Thread */
51 rt_uint16_t pin; member
56 rt_uint16_t pin; member
61 rt_int16_t pin; member
68 void (*pin_mode)(struct rt_device *device, rt_base_t pin, rt_base_t mode);
69 void (*pin_write)(struct rt_device *device, rt_base_t pin, rt_base_t value);
70 int (*pin_read)(struct rt_device *device, rt_base_t pin);
73 rt_err_t (*pin_attach_irq)(struct rt_device *device, rt_int32_t pin,
75 rt_err_t (*pin_detach_irq)(struct rt_device *device, rt_int32_t pin);
76 rt_err_t (*pin_irq_enable)(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled);
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| /nrf52832-nimble/nordic/nrfx/mdk/ |
| H A D | nrf51_bitfields.h | 161 …01UL) /*!< ADC is enabled. If an analog input pin is selected as source of the conversion, the sel…
166 /* Bits 17..16 : ADC external reference pin selection. */
173 /* Bits 15..8 : ADC analog pin selection. */
576 /* Bit 31 : Pin 31. */
579 #define GPIO_OUT_PIN31_Low (0UL) /*!< Pin driver is low. */
580 #define GPIO_OUT_PIN31_High (1UL) /*!< Pin driver is high. */
582 /* Bit 30 : Pin 30. */
585 #define GPIO_OUT_PIN30_Low (0UL) /*!< Pin driver is low. */
586 #define GPIO_OUT_PIN30_High (1UL) /*!< Pin driver is high. */
588 /* Bit 29 : Pin 29. */
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| H A D | nrf9160_bitfields.h | 1367 …ription: Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pi…
1369 /* Bit 0 : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONF…
1375 …ription: Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pi…
1377 /* Bit 0 : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high. */
1383 …ription: Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pi…
1385 /* Bit 0 : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low. */
1430 /* Description: Description collection: Event generated from pin specified in CONFIG[n].PSEL */
1432 /* Bit 0 : Event generated from pin specified in CONFIG[n].PSEL */
1611 #define GPIOTE_CONFIG_OUTINIT_Low (0UL) /*!< Task mode: Initial value of pin before task triggering…
1612 #define GPIOTE_CONFIG_OUTINIT_High (1UL) /*!< Task mode: Initial value of pin before task triggerin…
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| H A D | nrf52810_bitfields.h | 1098 /* Description: Pin select */
1100 /* Bits 2..0 : Analog pin select */
1681 #define FICR_INFO_PACKAGE_PACKAGE_QF (0x2000UL) /*!< QFxx - 48-pin QFN */
1682 #define FICR_INFO_PACKAGE_PACKAGE_QC (0x2003UL) /*!< QCxx - 32-pin QFN */
1827 …tion: Description collection[n]: Task for writing to pin specified in CONFIG[n].PSEL. Action on pi…
1834 …tion: Description collection[n]: Task for writing to pin specified in CONFIG[n].PSEL. Action on pi…
1841 …tion: Description collection[n]: Task for writing to pin specified in CONFIG[n].PSEL. Action on pi…
1848 /* Description: Description collection[n]: Event generated from pin specified in CONFIG[n].PSEL */
1999 #define GPIOTE_CONFIG_OUTINIT_Low (0UL) /*!< Task mode: Initial value of pin before task triggering…
2000 #define GPIOTE_CONFIG_OUTINIT_High (1UL) /*!< Task mode: Initial value of pin before task triggerin…
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| H A D | nrf51.svd | 183 <description>Reset from pin-reset detected.</description>
545 …<description>Pin reset functionality configuration register. This register is a retained register.…
550 <description>Enable or disable pin reset in debug interface mode.</description>
555 <description>Pin reset in debug interface mode disabled.</description>
560 <description>Pin reset in debug interface mode enabled.</description>
5733 <description>Pin select for RTS.</description>
5739 <description>Pin select for TXD.</description>
5745 <description>Pin select for CTS.</description>
5751 <description>Pin select for RXD.</description>
6081 <description>Pin select for SCK.</description>
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| H A D | nrf52_bitfields.h | 1211 /* Bits 17..16 : Pin multiplexing of trace signals. */
1218 /* Bits 1..0 : Speed of Trace Port clock. Note that the TRACECLK pin will output this clock divided…
1371 /* Description: Pin select */
1373 /* Bits 2..0 : Analog pin select */
1921 #define FICR_INFO_PACKAGE_PACKAGE_QF (0x2000UL) /*!< QFxx - 48-pin QFN */
2286 #define GPIOTE_CONFIG_OUTINIT_Low (0UL) /*!< Task mode: Initial value of pin before task triggering…
2287 #define GPIOTE_CONFIG_OUTINIT_High (1UL) /*!< Task mode: Initial value of pin before task triggerin…
2292 …ITY_None (0UL) /*!< Task mode: No effect on pin from OUT[n] task. Event mode: no IN[n] event gener…
2293 …ITY_LoToHi (1UL) /*!< Task mode: Set pin from OUT[n] task. Event mode: Generate IN[n] event when r…
2294 …Y_HiToLo (2UL) /*!< Task mode: Clear pin from OUT[n] task. Event mode: Generate IN[n] event when f…
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| H A D | nrf52840_bitfields.h | 750 /* Bits 17..16 : Pin multiplexing of trace signals. See pin assignment chapter for more details. */
754 #define CLOCK_TRACECONFIG_TRACEMUX_Serial (1UL) /*!< SWO trace signal routed to pin. Remaining pins…
757 /* Bits 1..0 : Speed of trace port clock. Note that the TRACECLK pin will output this clock divided…
974 /* Description: Pin select */
976 /* Bits 2..0 : Analog pin select */
1569 #define FICR_INFO_PACKAGE_PACKAGE_QI (0x2004UL) /*!< QIxx - 73-pin aQFN */
1863 …tion: Description collection[n]: Task for writing to pin specified in CONFIG[n].PSEL. Action on pi…
1870 …tion: Description collection[n]: Task for writing to pin specified in CONFIG[n].PSEL. Action on pi…
1877 …tion: Description collection[n]: Task for writing to pin specified in CONFIG[n].PSEL. Action on pi…
1884 /* Description: Description collection[n]: Event generated from pin specified in CONFIG[n].PSEL */
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| H A D | nrf52810.svd | 307 <description>QFxx - 48-pin QFN</description>
312 <description>QCxx - 32-pin QFN</description>
747 <name>PIN</name>
2647 <description>Reset from pin-reset detected</description>
6495 <description>Pin select for RTS signal</description>
6501 <name>PIN</name>
6502 <description>Pin number</description>
6528 <description>Pin select for TXD signal</description>
6534 <name>PIN</name>
6535 <description>Pin number</description>
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| H A D | nrf9160.svd | 820 <description>Pin number configuration for TRACECLK</description>
826 <name>PIN</name>
827 <description>Pin number</description>
853 <description>Pin number configuration for TRACEDATA[0]</description>
859 <name>PIN</name>
860 <description>Pin number</description>
886 <description>Pin number configuration for TRACEDATA[1]</description>
892 <name>PIN</name>
893 <description>Pin number</description>
919 <description>Pin number configuration for TRACEDATA[2]</description>
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| H A D | nrf52.svd | 296 <description>QFxx - 48-pin QFN</description>
902 <name>PIN</name>
3599 <description>Reset from pin-reset detected</description>
4948 …<description>Speed of Trace Port clock. Note that the TRACECLK pin will output this clock divided …
4976 <description>Pin multiplexing of trace signals.</description>
8112 <description>Pin select for RTS signal</description>
8118 <name>PIN</name>
8119 <description>Pin number</description>
8145 <description>Pin select for TXD signal</description>
8151 <name>PIN</name>
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| H A D | nrf52840.svd | 302 <description>QIxx - 73-pin aQFN</description>
1070 <name>PIN</name>
1071 <description>Pin number of PORT onto which nRESET is exposed</description>
2072 …<description>Speed of trace port clock. Note that the TRACECLK pin will output this clock divided …
2100 …<description>Pin multiplexing of trace signals. See pin assignment chapter for more details.</desc…
2111 …<description>SWO trace signal routed to pin. Remaining pins can be used as regular GPIOs.</descrip…
2639 <description>Reset from pin-reset detected</description>
8726 <description>Pin select for RTS</description>
8732 <name>PIN</name>
8733 <description>Pin number</description>
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| /nrf52832-nimble/packages/NimBLE-latest/nimble/drivers/nrf52/ |
| H A D | syscfg.yml | 37 When set to proper GPIO pin number, this pin will be set
45 When set to proper GPIO pin number, this pin will be set
53 When set to proper GPIO pin number, this pin will be set
|