1*150812a8SEvalZero /*
2*150812a8SEvalZero * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
3*150812a8SEvalZero * All rights reserved.
4*150812a8SEvalZero *
5*150812a8SEvalZero * Redistribution and use in source and binary forms, with or without
6*150812a8SEvalZero * modification, are permitted provided that the following conditions are met:
7*150812a8SEvalZero *
8*150812a8SEvalZero * 1. Redistributions of source code must retain the above copyright notice, this
9*150812a8SEvalZero * list of conditions and the following disclaimer.
10*150812a8SEvalZero *
11*150812a8SEvalZero * 2. Redistributions in binary form must reproduce the above copyright
12*150812a8SEvalZero * notice, this list of conditions and the following disclaimer in the
13*150812a8SEvalZero * documentation and/or other materials provided with the distribution.
14*150812a8SEvalZero *
15*150812a8SEvalZero * 3. Neither the name of the copyright holder nor the names of its
16*150812a8SEvalZero * contributors may be used to endorse or promote products derived from this
17*150812a8SEvalZero * software without specific prior written permission.
18*150812a8SEvalZero *
19*150812a8SEvalZero * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20*150812a8SEvalZero * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21*150812a8SEvalZero * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22*150812a8SEvalZero * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23*150812a8SEvalZero * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24*150812a8SEvalZero * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25*150812a8SEvalZero * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26*150812a8SEvalZero * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27*150812a8SEvalZero * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28*150812a8SEvalZero * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29*150812a8SEvalZero * POSSIBILITY OF SUCH DAMAGE.
30*150812a8SEvalZero */
31*150812a8SEvalZero
32*150812a8SEvalZero #ifndef NRF_UART_H__
33*150812a8SEvalZero #define NRF_UART_H__
34*150812a8SEvalZero
35*150812a8SEvalZero #include <nrfx.h>
36*150812a8SEvalZero
37*150812a8SEvalZero #ifdef __cplusplus
38*150812a8SEvalZero extern "C" {
39*150812a8SEvalZero #endif
40*150812a8SEvalZero
41*150812a8SEvalZero /**
42*150812a8SEvalZero * @defgroup nrf_uart_hal UART HAL
43*150812a8SEvalZero * @{
44*150812a8SEvalZero * @ingroup nrf_uart
45*150812a8SEvalZero * @brief Hardware access layer for managing the UART peripheral.
46*150812a8SEvalZero */
47*150812a8SEvalZero
48*150812a8SEvalZero #define NRF_UART_PSEL_DISCONNECTED 0xFFFFFFFF
49*150812a8SEvalZero
50*150812a8SEvalZero /**
51*150812a8SEvalZero * @enum nrf_uart_task_t
52*150812a8SEvalZero * @brief UART tasks.
53*150812a8SEvalZero */
54*150812a8SEvalZero typedef enum
55*150812a8SEvalZero {
56*150812a8SEvalZero /*lint -save -e30 -esym(628,__INTADDR__)*/
57*150812a8SEvalZero NRF_UART_TASK_STARTRX = offsetof(NRF_UART_Type, TASKS_STARTRX), /**< Task for starting reception. */
58*150812a8SEvalZero NRF_UART_TASK_STOPRX = offsetof(NRF_UART_Type, TASKS_STOPRX), /**< Task for stopping reception. */
59*150812a8SEvalZero NRF_UART_TASK_STARTTX = offsetof(NRF_UART_Type, TASKS_STARTTX), /**< Task for starting transmission. */
60*150812a8SEvalZero NRF_UART_TASK_STOPTX = offsetof(NRF_UART_Type, TASKS_STOPTX), /**< Task for stopping transmission. */
61*150812a8SEvalZero NRF_UART_TASK_SUSPEND = offsetof(NRF_UART_Type, TASKS_SUSPEND), /**< Task for suspending UART. */
62*150812a8SEvalZero /*lint -restore*/
63*150812a8SEvalZero } nrf_uart_task_t;
64*150812a8SEvalZero
65*150812a8SEvalZero /**
66*150812a8SEvalZero * @enum nrf_uart_event_t
67*150812a8SEvalZero * @brief UART events.
68*150812a8SEvalZero */
69*150812a8SEvalZero typedef enum
70*150812a8SEvalZero {
71*150812a8SEvalZero /*lint -save -e30*/
72*150812a8SEvalZero NRF_UART_EVENT_CTS = offsetof(NRF_UART_Type, EVENTS_CTS), /**< Event from CTS line activation. */
73*150812a8SEvalZero NRF_UART_EVENT_NCTS = offsetof(NRF_UART_Type, EVENTS_NCTS), /**< Event from CTS line deactivation. */
74*150812a8SEvalZero NRF_UART_EVENT_RXDRDY = offsetof(NRF_UART_Type, EVENTS_RXDRDY),/**< Event from data ready in RXD. */
75*150812a8SEvalZero NRF_UART_EVENT_TXDRDY = offsetof(NRF_UART_Type, EVENTS_TXDRDY),/**< Event from data sent from TXD. */
76*150812a8SEvalZero NRF_UART_EVENT_ERROR = offsetof(NRF_UART_Type, EVENTS_ERROR), /**< Event from error detection. */
77*150812a8SEvalZero NRF_UART_EVENT_RXTO = offsetof(NRF_UART_Type, EVENTS_RXTO) /**< Event from receiver timeout. */
78*150812a8SEvalZero /*lint -restore*/
79*150812a8SEvalZero } nrf_uart_event_t;
80*150812a8SEvalZero
81*150812a8SEvalZero /**
82*150812a8SEvalZero * @enum nrf_uart_int_mask_t
83*150812a8SEvalZero * @brief UART interrupts.
84*150812a8SEvalZero */
85*150812a8SEvalZero typedef enum
86*150812a8SEvalZero {
87*150812a8SEvalZero /*lint -save -e30*/
88*150812a8SEvalZero NRF_UART_INT_MASK_CTS = UART_INTENCLR_CTS_Msk, /**< CTS line activation interrupt. */
89*150812a8SEvalZero NRF_UART_INT_MASK_NCTS = UART_INTENCLR_NCTS_Msk, /**< CTS line deactivation interrupt. */
90*150812a8SEvalZero NRF_UART_INT_MASK_RXDRDY = UART_INTENCLR_RXDRDY_Msk, /**< Data ready in RXD interrupt. */
91*150812a8SEvalZero NRF_UART_INT_MASK_TXDRDY = UART_INTENCLR_TXDRDY_Msk, /**< Data sent from TXD interrupt. */
92*150812a8SEvalZero NRF_UART_INT_MASK_ERROR = UART_INTENCLR_ERROR_Msk, /**< Error detection interrupt. */
93*150812a8SEvalZero NRF_UART_INT_MASK_RXTO = UART_INTENCLR_RXTO_Msk /**< Receiver timeout interrupt. */
94*150812a8SEvalZero /*lint -restore*/
95*150812a8SEvalZero } nrf_uart_int_mask_t;
96*150812a8SEvalZero
97*150812a8SEvalZero /**
98*150812a8SEvalZero * @enum nrf_uart_baudrate_t
99*150812a8SEvalZero * @brief Baudrates supported by UART.
100*150812a8SEvalZero */
101*150812a8SEvalZero typedef enum
102*150812a8SEvalZero {
103*150812a8SEvalZero NRF_UART_BAUDRATE_1200 = UART_BAUDRATE_BAUDRATE_Baud1200, /**< 1200 baud. */
104*150812a8SEvalZero NRF_UART_BAUDRATE_2400 = UART_BAUDRATE_BAUDRATE_Baud2400, /**< 2400 baud. */
105*150812a8SEvalZero NRF_UART_BAUDRATE_4800 = UART_BAUDRATE_BAUDRATE_Baud4800, /**< 4800 baud. */
106*150812a8SEvalZero NRF_UART_BAUDRATE_9600 = UART_BAUDRATE_BAUDRATE_Baud9600, /**< 9600 baud. */
107*150812a8SEvalZero NRF_UART_BAUDRATE_14400 = UART_BAUDRATE_BAUDRATE_Baud14400, /**< 14400 baud. */
108*150812a8SEvalZero NRF_UART_BAUDRATE_19200 = UART_BAUDRATE_BAUDRATE_Baud19200, /**< 19200 baud. */
109*150812a8SEvalZero NRF_UART_BAUDRATE_28800 = UART_BAUDRATE_BAUDRATE_Baud28800, /**< 28800 baud. */
110*150812a8SEvalZero NRF_UART_BAUDRATE_31250 = UART_BAUDRATE_BAUDRATE_Baud31250, /**< 31250 baud. */
111*150812a8SEvalZero NRF_UART_BAUDRATE_38400 = UART_BAUDRATE_BAUDRATE_Baud38400, /**< 38400 baud. */
112*150812a8SEvalZero NRF_UART_BAUDRATE_56000 = UART_BAUDRATE_BAUDRATE_Baud56000, /**< 56000 baud. */
113*150812a8SEvalZero NRF_UART_BAUDRATE_57600 = UART_BAUDRATE_BAUDRATE_Baud57600, /**< 57600 baud. */
114*150812a8SEvalZero NRF_UART_BAUDRATE_76800 = UART_BAUDRATE_BAUDRATE_Baud76800, /**< 76800 baud. */
115*150812a8SEvalZero NRF_UART_BAUDRATE_115200 = UART_BAUDRATE_BAUDRATE_Baud115200, /**< 115200 baud. */
116*150812a8SEvalZero NRF_UART_BAUDRATE_230400 = UART_BAUDRATE_BAUDRATE_Baud230400, /**< 230400 baud. */
117*150812a8SEvalZero NRF_UART_BAUDRATE_250000 = UART_BAUDRATE_BAUDRATE_Baud250000, /**< 250000 baud. */
118*150812a8SEvalZero NRF_UART_BAUDRATE_460800 = UART_BAUDRATE_BAUDRATE_Baud460800, /**< 460800 baud. */
119*150812a8SEvalZero NRF_UART_BAUDRATE_921600 = UART_BAUDRATE_BAUDRATE_Baud921600, /**< 921600 baud. */
120*150812a8SEvalZero NRF_UART_BAUDRATE_1000000 = UART_BAUDRATE_BAUDRATE_Baud1M, /**< 1000000 baud. */
121*150812a8SEvalZero } nrf_uart_baudrate_t;
122*150812a8SEvalZero
123*150812a8SEvalZero /**
124*150812a8SEvalZero * @enum nrf_uart_error_mask_t
125*150812a8SEvalZero * @brief Types of UART error masks.
126*150812a8SEvalZero */
127*150812a8SEvalZero typedef enum
128*150812a8SEvalZero {
129*150812a8SEvalZero NRF_UART_ERROR_OVERRUN_MASK = UART_ERRORSRC_OVERRUN_Msk, /**< Overrun error. */
130*150812a8SEvalZero NRF_UART_ERROR_PARITY_MASK = UART_ERRORSRC_PARITY_Msk, /**< Parity error. */
131*150812a8SEvalZero NRF_UART_ERROR_FRAMING_MASK = UART_ERRORSRC_FRAMING_Msk, /**< Framing error. */
132*150812a8SEvalZero NRF_UART_ERROR_BREAK_MASK = UART_ERRORSRC_BREAK_Msk, /**< Break error. */
133*150812a8SEvalZero } nrf_uart_error_mask_t;
134*150812a8SEvalZero
135*150812a8SEvalZero /**
136*150812a8SEvalZero * @enum nrf_uart_parity_t
137*150812a8SEvalZero * @brief Types of UART parity modes.
138*150812a8SEvalZero */
139*150812a8SEvalZero typedef enum
140*150812a8SEvalZero {
141*150812a8SEvalZero NRF_UART_PARITY_EXCLUDED = UART_CONFIG_PARITY_Excluded << UART_CONFIG_PARITY_Pos, /**< Parity excluded. */
142*150812a8SEvalZero NRF_UART_PARITY_INCLUDED = UART_CONFIG_PARITY_Included << UART_CONFIG_PARITY_Pos, /**< Parity included. */
143*150812a8SEvalZero } nrf_uart_parity_t;
144*150812a8SEvalZero
145*150812a8SEvalZero /**
146*150812a8SEvalZero * @enum nrf_uart_hwfc_t
147*150812a8SEvalZero * @brief Types of UART flow control modes.
148*150812a8SEvalZero */
149*150812a8SEvalZero typedef enum
150*150812a8SEvalZero {
151*150812a8SEvalZero NRF_UART_HWFC_DISABLED = UART_CONFIG_HWFC_Disabled, /**< HW flow control disabled. */
152*150812a8SEvalZero NRF_UART_HWFC_ENABLED = UART_CONFIG_HWFC_Enabled, /**< HW flow control enabled. */
153*150812a8SEvalZero } nrf_uart_hwfc_t;
154*150812a8SEvalZero
155*150812a8SEvalZero /**
156*150812a8SEvalZero * @brief Function for clearing a specific UART event.
157*150812a8SEvalZero *
158*150812a8SEvalZero * @param[in] p_reg Pointer to the peripheral registers structure.
159*150812a8SEvalZero * @param[in] event Event to clear.
160*150812a8SEvalZero */
161*150812a8SEvalZero __STATIC_INLINE void nrf_uart_event_clear(NRF_UART_Type * p_reg, nrf_uart_event_t event);
162*150812a8SEvalZero
163*150812a8SEvalZero /**
164*150812a8SEvalZero * @brief Function for checking the state of a specific UART event.
165*150812a8SEvalZero *
166*150812a8SEvalZero * @param[in] p_reg Pointer to the peripheral registers structure.
167*150812a8SEvalZero * @param[in] event Event to check.
168*150812a8SEvalZero *
169*150812a8SEvalZero * @retval True if event is set, False otherwise.
170*150812a8SEvalZero */
171*150812a8SEvalZero __STATIC_INLINE bool nrf_uart_event_check(NRF_UART_Type * p_reg, nrf_uart_event_t event);
172*150812a8SEvalZero
173*150812a8SEvalZero /**
174*150812a8SEvalZero * @brief Function for returning the address of a specific UART event register.
175*150812a8SEvalZero *
176*150812a8SEvalZero * @param[in] p_reg Pointer to the peripheral registers structure.
177*150812a8SEvalZero * @param[in] event Desired event.
178*150812a8SEvalZero *
179*150812a8SEvalZero * @retval Address of specified event register.
180*150812a8SEvalZero */
181*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_uart_event_address_get(NRF_UART_Type * p_reg,
182*150812a8SEvalZero nrf_uart_event_t event);
183*150812a8SEvalZero
184*150812a8SEvalZero /**
185*150812a8SEvalZero * @brief Function for enabling a specific interrupt.
186*150812a8SEvalZero *
187*150812a8SEvalZero * @param p_reg Pointer to the peripheral registers structure.
188*150812a8SEvalZero * @param int_mask Interrupts to enable.
189*150812a8SEvalZero */
190*150812a8SEvalZero __STATIC_INLINE void nrf_uart_int_enable(NRF_UART_Type * p_reg, uint32_t int_mask);
191*150812a8SEvalZero
192*150812a8SEvalZero /**
193*150812a8SEvalZero * @brief Function for retrieving the state of a given interrupt.
194*150812a8SEvalZero *
195*150812a8SEvalZero * @param p_reg Pointer to the peripheral registers structure.
196*150812a8SEvalZero * @param int_mask Mask of interrupt to check.
197*150812a8SEvalZero *
198*150812a8SEvalZero * @retval true If the interrupt is enabled.
199*150812a8SEvalZero * @retval false If the interrupt is not enabled.
200*150812a8SEvalZero */
201*150812a8SEvalZero __STATIC_INLINE bool nrf_uart_int_enable_check(NRF_UART_Type * p_reg, uint32_t int_mask);
202*150812a8SEvalZero
203*150812a8SEvalZero /**
204*150812a8SEvalZero * @brief Function for disabling specific interrupts.
205*150812a8SEvalZero *
206*150812a8SEvalZero * @param p_reg Pointer to the peripheral registers structure.
207*150812a8SEvalZero * @param int_mask Interrupts to disable.
208*150812a8SEvalZero */
209*150812a8SEvalZero __STATIC_INLINE void nrf_uart_int_disable(NRF_UART_Type * p_reg, uint32_t int_mask);
210*150812a8SEvalZero
211*150812a8SEvalZero /**
212*150812a8SEvalZero * @brief Function for getting error source mask. Function is clearing error source flags after reading.
213*150812a8SEvalZero *
214*150812a8SEvalZero * @param p_reg Pointer to the peripheral registers structure.
215*150812a8SEvalZero * @return Mask with error source flags.
216*150812a8SEvalZero */
217*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_uart_errorsrc_get_and_clear(NRF_UART_Type * p_reg);
218*150812a8SEvalZero
219*150812a8SEvalZero /**
220*150812a8SEvalZero * @brief Function for enabling UART.
221*150812a8SEvalZero *
222*150812a8SEvalZero * @param p_reg Pointer to the peripheral registers structure.
223*150812a8SEvalZero */
224*150812a8SEvalZero __STATIC_INLINE void nrf_uart_enable(NRF_UART_Type * p_reg);
225*150812a8SEvalZero
226*150812a8SEvalZero /**
227*150812a8SEvalZero * @brief Function for disabling UART.
228*150812a8SEvalZero *
229*150812a8SEvalZero * @param p_reg Pointer to the peripheral registers structure.
230*150812a8SEvalZero */
231*150812a8SEvalZero __STATIC_INLINE void nrf_uart_disable(NRF_UART_Type * p_reg);
232*150812a8SEvalZero
233*150812a8SEvalZero /**
234*150812a8SEvalZero * @brief Function for configuring TX/RX pins.
235*150812a8SEvalZero *
236*150812a8SEvalZero * @param p_reg Pointer to the peripheral registers structure.
237*150812a8SEvalZero * @param pseltxd TXD pin number.
238*150812a8SEvalZero * @param pselrxd RXD pin number.
239*150812a8SEvalZero */
240*150812a8SEvalZero __STATIC_INLINE void nrf_uart_txrx_pins_set(NRF_UART_Type * p_reg, uint32_t pseltxd, uint32_t pselrxd);
241*150812a8SEvalZero
242*150812a8SEvalZero /**
243*150812a8SEvalZero * @brief Function for disconnecting TX/RX pins.
244*150812a8SEvalZero *
245*150812a8SEvalZero * @param p_reg Pointer to the peripheral registers structure.
246*150812a8SEvalZero */
247*150812a8SEvalZero __STATIC_INLINE void nrf_uart_txrx_pins_disconnect(NRF_UART_Type * p_reg);
248*150812a8SEvalZero
249*150812a8SEvalZero /**
250*150812a8SEvalZero * @brief Function for getting TX pin.
251*150812a8SEvalZero *
252*150812a8SEvalZero * @param p_reg Pointer to the peripheral registers structure.
253*150812a8SEvalZero */
254*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_uart_tx_pin_get(NRF_UART_Type * p_reg);
255*150812a8SEvalZero
256*150812a8SEvalZero /**
257*150812a8SEvalZero * @brief Function for getting RX pin.
258*150812a8SEvalZero *
259*150812a8SEvalZero * @param p_reg Pointer to the peripheral registers structure.
260*150812a8SEvalZero */
261*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_uart_rx_pin_get(NRF_UART_Type * p_reg);
262*150812a8SEvalZero
263*150812a8SEvalZero /**
264*150812a8SEvalZero * @brief Function for getting RTS pin.
265*150812a8SEvalZero *
266*150812a8SEvalZero * @param p_reg Pointer to the peripheral registers structure.
267*150812a8SEvalZero */
268*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_uart_rts_pin_get(NRF_UART_Type * p_reg);
269*150812a8SEvalZero
270*150812a8SEvalZero /**
271*150812a8SEvalZero * @brief Function for getting CTS pin.
272*150812a8SEvalZero *
273*150812a8SEvalZero * @param p_reg Pointer to the peripheral registers structure.
274*150812a8SEvalZero */
275*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_uart_cts_pin_get(NRF_UART_Type * p_reg);
276*150812a8SEvalZero
277*150812a8SEvalZero
278*150812a8SEvalZero /**
279*150812a8SEvalZero * @brief Function for configuring flow control pins.
280*150812a8SEvalZero *
281*150812a8SEvalZero * @param p_reg Pointer to the peripheral registers structure.
282*150812a8SEvalZero * @param pselrts RTS pin number.
283*150812a8SEvalZero * @param pselcts CTS pin number.
284*150812a8SEvalZero */
285*150812a8SEvalZero __STATIC_INLINE void nrf_uart_hwfc_pins_set(NRF_UART_Type * p_reg,
286*150812a8SEvalZero uint32_t pselrts,
287*150812a8SEvalZero uint32_t pselcts);
288*150812a8SEvalZero
289*150812a8SEvalZero /**
290*150812a8SEvalZero * @brief Function for disconnecting flow control pins.
291*150812a8SEvalZero *
292*150812a8SEvalZero * @param p_reg Pointer to the peripheral registers structure.
293*150812a8SEvalZero */
294*150812a8SEvalZero __STATIC_INLINE void nrf_uart_hwfc_pins_disconnect(NRF_UART_Type * p_reg);
295*150812a8SEvalZero
296*150812a8SEvalZero /**
297*150812a8SEvalZero * @brief Function for reading RX data.
298*150812a8SEvalZero *
299*150812a8SEvalZero * @param p_reg Pointer to the peripheral registers structure.
300*150812a8SEvalZero * @return Received byte.
301*150812a8SEvalZero */
302*150812a8SEvalZero __STATIC_INLINE uint8_t nrf_uart_rxd_get(NRF_UART_Type * p_reg);
303*150812a8SEvalZero
304*150812a8SEvalZero /**
305*150812a8SEvalZero * @brief Function for setting Tx data.
306*150812a8SEvalZero *
307*150812a8SEvalZero * @param p_reg Pointer to the peripheral registers structure.
308*150812a8SEvalZero * @param txd Byte.
309*150812a8SEvalZero */
310*150812a8SEvalZero __STATIC_INLINE void nrf_uart_txd_set(NRF_UART_Type * p_reg, uint8_t txd);
311*150812a8SEvalZero
312*150812a8SEvalZero /**
313*150812a8SEvalZero * @brief Function for starting an UART task.
314*150812a8SEvalZero *
315*150812a8SEvalZero * @param p_reg Pointer to the peripheral registers structure.
316*150812a8SEvalZero * @param task Task.
317*150812a8SEvalZero */
318*150812a8SEvalZero __STATIC_INLINE void nrf_uart_task_trigger(NRF_UART_Type * p_reg, nrf_uart_task_t task);
319*150812a8SEvalZero
320*150812a8SEvalZero /**
321*150812a8SEvalZero * @brief Function for returning the address of a specific task register.
322*150812a8SEvalZero *
323*150812a8SEvalZero * @param p_reg Pointer to the peripheral registers structure.
324*150812a8SEvalZero * @param task Task.
325*150812a8SEvalZero *
326*150812a8SEvalZero * @return Task address.
327*150812a8SEvalZero */
328*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_uart_task_address_get(NRF_UART_Type * p_reg, nrf_uart_task_t task);
329*150812a8SEvalZero
330*150812a8SEvalZero /**
331*150812a8SEvalZero * @brief Function for configuring UART.
332*150812a8SEvalZero *
333*150812a8SEvalZero * @param p_reg Pointer to the peripheral registers structure.
334*150812a8SEvalZero * @param hwfc Hardware flow control. Enabled if true.
335*150812a8SEvalZero * @param parity Parity. Included if true.
336*150812a8SEvalZero */
337*150812a8SEvalZero __STATIC_INLINE void nrf_uart_configure(NRF_UART_Type * p_reg,
338*150812a8SEvalZero nrf_uart_parity_t parity,
339*150812a8SEvalZero nrf_uart_hwfc_t hwfc);
340*150812a8SEvalZero
341*150812a8SEvalZero /**
342*150812a8SEvalZero * @brief Function for setting UART baudrate.
343*150812a8SEvalZero *
344*150812a8SEvalZero * @param p_reg Pointer to the peripheral registers structure.
345*150812a8SEvalZero * @param baudrate Baudrate.
346*150812a8SEvalZero */
347*150812a8SEvalZero __STATIC_INLINE void nrf_uart_baudrate_set(NRF_UART_Type * p_reg, nrf_uart_baudrate_t baudrate);
348*150812a8SEvalZero
349*150812a8SEvalZero #ifndef SUPPRESS_INLINE_IMPLEMENTATION
nrf_uart_event_clear(NRF_UART_Type * p_reg,nrf_uart_event_t event)350*150812a8SEvalZero __STATIC_INLINE void nrf_uart_event_clear(NRF_UART_Type * p_reg, nrf_uart_event_t event)
351*150812a8SEvalZero {
352*150812a8SEvalZero *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
353*150812a8SEvalZero #if __CORTEX_M == 0x04
354*150812a8SEvalZero volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
355*150812a8SEvalZero (void)dummy;
356*150812a8SEvalZero #endif
357*150812a8SEvalZero
358*150812a8SEvalZero }
359*150812a8SEvalZero
nrf_uart_event_check(NRF_UART_Type * p_reg,nrf_uart_event_t event)360*150812a8SEvalZero __STATIC_INLINE bool nrf_uart_event_check(NRF_UART_Type * p_reg, nrf_uart_event_t event)
361*150812a8SEvalZero {
362*150812a8SEvalZero return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
363*150812a8SEvalZero }
364*150812a8SEvalZero
nrf_uart_event_address_get(NRF_UART_Type * p_reg,nrf_uart_event_t event)365*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_uart_event_address_get(NRF_UART_Type * p_reg,
366*150812a8SEvalZero nrf_uart_event_t event)
367*150812a8SEvalZero {
368*150812a8SEvalZero return (uint32_t)((uint8_t *)p_reg + (uint32_t)event);
369*150812a8SEvalZero }
370*150812a8SEvalZero
nrf_uart_int_enable(NRF_UART_Type * p_reg,uint32_t int_mask)371*150812a8SEvalZero __STATIC_INLINE void nrf_uart_int_enable(NRF_UART_Type * p_reg, uint32_t int_mask)
372*150812a8SEvalZero {
373*150812a8SEvalZero p_reg->INTENSET = int_mask;
374*150812a8SEvalZero }
375*150812a8SEvalZero
nrf_uart_int_enable_check(NRF_UART_Type * p_reg,uint32_t int_mask)376*150812a8SEvalZero __STATIC_INLINE bool nrf_uart_int_enable_check(NRF_UART_Type * p_reg, uint32_t int_mask)
377*150812a8SEvalZero {
378*150812a8SEvalZero return (bool)(p_reg->INTENSET & int_mask);
379*150812a8SEvalZero }
380*150812a8SEvalZero
nrf_uart_int_disable(NRF_UART_Type * p_reg,uint32_t int_mask)381*150812a8SEvalZero __STATIC_INLINE void nrf_uart_int_disable(NRF_UART_Type * p_reg, uint32_t int_mask)
382*150812a8SEvalZero {
383*150812a8SEvalZero p_reg->INTENCLR = int_mask;
384*150812a8SEvalZero }
385*150812a8SEvalZero
nrf_uart_errorsrc_get_and_clear(NRF_UART_Type * p_reg)386*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_uart_errorsrc_get_and_clear(NRF_UART_Type * p_reg)
387*150812a8SEvalZero {
388*150812a8SEvalZero uint32_t errsrc_mask = p_reg->ERRORSRC;
389*150812a8SEvalZero p_reg->ERRORSRC = errsrc_mask;
390*150812a8SEvalZero return errsrc_mask;
391*150812a8SEvalZero }
392*150812a8SEvalZero
nrf_uart_enable(NRF_UART_Type * p_reg)393*150812a8SEvalZero __STATIC_INLINE void nrf_uart_enable(NRF_UART_Type * p_reg)
394*150812a8SEvalZero {
395*150812a8SEvalZero p_reg->ENABLE = UART_ENABLE_ENABLE_Enabled;
396*150812a8SEvalZero }
397*150812a8SEvalZero
nrf_uart_disable(NRF_UART_Type * p_reg)398*150812a8SEvalZero __STATIC_INLINE void nrf_uart_disable(NRF_UART_Type * p_reg)
399*150812a8SEvalZero {
400*150812a8SEvalZero p_reg->ENABLE = UART_ENABLE_ENABLE_Disabled;
401*150812a8SEvalZero }
402*150812a8SEvalZero
nrf_uart_txrx_pins_set(NRF_UART_Type * p_reg,uint32_t pseltxd,uint32_t pselrxd)403*150812a8SEvalZero __STATIC_INLINE void nrf_uart_txrx_pins_set(NRF_UART_Type * p_reg, uint32_t pseltxd, uint32_t pselrxd)
404*150812a8SEvalZero {
405*150812a8SEvalZero #if defined(UART_PSEL_RXD_CONNECT_Pos)
406*150812a8SEvalZero p_reg->PSEL.RXD = pselrxd;
407*150812a8SEvalZero #else
408*150812a8SEvalZero p_reg->PSELRXD = pselrxd;
409*150812a8SEvalZero #endif
410*150812a8SEvalZero #if defined(UART_PSEL_TXD_CONNECT_Pos)
411*150812a8SEvalZero p_reg->PSEL.TXD = pseltxd;
412*150812a8SEvalZero #else
413*150812a8SEvalZero p_reg->PSELTXD = pseltxd;
414*150812a8SEvalZero #endif
415*150812a8SEvalZero }
416*150812a8SEvalZero
nrf_uart_txrx_pins_disconnect(NRF_UART_Type * p_reg)417*150812a8SEvalZero __STATIC_INLINE void nrf_uart_txrx_pins_disconnect(NRF_UART_Type * p_reg)
418*150812a8SEvalZero {
419*150812a8SEvalZero nrf_uart_txrx_pins_set(p_reg, NRF_UART_PSEL_DISCONNECTED, NRF_UART_PSEL_DISCONNECTED);
420*150812a8SEvalZero }
421*150812a8SEvalZero
nrf_uart_tx_pin_get(NRF_UART_Type * p_reg)422*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_uart_tx_pin_get(NRF_UART_Type * p_reg)
423*150812a8SEvalZero {
424*150812a8SEvalZero #if defined(UART_PSEL_TXD_CONNECT_Pos)
425*150812a8SEvalZero return p_reg->PSEL.TXD;
426*150812a8SEvalZero #else
427*150812a8SEvalZero return p_reg->PSELTXD;
428*150812a8SEvalZero #endif
429*150812a8SEvalZero }
430*150812a8SEvalZero
nrf_uart_rx_pin_get(NRF_UART_Type * p_reg)431*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_uart_rx_pin_get(NRF_UART_Type * p_reg)
432*150812a8SEvalZero {
433*150812a8SEvalZero #if defined(UART_PSEL_RXD_CONNECT_Pos)
434*150812a8SEvalZero return p_reg->PSEL.RXD;
435*150812a8SEvalZero #else
436*150812a8SEvalZero return p_reg->PSELRXD;
437*150812a8SEvalZero #endif
438*150812a8SEvalZero }
439*150812a8SEvalZero
nrf_uart_rts_pin_get(NRF_UART_Type * p_reg)440*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_uart_rts_pin_get(NRF_UART_Type * p_reg)
441*150812a8SEvalZero {
442*150812a8SEvalZero #if defined(UART_PSEL_RTS_CONNECT_Pos)
443*150812a8SEvalZero return p_reg->PSEL.RTS;
444*150812a8SEvalZero #else
445*150812a8SEvalZero return p_reg->PSELRTS;
446*150812a8SEvalZero #endif
447*150812a8SEvalZero }
448*150812a8SEvalZero
nrf_uart_cts_pin_get(NRF_UART_Type * p_reg)449*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_uart_cts_pin_get(NRF_UART_Type * p_reg)
450*150812a8SEvalZero {
451*150812a8SEvalZero #if defined(UART_PSEL_RTS_CONNECT_Pos)
452*150812a8SEvalZero return p_reg->PSEL.CTS;
453*150812a8SEvalZero #else
454*150812a8SEvalZero return p_reg->PSELCTS;
455*150812a8SEvalZero #endif
456*150812a8SEvalZero }
457*150812a8SEvalZero
nrf_uart_hwfc_pins_set(NRF_UART_Type * p_reg,uint32_t pselrts,uint32_t pselcts)458*150812a8SEvalZero __STATIC_INLINE void nrf_uart_hwfc_pins_set(NRF_UART_Type * p_reg, uint32_t pselrts, uint32_t pselcts)
459*150812a8SEvalZero {
460*150812a8SEvalZero #if defined(UART_PSEL_RTS_CONNECT_Pos)
461*150812a8SEvalZero p_reg->PSEL.RTS = pselrts;
462*150812a8SEvalZero #else
463*150812a8SEvalZero p_reg->PSELRTS = pselrts;
464*150812a8SEvalZero #endif
465*150812a8SEvalZero
466*150812a8SEvalZero #if defined(UART_PSEL_RTS_CONNECT_Pos)
467*150812a8SEvalZero p_reg->PSEL.CTS = pselcts;
468*150812a8SEvalZero #else
469*150812a8SEvalZero p_reg->PSELCTS = pselcts;
470*150812a8SEvalZero #endif
471*150812a8SEvalZero }
472*150812a8SEvalZero
nrf_uart_hwfc_pins_disconnect(NRF_UART_Type * p_reg)473*150812a8SEvalZero __STATIC_INLINE void nrf_uart_hwfc_pins_disconnect(NRF_UART_Type * p_reg)
474*150812a8SEvalZero {
475*150812a8SEvalZero nrf_uart_hwfc_pins_set(p_reg, NRF_UART_PSEL_DISCONNECTED, NRF_UART_PSEL_DISCONNECTED);
476*150812a8SEvalZero }
477*150812a8SEvalZero
nrf_uart_rxd_get(NRF_UART_Type * p_reg)478*150812a8SEvalZero __STATIC_INLINE uint8_t nrf_uart_rxd_get(NRF_UART_Type * p_reg)
479*150812a8SEvalZero {
480*150812a8SEvalZero return p_reg->RXD;
481*150812a8SEvalZero }
482*150812a8SEvalZero
nrf_uart_txd_set(NRF_UART_Type * p_reg,uint8_t txd)483*150812a8SEvalZero __STATIC_INLINE void nrf_uart_txd_set(NRF_UART_Type * p_reg, uint8_t txd)
484*150812a8SEvalZero {
485*150812a8SEvalZero p_reg->TXD = txd;
486*150812a8SEvalZero }
487*150812a8SEvalZero
nrf_uart_task_trigger(NRF_UART_Type * p_reg,nrf_uart_task_t task)488*150812a8SEvalZero __STATIC_INLINE void nrf_uart_task_trigger(NRF_UART_Type * p_reg, nrf_uart_task_t task)
489*150812a8SEvalZero {
490*150812a8SEvalZero *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
491*150812a8SEvalZero }
492*150812a8SEvalZero
nrf_uart_task_address_get(NRF_UART_Type * p_reg,nrf_uart_task_t task)493*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_uart_task_address_get(NRF_UART_Type * p_reg, nrf_uart_task_t task)
494*150812a8SEvalZero {
495*150812a8SEvalZero return (uint32_t)p_reg + (uint32_t)task;
496*150812a8SEvalZero }
497*150812a8SEvalZero
nrf_uart_configure(NRF_UART_Type * p_reg,nrf_uart_parity_t parity,nrf_uart_hwfc_t hwfc)498*150812a8SEvalZero __STATIC_INLINE void nrf_uart_configure(NRF_UART_Type * p_reg,
499*150812a8SEvalZero nrf_uart_parity_t parity,
500*150812a8SEvalZero nrf_uart_hwfc_t hwfc)
501*150812a8SEvalZero {
502*150812a8SEvalZero p_reg->CONFIG = (uint32_t)parity | (uint32_t)hwfc;
503*150812a8SEvalZero }
504*150812a8SEvalZero
nrf_uart_baudrate_set(NRF_UART_Type * p_reg,nrf_uart_baudrate_t baudrate)505*150812a8SEvalZero __STATIC_INLINE void nrf_uart_baudrate_set(NRF_UART_Type * p_reg, nrf_uart_baudrate_t baudrate)
506*150812a8SEvalZero {
507*150812a8SEvalZero p_reg->BAUDRATE = baudrate;
508*150812a8SEvalZero }
509*150812a8SEvalZero #endif //SUPPRESS_INLINE_IMPLEMENTATION
510*150812a8SEvalZero
511*150812a8SEvalZero /** @} */
512*150812a8SEvalZero
513*150812a8SEvalZero #ifdef __cplusplus
514*150812a8SEvalZero }
515*150812a8SEvalZero #endif
516*150812a8SEvalZero
517*150812a8SEvalZero #endif //NRF_UART_H__
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