1*10465441SEvalZero /*
2*10465441SEvalZero * Copyright (c) 2006-2018, RT-Thread Development Team
3*10465441SEvalZero *
4*10465441SEvalZero * SPDX-License-Identifier: Apache-2.0
5*10465441SEvalZero *
6*10465441SEvalZero * Change Logs:
7*10465441SEvalZero * Date Author Notes
8*10465441SEvalZero * 2015-01-20 Bernard the first version
9*10465441SEvalZero */
10*10465441SEvalZero
11*10465441SEvalZero #include <drivers/pin.h>
12*10465441SEvalZero
13*10465441SEvalZero #ifdef RT_USING_FINSH
14*10465441SEvalZero #include <finsh.h>
15*10465441SEvalZero #endif
16*10465441SEvalZero
17*10465441SEvalZero static struct rt_device_pin _hw_pin;
_pin_read(rt_device_t dev,rt_off_t pos,void * buffer,rt_size_t size)18*10465441SEvalZero static rt_size_t _pin_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
19*10465441SEvalZero {
20*10465441SEvalZero struct rt_device_pin_status *status;
21*10465441SEvalZero struct rt_device_pin *pin = (struct rt_device_pin *)dev;
22*10465441SEvalZero
23*10465441SEvalZero /* check parameters */
24*10465441SEvalZero RT_ASSERT(pin != RT_NULL);
25*10465441SEvalZero
26*10465441SEvalZero status = (struct rt_device_pin_status *) buffer;
27*10465441SEvalZero if (status == RT_NULL || size != sizeof(*status)) return 0;
28*10465441SEvalZero
29*10465441SEvalZero status->status = pin->ops->pin_read(dev, status->pin);
30*10465441SEvalZero return size;
31*10465441SEvalZero }
32*10465441SEvalZero
_pin_write(rt_device_t dev,rt_off_t pos,const void * buffer,rt_size_t size)33*10465441SEvalZero static rt_size_t _pin_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
34*10465441SEvalZero {
35*10465441SEvalZero struct rt_device_pin_status *status;
36*10465441SEvalZero struct rt_device_pin *pin = (struct rt_device_pin *)dev;
37*10465441SEvalZero
38*10465441SEvalZero /* check parameters */
39*10465441SEvalZero RT_ASSERT(pin != RT_NULL);
40*10465441SEvalZero
41*10465441SEvalZero status = (struct rt_device_pin_status *) buffer;
42*10465441SEvalZero if (status == RT_NULL || size != sizeof(*status)) return 0;
43*10465441SEvalZero
44*10465441SEvalZero pin->ops->pin_write(dev, (rt_base_t)status->pin, (rt_base_t)status->status);
45*10465441SEvalZero
46*10465441SEvalZero return size;
47*10465441SEvalZero }
48*10465441SEvalZero
_pin_control(rt_device_t dev,int cmd,void * args)49*10465441SEvalZero static rt_err_t _pin_control(rt_device_t dev, int cmd, void *args)
50*10465441SEvalZero {
51*10465441SEvalZero struct rt_device_pin_mode *mode;
52*10465441SEvalZero struct rt_device_pin *pin = (struct rt_device_pin *)dev;
53*10465441SEvalZero
54*10465441SEvalZero /* check parameters */
55*10465441SEvalZero RT_ASSERT(pin != RT_NULL);
56*10465441SEvalZero
57*10465441SEvalZero mode = (struct rt_device_pin_mode *) args;
58*10465441SEvalZero if (mode == RT_NULL) return -RT_ERROR;
59*10465441SEvalZero
60*10465441SEvalZero pin->ops->pin_mode(dev, (rt_base_t)mode->pin, (rt_base_t)mode->mode);
61*10465441SEvalZero
62*10465441SEvalZero return 0;
63*10465441SEvalZero }
64*10465441SEvalZero
65*10465441SEvalZero #ifdef RT_USING_DEVICE_OPS
66*10465441SEvalZero const static struct rt_device_ops pin_ops =
67*10465441SEvalZero {
68*10465441SEvalZero RT_NULL,
69*10465441SEvalZero RT_NULL,
70*10465441SEvalZero RT_NULL,
71*10465441SEvalZero _pin_read,
72*10465441SEvalZero _pin_write,
73*10465441SEvalZero _pin_control
74*10465441SEvalZero };
75*10465441SEvalZero #endif
76*10465441SEvalZero
rt_device_pin_register(const char * name,const struct rt_pin_ops * ops,void * user_data)77*10465441SEvalZero int rt_device_pin_register(const char *name, const struct rt_pin_ops *ops, void *user_data)
78*10465441SEvalZero {
79*10465441SEvalZero _hw_pin.parent.type = RT_Device_Class_Miscellaneous;
80*10465441SEvalZero _hw_pin.parent.rx_indicate = RT_NULL;
81*10465441SEvalZero _hw_pin.parent.tx_complete = RT_NULL;
82*10465441SEvalZero
83*10465441SEvalZero #ifdef RT_USING_DEVICE_OPS
84*10465441SEvalZero _hw_pin.parent.ops = &pin_ops;
85*10465441SEvalZero #else
86*10465441SEvalZero _hw_pin.parent.init = RT_NULL;
87*10465441SEvalZero _hw_pin.parent.open = RT_NULL;
88*10465441SEvalZero _hw_pin.parent.close = RT_NULL;
89*10465441SEvalZero _hw_pin.parent.read = _pin_read;
90*10465441SEvalZero _hw_pin.parent.write = _pin_write;
91*10465441SEvalZero _hw_pin.parent.control = _pin_control;
92*10465441SEvalZero #endif
93*10465441SEvalZero
94*10465441SEvalZero _hw_pin.ops = ops;
95*10465441SEvalZero _hw_pin.parent.user_data = user_data;
96*10465441SEvalZero
97*10465441SEvalZero /* register a character device */
98*10465441SEvalZero rt_device_register(&_hw_pin.parent, name, RT_DEVICE_FLAG_RDWR);
99*10465441SEvalZero
100*10465441SEvalZero return 0;
101*10465441SEvalZero }
102*10465441SEvalZero
rt_pin_attach_irq(rt_int32_t pin,rt_uint32_t mode,void (* hdr)(void * args),void * args)103*10465441SEvalZero rt_err_t rt_pin_attach_irq(rt_int32_t pin, rt_uint32_t mode,
104*10465441SEvalZero void (*hdr)(void *args), void *args)
105*10465441SEvalZero {
106*10465441SEvalZero RT_ASSERT(_hw_pin.ops != RT_NULL);
107*10465441SEvalZero if(_hw_pin.ops->pin_attach_irq)
108*10465441SEvalZero {
109*10465441SEvalZero return _hw_pin.ops->pin_attach_irq(&_hw_pin.parent, pin, mode, hdr, args);
110*10465441SEvalZero }
111*10465441SEvalZero return RT_ENOSYS;
112*10465441SEvalZero }
rt_pin_detach_irq(rt_int32_t pin)113*10465441SEvalZero rt_err_t rt_pin_detach_irq(rt_int32_t pin)
114*10465441SEvalZero {
115*10465441SEvalZero RT_ASSERT(_hw_pin.ops != RT_NULL);
116*10465441SEvalZero if(_hw_pin.ops->pin_detach_irq)
117*10465441SEvalZero {
118*10465441SEvalZero return _hw_pin.ops->pin_detach_irq(&_hw_pin.parent, pin);
119*10465441SEvalZero }
120*10465441SEvalZero return RT_ENOSYS;
121*10465441SEvalZero }
122*10465441SEvalZero
rt_pin_irq_enable(rt_base_t pin,rt_uint32_t enabled)123*10465441SEvalZero rt_err_t rt_pin_irq_enable(rt_base_t pin, rt_uint32_t enabled)
124*10465441SEvalZero {
125*10465441SEvalZero RT_ASSERT(_hw_pin.ops != RT_NULL);
126*10465441SEvalZero if(_hw_pin.ops->pin_irq_enable)
127*10465441SEvalZero {
128*10465441SEvalZero return _hw_pin.ops->pin_irq_enable(&_hw_pin.parent, pin, enabled);
129*10465441SEvalZero }
130*10465441SEvalZero return RT_ENOSYS;
131*10465441SEvalZero }
132*10465441SEvalZero
133*10465441SEvalZero /* RT-Thread Hardware PIN APIs */
rt_pin_mode(rt_base_t pin,rt_base_t mode)134*10465441SEvalZero void rt_pin_mode(rt_base_t pin, rt_base_t mode)
135*10465441SEvalZero {
136*10465441SEvalZero RT_ASSERT(_hw_pin.ops != RT_NULL);
137*10465441SEvalZero _hw_pin.ops->pin_mode(&_hw_pin.parent, pin, mode);
138*10465441SEvalZero }
139*10465441SEvalZero FINSH_FUNCTION_EXPORT_ALIAS(rt_pin_mode, pinMode, set hardware pin mode);
140*10465441SEvalZero
rt_pin_write(rt_base_t pin,rt_base_t value)141*10465441SEvalZero void rt_pin_write(rt_base_t pin, rt_base_t value)
142*10465441SEvalZero {
143*10465441SEvalZero RT_ASSERT(_hw_pin.ops != RT_NULL);
144*10465441SEvalZero _hw_pin.ops->pin_write(&_hw_pin.parent, pin, value);
145*10465441SEvalZero }
146*10465441SEvalZero FINSH_FUNCTION_EXPORT_ALIAS(rt_pin_write, pinWrite, write value to hardware pin);
147*10465441SEvalZero
rt_pin_read(rt_base_t pin)148*10465441SEvalZero int rt_pin_read(rt_base_t pin)
149*10465441SEvalZero {
150*10465441SEvalZero RT_ASSERT(_hw_pin.ops != RT_NULL);
151*10465441SEvalZero return _hw_pin.ops->pin_read(&_hw_pin.parent, pin);
152*10465441SEvalZero }
153*10465441SEvalZero FINSH_FUNCTION_EXPORT_ALIAS(rt_pin_read, pinRead, read status from hardware pin);
154