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/linux-6.14.4/Documentation/devicetree/bindings/arm/
Darm,embedded-trace-extension.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/arm/arm,embedded-trace-extension.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Suzuki K Poulose <[email protected]>
12 - Mathieu Poirier <[email protected]>
15 Arm Embedded Trace Extension(ETE) is a per CPU trace component that
18 The trace generated by the ETE could be stored via legacy CoreSight
19 components (e.g, TMC-ETR) or other means (e.g, using a per CPU buffer
20 Arm Trace Buffer Extension (TRBE)). Since the ETE can be connected to
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/linux-6.14.4/drivers/hwtracing/coresight/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
32 modules will be called coresight-funnel and coresight-replicator.
41 trace router - ETR) or sink (embedded trace FIFO). The driver
46 module will be called coresight-tmc.
54 lookup. CATU helps TMC ETR to use a large physically non-contiguous trace
56 by looking up the provided table. CATU can also be used in pass-through
60 module will be called coresight-catu.
67 responsible for bridging the gap between the on-chip coresight
68 components and a trace for bridging the gap between the on-chip
71 the on-board coresight memory can handle.
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Dcoresight-trbe.c1 // SPDX-License-Identifier: GPL-2.0
3 * This driver enables Trace Buffer Extension (TRBE) as a per-cpu coresight
4 * sink device could then pair with an appropriate per-cpu coresight source
5 * device (ETE) thus generating required trace data. Trace can be enabled
23 #include "coresight-self-hosted-trace.h"
24 #include "coresight-trbe.h"
26 #define PERF_IDX2OFF(idx, buf) ((idx) % ((buf)->nr_pages << PAGE_SHIFT))
33 * sinks and thus we use ETE trace packets to pad the
36 #define ETE_IGNORE_PACKET 0x70
40 * A-Sync, Trace Info, Trace On, Address, Atom.
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Dcoresight-etm4x-core.c1 // SPDX-License-Identifier: GPL-2.0
26 #include <linux/coresight-pmu.h>
35 #include <linux/clk/clk-conf.h>
43 #include "coresight-etm4x.h"
44 #include "coresight-etm-perf.h"
45 #include "coresight-etm4x-cfg.h"
46 #include "coresight-self-hosted-trace.h"
47 #include "coresight-syscfg.h"
48 #include "coresight-trace-id.h"
54 #define PARAM_PM_SAVE_FIRMWARE 0 /* save self-hosted state as per firmware */
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Dcoresight-etm4x-sysfs.c1 // SPDX-License-Identifier: GPL-2.0
10 #include "coresight-etm4x.h"
11 #include "coresight-priv.h"
12 #include "coresight-syscfg.h"
17 struct etmv4_config *config = &drvdata->config; in etm4_set_mode_exclude()
19 idx = config->addr_idx; in etm4_set_mode_exclude()
22 * TRCACATRn.TYPE bit[1:0]: type of comparison in etm4_set_mode_exclude()
25 if (FIELD_GET(TRCACATRn_TYPE_MASK, config->addr_acc[idx]) == TRCACATRn_TYPE_ADDR) { in etm4_set_mode_exclude()
26 if (idx % 2 != 0) in etm4_set_mode_exclude()
27 return -EINVAL; in etm4_set_mode_exclude()
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Dcoresight-platform.c1 // SPDX-License-Identifier: GPL-2.0
19 #include "coresight-priv.h"
24 * If the output port is already assigned on this device, return -EINVAL
37 for (i = 0; i < pdata->nr_outconns; ++i) { in coresight_add_out_conn()
38 conn = pdata->out_conns[i]; in coresight_add_out_conn()
39 /* Output == -1 means ignore the port for example for helpers */ in coresight_add_out_conn()
40 if (conn->src_port != -1 && in coresight_add_out_conn()
41 conn->src_port == new_conn->src_port) { in coresight_add_out_conn()
43 conn->src_port); in coresight_add_out_conn()
44 return ERR_PTR(-EINVAL); in coresight_add_out_conn()
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Dcoresight-etm4x.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
13 #include "coresight-priv.h"
17 * 0x000 - 0x2FC: Trace registers
18 * 0x300 - 0x314: Management registers
19 * 0x318 - 0xEFC: Trace registers
20 * 0xF00: Management registers
21 * 0xFA0 - 0xFA4: Trace registers
22 * 0xFA8 - 0xFFC: Management registers
24 /* Trace registers (0x000-0x2FC) */
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/linux-6.14.4/tools/perf/util/cs-etm-decoder/
Dcs-etm-decoder.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright(C) 2015-2018 Linaro Limited.
10 #include <linux/coresight-pmu.h>
17 #include "cs-etm.h"
18 #include "cs-etm-decoder.h"
62 return decoder->mem_access(decoder->data, trace_chan_id, address, in cs_etm_decoder__mem_access()
70 decoder->mem_access = cb_func; in cs_etm_decoder__add_mem_access_cb()
72 if (ocsd_dt_add_callback_trcid_mem_acc(decoder->dcd_tree, start, end, in cs_etm_decoder__add_mem_access_cb()
76 return -1; in cs_etm_decoder__add_mem_access_cb()
78 return 0; in cs_etm_decoder__add_mem_access_cb()
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/linux-6.14.4/tools/perf/arch/arm/util/
Dcs-etm.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/coresight-pmu.h>
18 #include "cs-etm.h"
29 #include "../../../util/cs-etm.h"
93 u64 contextid = evsel->core.attr.config & in cs_etm_validate_context_id()
99 return 0; in cs_etm_validate_context_id()
103 pr_err("%s: contextid not supported in ETMv3, disable with %s/contextid=0/\n", in cs_etm_validate_context_id()
105 return -EINVAL; in cs_etm_validate_context_id()
116 * TRCIDR2.CIDSIZE, bit [9-5], indicates whether contextID in cs_etm_validate_context_id()
118 * 0b00000 Context ID tracing is not supported. in cs_etm_validate_context_id()
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/linux-6.14.4/tools/perf/util/
Dcs-etm.h1 /* SPDX-License-Identifier: GPL-2.0 */
22 /* Starting with 0x0 */
24 /* PMU->type (32 bit), total # of CPUs (32 bit) */
65 /* define fixed version 0 length - allow new format reader to read old files. */
66 #define CS_ETM_NR_TRC_PARAMS_V0 (CS_ETM_ETMIDR - CS_ETM_ETMCR + 1)
83 /* define fixed version 0 length - allow new format reader to read old files. */
84 #define CS_ETMV4_NR_TRC_PARAMS_V0 (CS_ETMV4_TRCAUTHSTATUS - CS_ETMV4_TRCCONFIGR + 1)
87 * ETE metadata is ETMv4 plus TRCDEVARCH register and doesn't support header V0 since it was
109 #define CS_IS_VALID_TRACE_ID(id) ((id > 0) && (id < 0x70))
114 * table 7-12 Encoding of Exception[3:0] for non-ARMv7-M processors.
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Dcs-etm.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright(C) 2015-2018 Linaro Limited.
12 #include <linux/coresight-pmu.h>
22 #include "cs-etm.h"
23 #include "cs-etm-decoder/cs-etm-decoder.h"
37 #include "thread-stack.h"
40 #include "util/synthetic-events.h"
61 * Per-thread ignores the trace channel ID and instead assumes that
139 #define ETMIDR_PTM_VERSION 0x00000300
150 #define TO_TRACE_CHAN_ID(cs_queue_nr) (cs_queue_nr & 0x0000ffff)
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/linux-6.14.4/arch/m68k/fpsp040/
Dget_op.S7 | type exception handler ('unsupp' - vector 55) and the unimplemented
8 | instruction exception handler ('unimp' - vector 11). 'get_op'
9 | determines the opclass (0, 2, or 3) and branches to the
10 | opclass handler routine. See 68881/2 User's Manual table 4-11
17 | - For unnormalized numbers (opclass 0, 2, or 3) the
20 | - For a packed number (opclass 2) the number is unpacked and the
23 | - For denormalized numbers (opclass 0 or 2) the number(s) is not
30 | - If there is a move out with a packed number (opclass 3) the
41 | the '040. The '040 then re-executes the fadd.x fpm,fpn with
45 | Next consider if in the process of normalizing the un-
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/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dsm8450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
8 #include <dt-bindings/clock/qcom,rpmh.h>
9 #include <dt-bindings/clock/qcom,sm8450-camcc.h>
10 #include <dt-bindings/clock/qcom,sm8450-dispcc.h>
11 #include <dt-bindings/clock/qcom,sm8450-gpucc.h>
12 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
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Dsm8650.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm8650-camcc.h>
8 #include <dt-bindings/clock/qcom,sm8650-dispcc.h>
9 #include <dt-bindings/clock/qcom,sm8650-gcc.h>
10 #include <dt-bindings/clock/qcom,sm8650-gpucc.h>
11 #include <dt-bindings/clock/qcom,sm8650-tcsr.h>
12 #include <dt-bindings/clock/qcom,sm8650-videocc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
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/linux-6.14.4/drivers/usb/cdns3/
Dcdnsp-gadget.h1 /* SPDX-License-Identifier: GPL-2.0 */
15 #include <linux/io-64-nonatomic-lo-hi.h>
19 /* Max number slots - only 1 is allowed. */
28 #define CDNSP_DEFAULT_BESL 0
43 * struct cdnsp_cap_regs - CDNSP Registers.
46 * @hcs_params1: HCSPARAMS1 - Structural Parameters 1
47 * @hcs_params2: HCSPARAMS2 - Structural Parameters 2
48 * @hcs_params3: HCSPARAMS3 - Structural Parameters 3
49 * @hcc_params: HCCPARAMS - Capability Parameters
50 * @db_off: DBOFF - Doorbell array offset
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/linux-6.14.4/drivers/usb/host/
Dxhci.h1 /* SPDX-License-Identifier: GPL-2.0 */
19 #include <linux/io-64-nonatomic-lo-hi.h>
20 #include <linux/io-64-nonatomic-hi-lo.h>
22 /* Code sharing between pci-quirks and xhci hcd */
23 #include "xhci-ext-caps.h"
24 #include "pci-quirks.h"
26 #include "xhci-port.h"
27 #include "xhci-caps.h"
33 #define XHCI_SBRN_OFFSET (0x60)
35 /* Max number of USB devices for any host controller - limit in section 6.1 */
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Dxhci-ring.c1 // SPDX-License-Identifier: GPL-2.0
14 * 2. Ring cycle state = 0. This represents Producer Cycle State (PCS) or
26 * until you reach a non-link TRB.
59 #include <linux/dma-mapping.h>
61 #include "xhci-trace.h"
76 if (!seg || !trb || trb < seg->trbs) in xhci_trb_virt_to_dma()
77 return 0; in xhci_trb_virt_to_dma()
79 segment_offset = trb - seg->trbs; in xhci_trb_virt_to_dma()
81 return 0; in xhci_trb_virt_to_dma()
82 return seg->dma + (segment_offset * sizeof(*trb)); in xhci_trb_virt_to_dma()
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