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/nrf52832-nimble/rt-thread/components/net/freemodbus/modbus/include/
H A Dmbconfig.h50 /*! \brief If Modbus Master ASCII support is enabled. */
52 /*! \brief If Modbus Master RTU support is enabled. */
54 /*! \brief If Modbus Master TCP support is enabled. */
56 /*! \brief If Modbus Slave ASCII support is enabled. */
58 /*! \brief If Modbus Slave RTU support is enabled. */
60 /*! \brief If Modbus Slave TCP support is enabled. */
73 * the sum of all enabled functions in this file and custom function
86 /*! \brief If the <em>Report Slave ID</em> function should be enabled. */
88 /*! \brief If the <em>Read Input Registers</em> function should be enabled. */
90 /*! \brief If the <em>Read Holding Registers</em> function should be enabled. */
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/nrf52832-nimble/nordic/nrfx/mdk/
H A Dnrf51.svd126 <name>Enabled</name>
127 <description>Interrupt enabled.</description>
159 <name>Enabled</name>
160 <description>Interrupt enabled.</description>
417 <name>Enabled</name>
418 <description>Enabled.</description>
559 <name>Enabled</name>
560 <description>Pin reset in debug interface mode enabled.</description>
661 <name>Enabled</name>
662 <description>DCDC converter enabled.</description>
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H A Dnrf52.svd946 <name>Enabled</name>
1013 <name>Enabled</name>
1031 <name>Enabled</name>
1049 <name>Enabled</name>
1067 <name>Enabled</name>
1085 <name>Enabled</name>
1103 <name>Enabled</name>
1121 <name>Enabled</name>
1139 <name>Enabled</name>
1157 <name>Enabled</name>
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H A Dnrf52810.svd791 <name>Enabled</name>
831 <name>Enabled</name>
832 <description>Protection enabled</description>
849 <name>Enabled</name>
850 <description>Protection enabled</description>
867 <name>Enabled</name>
868 <description>Protection enabled</description>
885 <name>Enabled</name>
886 <description>Protection enabled</description>
903 <name>Enabled</name>
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H A Dnrf51_bitfields.h48 #define AAR_INTENSET_NOTRESOLVED_Enabled (1UL) /*!< Interrupt enabled. */
55 #define AAR_INTENSET_RESOLVED_Enabled (1UL) /*!< Interrupt enabled. */
62 #define AAR_INTENSET_END_Enabled (1UL) /*!< Interrupt enabled. */
72 #define AAR_INTENCLR_NOTRESOLVED_Enabled (1UL) /*!< Interrupt enabled. */
79 #define AAR_INTENCLR_RESOLVED_Enabled (1UL) /*!< Interrupt enabled. */
86 #define AAR_INTENCLR_END_Enabled (1UL) /*!< Interrupt enabled. */
119 #define AAR_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */
132 #define ADC_INTENSET_END_Enabled (1UL) /*!< Interrupt enabled. */
142 #define ADC_INTENCLR_END_Enabled (1UL) /*!< Interrupt enabled. */
161 #define ADC_ENABLE_ENABLE_Enabled (0x01UL) /*!< ADC is enabled. If an analog input pin is selected …
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H A Dnrf52840.svd1120 <name>Enabled</name>
1169 <name>Enabled</name>
1187 <name>Enabled</name>
1458 <name>Enabled</name>
1459 <description>Read: Enabled</description>
1485 <name>Enabled</name>
1486 <description>Read: Enabled</description>
1512 <name>Enabled</name>
1513 <description>Read: Enabled</description>
1539 <name>Enabled</name>
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H A Dnrf9160.svd680 <name>Enabled</name>
698 <name>Enabled</name>
712 …hing of key value registers over secure APB, but can be read if field READ is Enabled</description>
716 <name>Enabled</name>
735 …<description>Key value registers are readable (if enabled) and can be pushed (if enabled)</descrip…
804 <name>ENABLED</name>
1143 <name>Enabled</name>
1174 <name>Enabled</name>
1205 <name>Enabled</name>
1231 <name>Enabled</name>
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H A Dnrf52_bitfields.h48 #define AAR_INTENSET_NOTRESOLVED_Enabled (1UL) /*!< Read: Enabled */
55 #define AAR_INTENSET_RESOLVED_Enabled (1UL) /*!< Read: Enabled */
62 #define AAR_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */
72 #define AAR_INTENCLR_NOTRESOLVED_Enabled (1UL) /*!< Read: Enabled */
79 #define AAR_INTENCLR_RESOLVED_Enabled (1UL) /*!< Read: Enabled */
86 #define AAR_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */
339 #define BPROT_CONFIG1_REGION63_Enabled (1UL) /*!< Protection enabled */
345 #define BPROT_CONFIG1_REGION62_Enabled (1UL) /*!< Protection enabled */
351 #define BPROT_CONFIG1_REGION61_Enabled (1UL) /*!< Protection enabled */
357 #define BPROT_CONFIG1_REGION60_Enabled (1UL) /*!< Protection enabled */
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H A Dnrf52810_bitfields.h83 #define AAR_INTENSET_NOTRESOLVED_Enabled (1UL) /*!< Read: Enabled */
90 #define AAR_INTENSET_RESOLVED_Enabled (1UL) /*!< Read: Enabled */
97 #define AAR_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */
107 #define AAR_INTENCLR_NOTRESOLVED_Enabled (1UL) /*!< Read: Enabled */
114 #define AAR_INTENCLR_RESOLVED_Enabled (1UL) /*!< Read: Enabled */
121 #define AAR_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */
179 #define BPROT_CONFIG0_REGION31_Enabled (1UL) /*!< Protection enabled */
185 #define BPROT_CONFIG0_REGION30_Enabled (1UL) /*!< Protection enabled */
191 #define BPROT_CONFIG0_REGION29_Enabled (1UL) /*!< Protection enabled */
197 #define BPROT_CONFIG0_REGION28_Enabled (1UL) /*!< Protection enabled */
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H A Dnrf52840_bitfields.h83 #define AAR_INTENSET_NOTRESOLVED_Enabled (1UL) /*!< Read: Enabled */
90 #define AAR_INTENSET_RESOLVED_Enabled (1UL) /*!< Read: Enabled */
97 #define AAR_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */
107 #define AAR_INTENCLR_NOTRESOLVED_Enabled (1UL) /*!< Read: Enabled */
114 #define AAR_INTENCLR_RESOLVED_Enabled (1UL) /*!< Read: Enabled */
121 #define AAR_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */
270 #define CCM_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */
277 #define CCM_INTENSET_ENDCRYPT_Enabled (1UL) /*!< Read: Enabled */
284 #define CCM_INTENSET_ENDKSGEN_Enabled (1UL) /*!< Read: Enabled */
294 #define CCM_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */
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H A Dnrf9160_bitfields.h191 #define CLOCK_INTENSET_LFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */
198 #define CLOCK_INTENSET_HFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */
208 #define CLOCK_INTENCLR_LFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */
215 #define CLOCK_INTENCLR_HFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */
312 #define CRYPTOCELL_ENABLE_ENABLE_Enabled (1UL) /*!< CRYPTOCELL subsystem enabled */
362 /* Bits 31..0 : Initiate secure erase even though ERASEPROTECT is enabled if KEY fields match */
518 #define DPPIC_CHENSET_CH15_Enabled (1UL) /*!< Read: channel enabled */
525 #define DPPIC_CHENSET_CH14_Enabled (1UL) /*!< Read: channel enabled */
532 #define DPPIC_CHENSET_CH13_Enabled (1UL) /*!< Read: channel enabled */
539 #define DPPIC_CHENSET_CH12_Enabled (1UL) /*!< Read: channel enabled */
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/nrf52832-nimble/nordic/nrfx/drivers/src/
H A Dnrfx_power.c260 uint32_t enabled = nrf_power_int_enable_get(); in nrfx_power_irq_handler() local
263 if ((0 != (enabled & NRF_POWER_INT_POFWARN_MASK)) && in nrfx_power_irq_handler()
266 /* Cannot be null if event is enabled */ in nrfx_power_irq_handler()
272 if ((0 != (enabled & NRF_POWER_INT_SLEEPENTER_MASK)) && in nrfx_power_irq_handler()
275 /* Cannot be null if event is enabled */ in nrfx_power_irq_handler()
279 if ((0 != (enabled & NRF_POWER_INT_SLEEPEXIT_MASK)) && in nrfx_power_irq_handler()
282 /* Cannot be null if event is enabled */ in nrfx_power_irq_handler()
288 if ((0 != (enabled & NRF_POWER_INT_USBDETECTED_MASK)) && in nrfx_power_irq_handler()
291 /* Cannot be null if event is enabled */ in nrfx_power_irq_handler()
295 if ((0 != (enabled & NRF_POWER_INT_USBREMOVED_MASK)) && in nrfx_power_irq_handler()
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/nrf52832-nimble/rt-thread/libcpu/arm/s3c44b0/
H A Dstart_rvds.S603 ;// <o2.0> PC0 Pull-up <0=> Enabled <1=> Disabled
604 ;// <o2.1> PC1 Pull-up <0=> Enabled <1=> Disabled
605 ;// <o2.2> PC2 Pull-up <0=> Enabled <1=> Disabled
606 ;// <o2.3> PC3 Pull-up <0=> Enabled <1=> Disabled
607 ;// <o2.4> PC4 Pull-up <0=> Enabled <1=> Disabled
608 ;// <o2.5> PC5 Pull-up <0=> Enabled <1=> Disabled
609 ;// <o2.6> PC6 Pull-up <0=> Enabled <1=> Disabled
610 ;// <o2.7> PC7 Pull-up <0=> Enabled <1=> Disabled
611 ;// <o2.8> PC8 Pull-up <0=> Enabled <1=> Disabled
612 ;// <o2.9> PC9 Pull-up <0=> Enabled <1=> Disabled
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/nrf52832-nimble/nordic/nrfx/drivers/include/
H A Dnrfx_adc.h112 nrfx_adc_channel_t * p_next; ///< Pointer to the next enabled channel (for internal use).
165 * called, all channels that have been enabled with this function are sampled.
194 * This function triggers single ADC sampling. If more than one channel is enabled, the driver
195 * emulates scanning and all channels are sampled in the order they were enabled.
206 * fail if ADC is busy. The channel does not need to be enabled to perform a single conversion.
226 * Conversion is done on all enabled channels, but it is not triggered by this
231 * @note If more than one channel is enabled, the function emulates scanning, and
232 * a single START task will trigger conversion on all enabled channels. For example:
233 * If 3 channels are enabled and the user requests 6 samples, the completion event
H A Dnrfx_dppi.h77 * @param[in] channel DPPI channel to be enabled.
79 * @retval NRFX_SUCCESS If the channel was successfully enabled.
153 * @param[in] group Channel group to be enabled.
155 * @retval NRFX_SUCCESS If the group was successfully enabled.
H A Dnrfx_power.h67 * Keep in mind that if this interrupt is enabled,
143 * The regulator would be enabled or disabled automatically
154 * The regulator would be enabled or disabled automatically
220 * Enabled power module driver would process all the interrupts from power system.
254 * when Softdevice is enabled. If event handler set in init function is set to NULL, interrupt
/nrf52832-nimble/rt-thread/components/drivers/misc/
H A Dadc.c49 if (adc->ops->enabled == RT_NULL) in _adc_control()
55 result = adc->ops->enabled(adc, (rt_uint32_t)args, RT_TRUE); in _adc_control()
59 result = adc->ops->enabled(adc, (rt_uint32_t)args, RT_FALSE); in _adc_control()
102 if (dev->ops->enabled != RT_NULL) in rt_adc_enable()
104 result = dev->ops->enabled(dev, channel, RT_TRUE); in rt_adc_enable()
119 if (dev->ops->enabled != RT_NULL) in rt_adc_disable()
121 result = dev->ops->enabled(dev, channel, RT_FALSE); in rt_adc_disable()
/nrf52832-nimble/packages/NimBLE-latest/nimble/controller/src/
H A Dble_ll_resolv.c56 * is enabled and we are either scanning, advertising, or attempting to create
313 * when resolution is enabled in ble_ll_resolv_list_add()
374 uint8_t enabled; in ble_ll_resolv_enable_cmd() local
379 enabled = cmdbuf[0]; in ble_ll_resolv_enable_cmd()
380 if (enabled <= 1) { in ble_ll_resolv_enable_cmd()
382 if ((enabled ^ g_ble_ll_resolv_data.addr_res_enabled) != 0) { in ble_ll_resolv_enable_cmd()
383 if (enabled) { in ble_ll_resolv_enable_cmd()
389 g_ble_ll_resolv_data.addr_res_enabled = enabled; in ble_ll_resolv_enable_cmd()
467 /* If resolving is not enabled, we are done here. */ in ble_ll_resolv_set_rpa_tmo()
472 /* Reset timeout if resolving is enabled */ in ble_ll_resolv_set_rpa_tmo()
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/nrf52832-nimble/nordic/nrfx/hal/
H A Dnrf_comp.h129 NRF_COMP_HYST_50mV = COMP_HYST_HYST_Hyst50mV /*!< Comparator hysteresis enabled. */
139 …NRF_COMP_ISOURCE_Ien2uA5 = COMP_ISOURCE_ISOURCE_Ien2mA5, /*!< Current source enabled (+/- 2.5 u…
140 …NRF_COMP_ISOURCE_Ien5uA = COMP_ISOURCE_ISOURCE_Ien5mA, /*!< Current source enabled (+/- 5 uA)…
141 …NRF_COMP_ISOURCE_Ien10uA = COMP_ISOURCE_ISOURCE_Ien10mA /*!< Current source enabled (+/- 10 uA…
195 * @brief Function for checking if the COMP peripheral is enabled.
197 * @retval true If the COMP peripheral is enabled.
198 * @retval false If the COMP peripheral is not enabled.
281 * @param[in] comp_int_mask Mask of interrupts to be enabled.
298 * @brief Function for getting the enabled interrupts of COMP.
302 * @retval true If any interrupts of the specified mask are enabled.
H A Dnrf_adc.h201 * @retval true If all specified interrupts are enabled.
202 * @retval false If at least one of the given interrupts is not enabled.
229 * @brief Function for checking if the ADC is enabled.
231 * @retval true If the ADC is enabled.
232 * @retval false If the ADC is not enabled.
249 * the ADC is in DISABLE state and must be enabled before using it.
H A Dnrf_pdm.h169 * @retval true If all specified interrupts are enabled.
170 * @retval false If at least one of the given interrupts is not enabled.
222 * The PDM peripheral must be enabled before use.
232 * @brief Function for checking if the PDM peripheral is enabled.
234 * @retval true If the PDM peripheral is enabled.
235 * @retval false If the PDM peripheral is not enabled.
/nrf52832-nimble/packages/NimBLE-latest/nimble/drivers/nrf52/
H A Dsyscfg.yml38 to high state when radio is enabled using PPI channels
63 This shall be only enabled for:
71 This shall be only enabled for:
/nrf52832-nimble/rt-thread/components/net/lwip-2.1.0/src/core/
H A Dinit.c123 #error "IGMP needs LWIP_IPV4 enabled in your lwipopts.h"
167 #error "To use LWIP_TCP_SACK_OUT, TCP_QUEUE_OOSEQ needs to be enabled"
194 #error "One and exactly one of LWIP_EVENT_API and LWIP_CALLBACK_API has to be enabled in your lwipo…
200 #error "MEM_LIBC_MALLOC and MEM_USE_POOLS may not both be simultaneously enabled in your lwipopts.h"
203 #error "MEM_USE_POOLS requires custom pools (MEMP_USE_CUSTOM_POOLS) to be enabled in your lwipopts.…
227 #error "When using LWIP_TCPIP_CORE_LOCKING_INPUT, LWIP_TCPIP_CORE_LOCKING must be enabled, too"
230 #error "LWIP_NETIF_TX_SINGLE_PBUF needs TCP_OVERSIZE enabled to create single-pbuf TCP packets"
286 #error "MEMP_MEM_MALLOC and MEM_USE_POOLS cannot be enabled at the same time"
/nrf52832-nimble/rt-thread/components/net/lwip-2.0.2/src/core/
H A Dinit.c124 #error "IGMP needs LWIP_IPV4 enabled in your lwipopts.h"
127 #error "LWIP_MULTICAST_TX_OPTIONS needs LWIP_IPV4 enabled in your lwipopts.h"
192 …#error "One and exactly one of LWIP_EVENT_API and LWIP_CALLBACK_API has to be enabled in your lwip…
195 …#error "MEM_LIBC_MALLOC and MEM_USE_POOLS may not both be simultaneously enabled in your lwipopts.…
198 …#error "MEM_USE_POOLS requires custom pools (MEMP_USE_CUSTOM_POOLS) to be enabled in your lwipopts…
222 #error "When using LWIP_TCPIP_CORE_LOCKING_INPUT, LWIP_TCPIP_CORE_LOCKING must be enabled, too"
225 #error "LWIP_NETIF_TX_SINGLE_PBUF needs TCP_OVERSIZE enabled to create single-pbuf TCP packets"
291 #error "MEMP_MEM_MALLOC and MEM_USE_POOLS cannot be enabled at the same time"
/nrf52832-nimble/rt-thread/components/drivers/spi/sfud/src/
H A Dsfud.c73 static sfud_err set_write_enabled(const sfud_flash *flash, bool enabled);
74 static sfud_err set_4_byte_address_mode(sfud_flash *flash, bool enabled);
874 * @param enabled true: enable false: disable
878 static sfud_err set_write_enabled(const sfud_flash *flash, bool enabled) { argument
884 if (enabled) {
897 if (enabled && (register_status & SFUD_STATUS_REGISTER_WEL) == 0) {
900 } else if (!enabled && (register_status & SFUD_STATUS_REGISTER_WEL) == 1) {
915 * @param enabled true: enable false: disable
919 static sfud_err set_4_byte_address_mode(sfud_flash *flash, bool enabled) { argument
931 if (enabled) {
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