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/linux-6.14.4/include/uapi/linux/
Dvideodev2.h1 /* SPDX-License-Identifier: ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) */
5 * Copyright (C) 1999-2012 the contributors
23 * 1. Redistributions of source code must retain the above copyright
47 * All kernel-specific stuff were moved to media/v4l2-dev.h, so
66 #include <linux/v4l2-common.h>
67 #include <linux/v4l2-controls.h>
74 #define VIDEO_MAX_PLANES 8
80 /* Four-character-code (FOURCC) */
82 ((__u32)(a) | ((__u32)(b) << 8) | ((__u32)(c) << 16) | ((__u32)(d) << 24))
83 #define v4l2_fourcc_be(a, b, c, d) (v4l2_fourcc(a, b, c, d) | (1U << 31))
[all …]
/linux-6.14.4/arch/arc/kernel/
Dunaligned.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011-2012 Synopsys (www.synopsys.com)
6 * -Adapted (from .26 to .35)
7 * -original contribution by [email protected]
18 #define BE 1
19 #define FIRST_BYTE_16 "swap %1, %1\n swape %1, %1\n"
20 #define FIRST_BYTE_32 "swape %1, %1\n"
29 "1: ldb.ab %1, [%2, 1]\n" \
33 "3: mov %0, 1\n" \
38 " .long 1b, 3b\n" \
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/linux-6.14.4/arch/arm/crypto/
Dblake2s-core.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
15 // load the words on-demand.
59 // Execute a quarter-round of BLAKE2s by mixing two columns or two diagonals.
61 // columns/diagonals. s0-s1 are the word offsets to the message words the first
62 // column/diagonal needs, and likewise s2-s3 for the second column/diagonal.
94 // a += b + m[blake2s_sigma[r][2*i + 1]];
100 // d = ror32(d ^ a, 8);
105 add \c0, \c0, \d0, ror#8
106 add \c1, \c1, \d1, ror#8
113 // Execute one round of BLAKE2s by updating the state matrix v[0..15]. v[0..9]
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/linux-6.14.4/tools/testing/selftests/bpf/progs/
Diters.c1 // SPDX-License-Identifier: GPL-2.0
34 int *v, i = zero; /* obscure initial value of i */ in iter_err_unsafe_c_loop() local
39 while ((v = bpf_iter_num_next(&it))) { in iter_err_unsafe_c_loop()
62 "r4 = 1;" in iter_err_unsafe_asm_loop()
68 "r6 += 1;" in iter_err_unsafe_asm_loop()
96 int *v; in iter_while_loop() local
101 while ((v = bpf_iter_num_next(&it))) { in iter_while_loop()
102 bpf_printk("ITER_BASIC: E1 VAL: v=%d", *v); in iter_while_loop()
114 int *v; in iter_while_loop_auto_cleanup() local
119 while ((v = bpf_iter_num_next(&it))) { in iter_while_loop_auto_cleanup()
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/linux-6.14.4/include/uapi/drm/
Ddrm_fourcc.h39 * further describe the buffer's format - for example tiling or compression.
42 * ----------------
46 * format and data layout of the buffer, and should be the only way to describe
56 * vendor-namespaced, and as such the relationship between a fourcc code and a
58 * may preserve meaning - such as number of planes - from the fourcc code,
62 * match only a single modifier. A modifier must not be a subset of layouts of
64 * a modifier: a buffer may match a 64-pixel aligned modifier and a 32-pixel
76 * - Kernel and user-space drivers: for drivers it's important that modifiers
80 * - Higher-level programs interfacing with KMS/GBM/EGL/Vulkan/etc: these users
93 * -----------------------
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/linux-6.14.4/crypto/
Dblake2b_generic.c1 // SPDX-License-Identifier: (GPL-2.0-only OR Apache-2.0)
11 * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
12 * - OpenSSL license : https://www.openssl.org/source/license.html
13 * - Apache 2.0 : https://www.apache.org/licenses/LICENSE-2.0
26 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
27 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
28 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
29 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
30 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
31 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
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/linux-6.14.4/drivers/mtd/nand/raw/
Dnand_ids.c1 // SPDX-License-Identifier: GPL-2.0-only
29 {"TC58NVG0S3E 1G 3.3V 8-bit",
31 SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512), },
32 {"TC58NVG2S0F 4G 3.3V 8-bit",
34 SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) },
35 {"TC58NVG2S0H 4G 3.3V 8-bit",
37 SZ_4K, SZ_512, SZ_256K, 0, 8, 256, NAND_ECC_INFO(8, SZ_512) },
38 {"TC58NVG3S0F 8G 3.3V 8-bit",
40 SZ_4K, SZ_1K, SZ_256K, 0, 8, 232, NAND_ECC_INFO(4, SZ_512) },
41 {"TC58NVG5D2 32G 3.3V 8-bit",
[all …]
/linux-6.14.4/arch/x86/include/asm/
Dperf_event_p4.h1 /* SPDX-License-Identifier: GPL-2.0 */
16 * perf-MSRs are not shared and every thread has its
17 * own perf-MSRs set)
20 #define ARCH_P4_RESERVED_ESCR (2) /* IQ_ESCR(0,1) not always present */
21 #define ARCH_P4_MAX_ESCR (ARCH_P4_TOTAL_ESCR - ARCH_P4_RESERVED_ESCR)
25 #define ARCH_P4_CNTRVAL_MASK ((1ULL << ARCH_P4_CNTRVAL_BITS) - 1)
26 #define ARCH_P4_UNFLAGGED_BIT ((1ULL) << (ARCH_P4_CNTRVAL_BITS - 1))
40 #define P4_ESCR_EVENT(v) ((v) << P4_ESCR_EVENT_SHIFT) argument
41 #define P4_ESCR_EMASK(v) ((v) << P4_ESCR_EVENTMASK_SHIFT) argument
42 #define P4_ESCR_TAG(v) ((v) << P4_ESCR_TAG_SHIFT) argument
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/linux-6.14.4/Documentation/hwmon/
Dadm1026.rst16 - Philip Pokorny <[email protected]> for Penguin Computing
17 - Justin Thiessen <[email protected]>
20 -----------------
22 * gpio_input: int array (min = 1, max = 17)
23 List of GPIO pins (0-16) to program as inputs
25 * gpio_output: int array (min = 1, max = 17)
26 List of GPIO pins (0-16) to program as outputs
28 * gpio_inverted: int array (min = 1, max = 17)
29 List of GPIO pins (0-16) to program as inverted
31 * gpio_normal: int array (min = 1, max = 17)
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/linux-6.14.4/drivers/i2c/busses/
Di2c-sun6i-p2wi.c2 * P2WI (Push-Pull Two Wire Interface) bus driver.
4 * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
10 * The P2WI controller looks like an SMBus controller which only supports byte
13 * - it supports only one target device, and thus drop the address field
14 * - it adds a parity bit every 8bits of data
15 * - only one read access is required to read a byte (instead of a write
17 * - there's no Ack bit after each byte transfer
20 * devices (the only known device to support this interface is the AXP221
50 #define P2WI_CTRL_GLOBAL_INT_ENB BIT(1)
54 #define P2WI_CCR_SDA_OUT_DELAY(v) (((v) & 0x7) << 8) argument
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/linux-6.14.4/arch/arm64/include/asm/
Dio.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1996-2000 Russell King
23 * Generic IO read/write. These perform native-endian accesses.
29 asm volatile("strb %w0, %1" : : "rZ" (val), "Qo" (*ptr)); in __raw_writeb()
36 asm volatile("strh %w0, %1" : : "rZ" (val), "Qo" (*ptr)); in __raw_writew()
43 asm volatile("str %w0, %1" : : "rZ" (val), "Qo" (*ptr)); in __raw_writel()
50 asm volatile("str %x0, %1" : : "rZ" (val), "Qo" (*ptr)); in __raw_writeq()
57 asm volatile(ALTERNATIVE("ldrb %w0, [%1]", in __raw_readb()
58 "ldarb %w0, [%1]", in __raw_readb()
69 asm volatile(ALTERNATIVE("ldrh %w0, [%1]", in __raw_readw()
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/linux-6.14.4/fs/bcachefs/
Dextents_format.h1 /* SPDX-License-Identifier: GPL-2.0 */
15 * merely adjust ptr->offset to point to the start of the data that is currently
20 * Thus an extent that is not checksummed or compressed will consist only of a
24 * When an extent is checksummed or compressed, it's not possible to read only
26 * originally written, and then return only the part of the extent that is
30 * to store the size of the originally allocated space - this is the
33 * pointer, we keep a second smaller offset field - "offset into the original
40 * same checksum type and compression format - however, when copygc runs later (or
42 * going to rewrite all the pointers at once - one of the replicas may be in a
47 * Thus it will only move a subset of the pointers (or in the case of
[all …]
/linux-6.14.4/drivers/clk/versatile/
Dclk-icst.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Copyright (C) 2012-2015 Linus Walleij
17 #include <linux/clk-provider.h>
23 #include "clk-icst.h"
34 #define INTEGRATOR_AP_PCI_25_33_MHZ BIT(8)
37 * struct clk_icst - ICST VCO clock wrapper
59 * vco_get() - get ICST VCO settings from a certain ICST
68 ret = regmap_read(icst->map, icst->vcoreg_off, &val); in vco_get()
73 * The Integrator/AP core clock can only access the low eight in vco_get()
74 * bits of the v PLL divider. Bit 8 is tied low and always zero, in vco_get()
[all …]
/linux-6.14.4/sound/ppc/
Dsnd_ps3_reg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
49 * n:0..1
66 can be cleared by writing a '1' to the corresponding bit. A new interrupt
72 31 24 23 16 15 8 7 0
73 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
75 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
77 #define PS3_AUDIO_INTR_0_CHAN(n) (1 << ((n) * 2))
79 #define PS3_AUDIO_INTR_0_CHAN8 PS3_AUDIO_INTR_0_CHAN(8)
86 #define PS3_AUDIO_INTR_0_CHAN1 PS3_AUDIO_INTR_0_CHAN(1)
95 31 24 23 16 15 8 7 0
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/linux-6.14.4/drivers/net/ethernet/altera/
Daltera_msgdmahw.h1 /* SPDX-License-Identifier: GPL-2.0-only */
32 #define MSGDMA_DESC_CTL_GEN_SOP BIT(8)
42 /* Writing ‘1’ to the ‘go’ bit commits the entire descriptor into the
80 u32 rw_fill_level; /* bit 31:16 - write fill level
81 * bit 15:0 - read fill level
84 u32 rw_seq_num; /* bit 31:16 - write sequence number
85 * bit 15:0 - read sequence number
93 #define MSGDMA_CSR_STAT_DESC_BUF_EMPTY BIT(1)
100 #define MSGDMA_CSR_STAT_STOPPED_ON_EARLY BIT(8)
105 #define MSGDMA_CSR_STAT_BUSY_GET(v) GET_BIT_VALUE(v, 0) argument
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/linux-6.14.4/Documentation/iio/
Dad7380.rst1 .. SPDX-License-Identifier: GPL-2.0-only
23 * `AD7380-4 <https://www.analog.com/en/products/ad7380-4.html>`_
24 * `AD7381-4 <https://www.analog.com/en/products/ad7381-4.html>`_
25 * `AD7383-4 <https://www.analog.com/en/products/ad7383-4.html>`_
26 * `AD7384-4 <https://www.analog.com/en/products/ad7384-4.html>`_
27 * `AD7386-4 <https://www.analog.com/en/products/ad7386-4.html>`_
28 * `AD7387-4 <https://www.analog.com/en/products/ad7387-4.html>`_
29 * `AD7388-4 <https://www.analog.com/en/products/ad7388-4.html>`_
30 * `ADAQ4370-4 <https://www.analog.com/en/products/adaq4370-4.html>`_
31 * `ADAQ4380-4 <https://www.analog.com/en/products/adaq4380-4.html>`_
[all …]
/linux-6.14.4/include/linux/usb/
Dpd_vdo.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright 2015-2017 Google, Inc
18 #define VDO_MAX_SIZE (VDO_MAX_OBJECTS + 1)
22 * ----------
24 * <15> :: VDM type ( 1b == structured, 0b == unstructured )
27 * <10:8> :: object position (1-7 valid ... used for enter/exit mode only)
28 * <7:6> :: command type (SVDM only?)
38 #define VDO_SVDM_TYPE (1 << 15)
40 #define VDO_OPOS(x) ((x) << 8)
47 #define CMDT_RSP_ACK 1
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/linux-6.14.4/Documentation/devicetree/bindings/sound/
Dst,sta32x.txt3 The driver for this device only supports I2C.
7 - compatible: "st,sta32x"
8 - reg: the I2C address of the device for I2C
9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be
12 - power-down-gpios: a GPIO spec for the power down pin. If specified,
16 - Vdda-supply: regulator spec, providing 3.3V
17 - Vdd3-supply: regulator spec, providing 3.3V
18 - Vcc-supply: regulator spec, providing 5V - 26V
22 - clocks, clock-names: Clock specifier for XTI input clock.
24 and disabled when it is removed. The 'clock-names' must be set to 'xti'.
[all …]
/linux-6.14.4/drivers/net/ethernet/chelsio/cxgb/
Dvsc7326.c1 // SPDX-License-Identifier: GPL-2.0
2 /* $Date: 2006/04/28 19:20:06 $ $RCSfile: vsc7326.c,v $ $Revision: 1.19 $ */
15 /* The egress WM value 0x01a01fff should be used only when the
17 * for disabling the T2/MAC flow-control. When the interface is
40 spin_lock_bh(&adapter->mac_lock); in vsc_read()
48 } while (((status & 1) == 0) && (i < 50)); in vsc_read()
59 ((addr&0x01fe)>>1), *val); */ in vsc_read()
60 spin_unlock_bh(&adapter->mac_lock); in vsc_read()
65 spin_lock_bh(&adapter->mac_lock); in vsc_write()
70 ((addr&0x01fe)>>1), data); */ in vsc_write()
[all …]
/linux-6.14.4/arch/arc/include/asm/
Dperf_event.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2014-2015 Synopsys, Inc. (www.synopsys.com)
6 * Copyright (C) 2011-2013 Synopsys, Inc. (www.synopsys.com)
33 #define ARC_REG_PCT_CONFIG_USER (1 << 18) /* count in user mode */
34 #define ARC_REG_PCT_CONFIG_KERN (1 << 19) /* count in kernel mode */
36 #define ARC_REG_PCT_CONTROL_CC (1 << 16) /* clear counts */
37 #define ARC_REG_PCT_CONTROL_SN (1 << 17) /* snapshot */
41 unsigned int m:8, c:8, r:5, i:1, s:2, v:8; member
43 unsigned int v:8, s:2, i:1, r:5, c:8, m:8;
49 unsigned int c:16, r:8, v:8; member
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/linux-6.14.4/drivers/clk/ti/
Dfapll.c1 // SPDX-License-Identifier: GPL-2.0-only
4 #include <linux/clk-provider.h>
17 #define FAPLL_MAIN_DIV_P_SHIFT 8
50 #define SYNTH_LDMDIV1 BIT(8)
55 #define SYNTH_PHASE_K 8
81 u32 v = readl_relaxed(fd->base); in ti_fapll_clock_is_bypass() local
83 if (fd->bypass_bit_inverted) in ti_fapll_clock_is_bypass()
84 return !(v & FAPLL_MAIN_BP); in ti_fapll_clock_is_bypass()
86 return !!(v & FAPLL_MAIN_BP); in ti_fapll_clock_is_bypass()
91 u32 v = readl_relaxed(fd->base); in ti_fapll_set_bypass() local
[all …]
/linux-6.14.4/tools/testing/selftests/arm64/fp/
Dfpsimd-test.S1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (C) 2015-2019 ARM Limited.
9 // for x in `seq 1 NR_CPUS`; do fpsimd-test & pids=$pids\ $! ; done
15 #include "asm-offsets.h"
18 #define MAXVL_B (128 / 8)
21 ld1 {v\Vn\().2d}, [x\Xt]
25 st1 {v\Vn\().2d}, [x\Xt]
32 // All clobber x0-x2
58 add w2, w2, #(1 << 22)
59 subs w1, w1, #1
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/linux-6.14.4/Documentation/devicetree/bindings/mmc/
Dmarvell,xenon-sdhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 mmc-controller.yaml and the properties used by the Xenon implementation.
20 - Ulf Hansson <[email protected]>
25 - enum:
26 - marvell,armada-cp110-sdhci
27 - marvell,armada-ap806-sdhci
29 - items:
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/linux-6.14.4/drivers/net/ethernet/mscc/
Docelot_devlink.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright 2020-2021 NXP
9 * Resource 1: Frame references tracked per source port
17 #define REF_xxxx_I (1 * OCELOT_RESOURCE_SZ)
33 * ----------------------
44 * V V v v
55 * V V v v
66 * V V v v
77 * V V v v
88 * V V v v
[all …]
/linux-6.14.4/arch/riscv/kernel/
Dvec-copy-unaligned.S1 /* SPDX-License-Identifier: GPL-2.0 */
13 #define VEC_L CONCATENATE(vle, WORD_EEW).v
14 #define VEC_S CONCATENATE(vse, WORD_EEW).v
20 andi a4, a2, ~(WORD_EEW-1)
25 1:
26 vsetivli t0, 8, WORD_SEW, m8, ta, ma
31 bltu a1, a3, 1b
39 /* Performs a memcpy without aligning buffers, using only byte accesses. */
40 /* Note: The size is truncated to a multiple of 8 */
42 andi a4, a2, ~(8-1)
[all …]

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