Lines Matching +full:only +full:- +full:1 +full:- +full:8 +full:v
1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (C) 2015-2019 ARM Limited.
9 // for x in `seq 1 NR_CPUS`; do fpsimd-test & pids=$pids\ $! ; done
15 #include "asm-offsets.h"
18 #define MAXVL_B (128 / 8)
21 ld1 {v\Vn\().2d}, [x\Xt]
25 st1 {v\Vn\().2d}, [x\Xt]
32 // All clobber x0-x2
58 add w2, w2, #(1 << 22)
59 subs w1, w1, #1
65 // Get the address of shadow data for FPSIMD V-register V<xn>
72 // Set up test pattern in a FPSIMD V-register
95 // Returns only if all bytes match; otherwise, the program is aborted.
96 // Clobbers x0-x5.
98 cbz x2, 1f
103 add x5, x5, #1
106 subs x2, x2, #1
109 1: ret
112 // Verify that a FPSIMD V-register matches its shadow in memory, else abort
114 // Clobbers x0-x5.
140 ldr x0, [x2, #ucontext_regs + 8 * 23]
141 add x0, x0, #1
142 str x0, [x2, #ucontext_regs + 8 * 23]
144 // Corrupt some random V-regs
145 movi v0.8b, #7
147 movi v31.8b, #31
154 ldr x0, [x2, #ucontext_regs + 8 * 23]
155 add x0, x0, #1
156 str x0, [x2, #ucontext_regs + 8 * 23]
169 ldr x0, [x20, #ucontext_regs + 8 * 22]
172 ldr x0, [x20, #ucontext_regs + 8 * 23]
183 // Clobbers x0-x6,x8
185 str x30, [sp, #-((sa_sz + 15) / 16 * 16 + 16)]!
204 cbz w0, 1f
209 1: ldr x30, [sp], #((sa_sz + 15) / 16 * 16 + 16)
242 // Sanity-check and report the vector length
246 b.lo 1f
248 b.hi 1f
249 tst x19, #(8 - 1)
252 1: puts "Bad vector length: "
275 mov x21, #0 // Set up V-regs & shadow with test pattern
280 add x21, x21, #1
291 add x21, x21, #1
295 add x22, x22, #1
330 mov x1, #1