1 // SPDX-License-Identifier: GPL-2.0-only
3  * Copyright (C) 2011-2012 Synopsys (www.synopsys.com)
6  *  -Adapted (from .26 to .35)
7  *  -original contribution by [email protected]
18 #define BE		1
19 #define FIRST_BYTE_16	"swap %1, %1\n swape %1, %1\n"
20 #define FIRST_BYTE_32	"swape %1, %1\n"
29 	"1:	ldb.ab	%1, [%2, 1]\n"			\
33 	"3:	mov	%0, 1\n"			\
38 	"	.long	1b, 3b\n"			\
45 		unsigned int err = 0, v, a = addr;	\
46 		__get8_unaligned_check(v, a, err);	\
47 		val =  v << ((BE) ? 8 : 0);		\
48 		__get8_unaligned_check(v, a, err);	\
49 		val |= v << ((BE) ? 0 : 8);		\
56 		unsigned int err = 0, v, a = addr;	\
57 		__get8_unaligned_check(v, a, err);	\
58 		val =  v << ((BE) ? 24 : 0);		\
59 		__get8_unaligned_check(v, a, err);	\
60 		val |= v << ((BE) ? 16 : 8);		\
61 		__get8_unaligned_check(v, a, err);	\
62 		val |= v << ((BE) ? 8 : 16);		\
63 		__get8_unaligned_check(v, a, err);	\
64 		val |= v << ((BE) ? 0 : 24);		\
71 		unsigned int err = 0, v = val, a = addr;\
75 		"1:	stb.ab	%1, [%2, 1]\n"		\
76 		"	lsr %1, %1, 8\n"		\
77 		"2:	stb	%1, [%2]\n"		\
81 		"4:	mov	%0, 1\n"		\
86 		"	.long	1b, 4b\n"		\
89 		: "=r" (err), "=&r" (v), "=&r" (a)	\
90 		: "0" (err), "1" (v), "2" (a));		\
98 		unsigned int err = 0, v = val, a = addr;\
102 		"1:	stb.ab	%1, [%2, 1]\n"		\
103 		"	lsr %1, %1, 8\n"		\
104 		"2:	stb.ab	%1, [%2, 1]\n"		\
105 		"	lsr %1, %1, 8\n"		\
106 		"3:	stb.ab	%1, [%2, 1]\n"		\
107 		"	lsr %1, %1, 8\n"		\
108 		"4:	stb	%1, [%2]\n"		\
112 		"6:	mov	%0, 1\n"		\
117 		"	.long	1b, 6b\n"		\
122 		: "=r" (err), "=&r" (v), "=&r" (a)	\
123 		: "0" (err), "1" (v), "2" (a));		\
130 int unaligned_enabled __read_mostly = 1;	/* Enabled by default */
131 int no_unaligned_warning __read_mostly = 1;	/* Only 1 warning by default */
139 	if ((state->aa == 1) || (state->aa == 2)) {  in fixup_load()
140 		set_reg(state->wb_reg, state->src1 + state->src2, regs, cregs);  in fixup_load()
142 		if (state->aa == 2)  in fixup_load()
143 			state->src2 = 0;  in fixup_load()
146 	if (state->zz == 0) {  in fixup_load()
147 		get32_unaligned_check(val, state->src1 + state->src2);  in fixup_load()
149 		get16_unaligned_check(val, state->src1 + state->src2);  in fixup_load()
151 		if (state->x)  in fixup_load()
155 	if (state->pref == 0)  in fixup_load()
156 		set_reg(state->dest, val, regs, cregs);  in fixup_load()
160 fault:	state->fault = 1;  in fixup_load()
167 	if ((state->aa == 1) || (state->aa == 2)) {  in fixup_store()
168 		set_reg(state->wb_reg, state->src2 + state->src3, regs, cregs);  in fixup_store()
170 		if (state->aa == 3)  in fixup_store()
171 			state->src3 = 0;  in fixup_store()
172 	} else if (state->aa == 3) {  in fixup_store()
173 		if (state->zz == 2) {  in fixup_store()
174 			set_reg(state->wb_reg, state->src2 + (state->src3 << 1),  in fixup_store()
176 		} else if (!state->zz) {  in fixup_store()
177 			set_reg(state->wb_reg, state->src2 + (state->src3 << 2),  in fixup_store()
184 	/* write fix-up */  in fixup_store()
185 	if (!state->zz)  in fixup_store()
186 		put32_unaligned_check(state->src1, state->src2 + state->src3);  in fixup_store()
188 		put16_unaligned_check(state->src1, state->src2 + state->src3);  in fixup_store()
192 fault:	state->fault = 1;  in fixup_store()
197  * Returns 0 if successfully handled, 1 if some error happened
204 	/* handle user mode only and only if enabled by sysadmin */  in misaligned_fixup()
206 		return 1;  in misaligned_fixup()
213 			     " echo 0 > /proc/sys/kernel/ignore-unaligned-usertrap\n",  in misaligned_fixup()
214 			     current->comm, task_pid_nr(current));  in misaligned_fixup()
218 			current->comm, task_pid_nr(current),  in misaligned_fixup()
219 			address, regs->ret);  in misaligned_fixup()
223 	disasm_instr(regs->ret, &state, 1, regs, cregs);  in misaligned_fixup()
229 	if ((state.zz == 1) || (state.di))  in misaligned_fixup()
242 		regs->ret = regs->bta & ~1U;  in misaligned_fixup()
243 		regs->status32 &= ~STATUS_DE_MASK;  in misaligned_fixup()
245 		regs->ret += state.instr_len;  in misaligned_fixup()
247 		/* handle zero-overhead-loop */  in misaligned_fixup()
248 		if ((regs->ret == regs->lp_end) && (regs->lp_count)) {  in misaligned_fixup()
249 			regs->ret = regs->lp_start;  in misaligned_fixup()
250 			regs->lp_count--;  in misaligned_fixup()
254 	perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, address);  in misaligned_fixup()
258 	pr_err("Alignment trap: fault in fix-up %08lx at [<%08lx>]\n",  in misaligned_fixup()
261 	return 1;  in misaligned_fixup()