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/nrf52832-nimble/rt-thread/components/drivers/pm/
H A Dpm.c9 * 2018-08-02 Tanek split run and sleep modes, support custom mode
70 * This function will enter corresponding power mode.
83 /* check each run mode, and decide to swithc to run mode or sleep mode */ in rt_pm_enter()
100 /* The current mode is run mode, no need to check sleep mode */ in rt_pm_enter()
108 /* check each sleep mode to decide which mode can system sleep. */ in rt_pm_enter()
115 /* run mode to sleep mode */ in rt_pm_enter()
118 /* exit run mode */ in rt_pm_enter()
122 /* set current power mode */ in rt_pm_enter()
142 /* limit the minimum time to enter timer sleep mode */ in rt_pm_enter()
154 /* exit from low power mode */ in rt_pm_enter()
[all …]
/nrf52832-nimble/rt-thread/components/drivers/include/drivers/
H A Dpm.h9 * 2018-08-02 Tanek split run and sleep modes, support custom mode
34 "Running Mode", \
36 "Sleep Mode", \
37 "Timer Mode", \
38 "Shutdown Mode", \
41 /* run mode count : 1 */
43 /* sleep mode count : 3 */
46 /* support redefining default run mode */
51 /* support redefining default sleep mode */
56 /* support redefining the minimum tick into sleep mode */
[all …]
H A Dhwtimer.h25 HWTIMER_CTRL_MODE_SET /* Setting the timing mode(oneshot/period) */
28 /* Timing Mode */
42 #define HWTIMER_CNTMODE_UP 0x01 /* increment count mode */
43 #define HWTIMER_CNTMODE_DW 0x02 /* decreasing count mode */
50 rt_err_t (*start)(struct rt_hwtimer_device *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode);
62 rt_uint8_t cntmode; /* count mode (inc/dec) */
75 rt_int32_t reload; /* reload cycles(using in period mode) */
76 rt_hwtimer_mode_t mode; /* timing mode(oneshot/period) */ member
H A Dpin.h9 * 2017-10-20 ZYH add mode open drain and input pull down
52 rt_uint16_t mode; member
62 rt_uint16_t mode; member
68 void (*pin_mode)(struct rt_device *device, rt_base_t pin, rt_base_t mode);
74 rt_uint32_t mode, void (*hdr)(void *args), void *args);
81 void rt_pin_mode(rt_base_t pin, rt_base_t mode);
84 rt_err_t rt_pin_attach_irq(rt_int32_t pin, rt_uint32_t mode,
/nrf52832-nimble/rt-thread/libcpu/arm/am335x/
H A Dstart_iar.s14 ; Mode, correspords to bits 0-5 in CPSR
16 MODE_MSK DEFINE 0x1F ; Bit mask for mode bits in CPSR
20 USR_MODE DEFINE 0x10 ; User mode
21 FIQ_MODE DEFINE 0x11 ; Fast Interrupt Request mode
22 IRQ_MODE DEFINE 0x12 ; Interrupt Request mode
23 SVC_MODE DEFINE 0x13 ; Supervisor mode
24 ABT_MODE DEFINE 0x17 ; Abort mode
25 UND_MODE DEFINE 0x1B ; Undefined Instruction mode
26 SYS_MODE DEFINE 0x1F ; System mode
78 ; After a reset execution starts here, the mode is ARM, supervisor
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/nrf52832-nimble/rt-thread/components/dfs/filesystems/jffs2/cyg/compress/src/
H A Dinflate.c113 state->mode = HEAD;
582 if (state->mode == TYPE) state->mode = TYPEDO; /* skip check */
588 switch (state->mode) {
591 state->mode = TYPEDO;
600 state->mode = FLAGS;
612 state->mode = BAD;
617 state->mode = BAD;
624 state->mode = BAD;
630 state->mode = hold & 0x200 ? DICTID : TYPE;
639 state->mode = BAD;
[all …]
H A Dinfblock.c75 if (s->mode == BTREE || s->mode == DTREE)
77 if (s->mode == CODES)
79 s->mode = TYPE;
113 s->mode = TYPE;
137 while (1) switch (s->mode)
151 s->mode = LENS; /* get length of stored block */
169 s->mode = CODES;
175 s->mode = TABLE;
179 s->mode = BAD;
189 s->mode = BAD;
[all …]
H A Dinfback.c270 state->mode = TYPE;
282 switch (state->mode) {
287 state->mode = DONE;
297 state->mode = STORED;
303 state->mode = LEN; /* decode codes */
308 state->mode = TABLE;
312 state->mode = BAD;
323 state->mode = BAD;
346 state->mode = TYPE;
361 state->mode = BAD;
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/nrf52832-nimble/nordic/nrfx/drivers/include/
H A Dnrfx_qspi.h134 * will be performed in blocking mode.
155 …* If the memory is busy, the resulting action depends on the mode in which the read operation is u…
156 * - blocking mode (without handler) - a delay occurs until the last operation still runs and
158 * - interrupt mode (with handler) - event emission occurs after the last operation
165 * @retval NRFX_SUCCESS If the operation was successful (blocking mode) or operation
166 * was commissioned (handler mode).
178 …* If the memory is busy, the resulting action depends on the mode in which the write operation is …
179 * - blocking mode (without handler) - a delay occurs until the last operation still runs and
181 * - interrupt mode (with handler) - event emission occurs after the last operation
192 * @retval NRFX_SUCCESS If the operation was successful (blocking mode) or operation
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H A Dnrfx_uart.h165 * blocking mode.
211 * Otherwise, the transfer is performed in blocking mode, i.e. this function
212 * returns when the transfer is finished. Blocking mode is not using interrupt
222 * (blocking mode only).
240 * @note @ref NRFX_UART_EVT_TX_DONE event will be generated in non-blocking mode.
253 * Otherwise, the transfer is performed in blocking mode, meaning that this function
254 * returns when the transfer is finished. Blocking mode is not using interrupt so
257 * The receive buffer pointer is double buffered in non-blocking mode. The secondary
275 * @retval NRFX_SUCCESS If reception is complete (in case of blocking mode) or it is
276 * successfully started (in case of non-blocking mode).
[all …]
H A Dnrfx_uarte.h174 * blocking mode.
220 * Otherwise, the transfer is performed in blocking mode, i.e. this function
221 * returns when the transfer is finished. Blocking mode is not using interrupt
238 * (blocking mode only).
257 * @note @ref NRFX_UARTE_EVT_TX_DONE event will be generated in non-blocking mode.
270 * Otherwise, the transfer is performed in blocking mode, i.e. this function
271 * returns when the transfer is finished. Blocking mode is not using interrupt so
273 * The receive buffer pointer is double buffered in non-blocking mode. The secondary
292 * in non-blocking mode).
294 * (blocking mode only).
[all …]
/nrf52832-nimble/rt-thread/components/drivers/misc/
H A Dpin.c51 struct rt_device_pin_mode *mode; in _pin_control() local
57 mode = (struct rt_device_pin_mode *) args; in _pin_control()
58 if (mode == RT_NULL) return -RT_ERROR; in _pin_control()
60 pin->ops->pin_mode(dev, (rt_base_t)mode->pin, (rt_base_t)mode->mode); in _pin_control()
103 rt_err_t rt_pin_attach_irq(rt_int32_t pin, rt_uint32_t mode, in rt_pin_attach_irq() argument
109 return _hw_pin.ops->pin_attach_irq(&_hw_pin.parent, pin, mode, hdr, args); in rt_pin_attach_irq()
134 void rt_pin_mode(rt_base_t pin, rt_base_t mode) in rt_pin_mode() argument
137 _hw_pin.ops->pin_mode(&_hw_pin.parent, pin, mode); in rt_pin_mode()
139 FINSH_FUNCTION_EXPORT_ALIAS(rt_pin_mode, pinMode, set hardware pin mode);
/nrf52832-nimble/nordic/nrfx/hal/
H A Dnrf_power.h86 …WER_TASK_CONSTLAT = offsetof(NRF_POWER_Type, TASKS_CONSTLAT), /**< Enable constant latency mode */
87 …NRF_POWER_TASK_LOWPWR = offsetof(NRF_POWER_Type, TASKS_LOWPWR ), /**< Enable low power mode (v…
198 NRF_POWER_ONRAM0, /**< Keep RAM block 0 on or off in system ON Mode */
200 NRF_POWER_ONRAM1, /**< Keep RAM block 1 on or off in system ON Mode */
202 NRF_POWER_ONRAM2, /**< Keep RAM block 2 on or off in system ON Mode */
204 NRF_POWER_ONRAM3, /**< Keep RAM block 3 on or off in system ON Mode */
215 …SK = 1U << NRF_POWER_ONRAM0, /**< Keep RAM block 0 on or off in system ON Mode */
217 …SK = 1U << NRF_POWER_ONRAM1, /**< Keep RAM block 1 on or off in system ON Mode */
219 …SK = 1U << NRF_POWER_ONRAM2, /**< Keep RAM block 2 on or off in system ON Mode */
221 …SK = 1U << NRF_POWER_ONRAM3, /**< Keep RAM block 3 on or off in system ON Mode */
[all …]
H A Dnrf_pdm.h97 * @brief PDM operation mode.
107 * @brief PDM sampling mode.
240 * @brief Function for setting the PDM operation mode.
242 * @param[in] pdm_mode PDM operation mode.
243 * @param[in] pdm_edge PDM sampling mode.
248 * @brief Function for getting the PDM operation mode.
250 * @param[out] p_pdm_mode PDM operation mode.
251 * @param[out] p_pdm_edge PDM sampling mode.
300 * @param[in] num Number of samples to allocate memory for in EasyDMA mode.
302 * The amount of allocated RAM depends on the operation mode.
[all …]
/nrf52832-nimble/rt-thread/components/net/freemodbus/port/
H A Duser_mb_app.h19 /* salve mode: holding register's all address */
21 /* salve mode: input register's all address */
23 /* salve mode: coil's all address */
25 /* salve mode: discrete's all address */
37 /* master mode: holding register's all address */
39 /* master mode: input register's all address */
41 /* master mode: coil's all address */
43 /* master mode: discrete's all address */
/nrf52832-nimble/rt-thread/components/libc/compilers/dlib/
H A Dsyscall_open.c19 int __open(const char *filename, int mode) in __open() argument
27 if (mode & _LLIO_CREAT) in __open()
32 if (mode & _LLIO_APPEND) in __open()
38 if (mode & _LLIO_TRUNC) in __open()
45 if (mode & _LLIO_TEXT) in __open()
47 /* we didn't support text mode */ in __open()
50 switch (mode & _LLIO_RDWRMASK) in __open()
/nrf52832-nimble/rt-thread/components/drivers/sensors/
H A Dsensor.h102 * Interaction with suspend mode
105 * SoC to go into suspend mode. It is the responsibility of applications
107 * events while the screen is off. While in suspend mode, and unless
108 * otherwise noted (batch mode, sensor particularities, ...), enabled sensors'
112 * suspend mode -- it's just that the data it returns are lost. As soon as
113 * the SoC gets out of suspend mode, operations resume as usual. Of course,
114 * in practice sensors shall be disabled while in suspend mode to
115 * save power, unless batch mode is active, in which case they must
117 * learn how suspend interacts with batch mode).
119 * In batch mode, and only when the flag SENSORS_BATCH_WAKE_UPON_FIFO_FULL is
[all …]
/nrf52832-nimble/rt-thread/components/libc/compilers/armlibc/
H A Dstubs.c45 * the ISO mode specification.
52 int mode = O_RDONLY; in _sys_open() local
71 mode |= (O_RDWR | O_TRUNC | O_CREAT); in _sys_open()
75 mode |= (O_RDWR | O_APPEND | O_CREAT); in _sys_open()
78 mode |= O_RDWR; in _sys_open()
84 mode |= (O_WRONLY | O_TRUNC | O_CREAT); in _sys_open()
88 mode |= (O_WRONLY | O_APPEND | O_CREAT); in _sys_open()
92 fd = open(name, mode, 0); in _sys_open()
134 * `mode' exists for historical reasons and must be ignored.
136 int _sys_read(FILEHANDLE fh, unsigned char *buf, unsigned len, int mode) in _sys_read() argument
[all …]
/nrf52832-nimble/rt-thread/libcpu/arm/AT91SAM7X/
H A Dstart_rvds.S27 ; Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs
29 ; 2009-12-28 MingBai Bug fix (USR mode stack removed).
50 ;// <o0> Undefined Mode <0x0-0xFFFFFFFF:8>
51 ;// <o1> Supervisor Mode <0x0-0xFFFFFFFF:8>
52 ;// <o2> Abort Mode <0x0-0xFFFFFFFF:8>
53 ;// <o3> Fast Interrupt Mode <0x0-0xFFFFFFFF:8>
54 ;// <o4> Interrupt Mode <0x0-0xFFFFFFFF:8>
55 ;// <o5> User/System Mode <0x0-0xFFFFFFFF:8>
219 ; Absolute addressing mode must be used.
362 ; Setup Stack for each mode
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/nrf52832-nimble/rt-thread/components/net/lwip-2.0.2/doc/doxygen/
H A Dmain_page.h52 * Mainloop Mode
54 * In mainloop mode, only @ref callbackstyle_api can be used.
73 * OS Mode
75 * In OS mode, @ref callbackstyle_api AND @ref sequential_api can be used.
104 * @defgroup lwip_nosys Mainloop mode ("NO_SYS")
106 * Use this mode if you do not run an OS on your system. \#define NO_SYS to 1.
113 * You can only use @ref callbackstyle_api in this mode.\n
119 * @defgroup lwip_os OS mode (TCPIP thread)
121 * Use this mode if you run an OS on your system. It is recommended to
/nrf52832-nimble/packages/NimBLE-latest/ext/tinycrypt/include/tinycrypt/
H A Dctr_mode.h1 /* ctr_mode.h - TinyCrypt interface to CTR mode */
35 * @brief Interface to CTR mode.
37 * Overview: CTR (pronounced "counter") mode is a NIST approved mode of
42 * Security: CTR mode achieves confidentiality only if the counter value is
59 * CTR mode provides NO data integrity.
78 * @brief CTR mode encryption/decryption procedure.
79 * CTR mode encrypts (or decrypts) inlen bytes from in buffer into out buffer
H A Dcbc_mode.h1 /* cbc_mode.h - TinyCrypt interface to a CBC mode implementation */
35 * @brief Interface to a CBC mode implementation.
37 * Overview: CBC (for "cipher block chaining") mode is a NIST approved mode of
43 * Security: CBC mode provides data confidentiality given that the maximum
46 * good practice to replace the encryption when q == 2^56). CBC mode
49 * CBC mode assumes that the IV value input into the
56 * The randomness property on which CBC mode's security depends is
58 * means in practice that CBC mode requires that the IV is stored
/nrf52832-nimble/packages/NimBLE-latest/ext/tinycrypt/documentation/
H A Dtinycrypt.rst43 * AES-CBC mode:
45 * Type of primitive: Encryption mode of operation.
49 * AES-CTR mode:
51 * Type of primitive: Encryption mode of operation.
55 * AES-CMAC mode:
61 * AES-CCM mode:
162 * CTR mode:
164 * The AES-CTR mode limits the size of a data message they encrypt to 2^32
175 * CBC mode:
181 * CMAC mode:
[all …]
/nrf52832-nimble/rt-thread/libcpu/arm/lpc214x/
H A Dstart_rvds.S37 ; Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs
52 ;// <o0> Undefined Mode <0x0-0xFFFFFFFF:8>
53 ;// <o1> Supervisor Mode <0x0-0xFFFFFFFF:8>
54 ;// <o2> Abort Mode <0x0-0xFFFFFFFF:8>
55 ;// <o3> Fast Interrupt Mode <0x0-0xFFFFFFFF:8>
56 ;// <o4> Interrupt Mode <0x0-0xFFFFFFFF:8>
57 ;// <o5> User/System Mode <0x0-0xFFFFFFFF:8>
142 ;// <i> Mode
236 ; Absolute addressing mode must be used.
369 ; Setup Stack for each mode
[all …]
/nrf52832-nimble/rt-thread/tools/kconfig-frontends/scripts/.autostuff/scripts/
H A Dinstall-sh69 # Desired mode of installed file.
70 mode=0755
105 -m MODE $chmodprog installed files to MODE.
129 -m) mode=$2
130 case $mode in
132 echo "$0: invalid mode: $mode" >&2
224 case $mode in
235 cp_umask=`expr '(' 777 - $mode % 1000 ')' $u_plus_rw`;;
242 cp_umask=$mode$u_plus_rw;;
296 # Create intermediate dirs using mode 755 as modified by the umask.
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