1*10465441SEvalZero #ifndef USER_APP 2*10465441SEvalZero #define USER_APP 3*10465441SEvalZero /* ----------------------- Modbus includes ----------------------------------*/ 4*10465441SEvalZero #include "mb.h" 5*10465441SEvalZero #include "mb_m.h" 6*10465441SEvalZero #include "mbconfig.h" 7*10465441SEvalZero #include "mbframe.h" 8*10465441SEvalZero #include "mbutils.h" 9*10465441SEvalZero 10*10465441SEvalZero /* -----------------------Slave Defines -------------------------------------*/ 11*10465441SEvalZero #define S_DISCRETE_INPUT_START 0 12*10465441SEvalZero #define S_DISCRETE_INPUT_NDISCRETES 16 13*10465441SEvalZero #define S_COIL_START 0 14*10465441SEvalZero #define S_COIL_NCOILS 64 15*10465441SEvalZero #define S_REG_INPUT_START 0 16*10465441SEvalZero #define S_REG_INPUT_NREGS 100 17*10465441SEvalZero #define S_REG_HOLDING_START 0 18*10465441SEvalZero #define S_REG_HOLDING_NREGS 100 19*10465441SEvalZero /* salve mode: holding register's all address */ 20*10465441SEvalZero #define S_HD_RESERVE 0 21*10465441SEvalZero /* salve mode: input register's all address */ 22*10465441SEvalZero #define S_IN_RESERVE 0 23*10465441SEvalZero /* salve mode: coil's all address */ 24*10465441SEvalZero #define S_CO_RESERVE 0 25*10465441SEvalZero /* salve mode: discrete's all address */ 26*10465441SEvalZero #define S_DI_RESERVE 0 27*10465441SEvalZero 28*10465441SEvalZero /* -----------------------Master Defines -------------------------------------*/ 29*10465441SEvalZero #define M_DISCRETE_INPUT_START 0 30*10465441SEvalZero #define M_DISCRETE_INPUT_NDISCRETES 16 31*10465441SEvalZero #define M_COIL_START 0 32*10465441SEvalZero #define M_COIL_NCOILS 64 33*10465441SEvalZero #define M_REG_INPUT_START 0 34*10465441SEvalZero #define M_REG_INPUT_NREGS 100 35*10465441SEvalZero #define M_REG_HOLDING_START 0 36*10465441SEvalZero #define M_REG_HOLDING_NREGS 100 37*10465441SEvalZero /* master mode: holding register's all address */ 38*10465441SEvalZero #define M_HD_RESERVE 0 39*10465441SEvalZero /* master mode: input register's all address */ 40*10465441SEvalZero #define M_IN_RESERVE 0 41*10465441SEvalZero /* master mode: coil's all address */ 42*10465441SEvalZero #define M_CO_RESERVE 0 43*10465441SEvalZero /* master mode: discrete's all address */ 44*10465441SEvalZero #define M_DI_RESERVE 0 45*10465441SEvalZero 46*10465441SEvalZero #endif 47