| /linux-6.14.4/Documentation/devicetree/bindings/clock/ |
| D | qcom,mmcc.yaml | 117 - description: MMSS GPLL0 voted clock
118 - description: GPLL0 voted clock
145 - description: MMSS GPLL0 voted clock
146 - description: GPLL0 voted clock
184 - description: MMSS GPLL0 voted clock
185 - description: GPLL0 clock
186 - description: GPLL0 voted clock
201 - const: gpll0
248 - const: gpll0
278 - const: gpll0
[all …]
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| D | qcom,msm8998-gpucc.yaml | 25 - description: GPLL0 main branch source (gcc_gpu_gpll0_clk_src)
30 - const: gpll0
54 clock-names = "xo", "gpll0";
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| D | qcom,sm6115-gpucc.yaml | 26 - description: GPLL0 main branch source
27 - description: GPLL0 main div source
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| D | qcom,gpucc-sdm660.yaml | 27 - description: GPLL0 main gpu branch
28 - description: GPLL0 divider gpu branch
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| D | qcom,sm6375-gpucc.yaml | 26 - description: GPLL0 main branch source
27 - description: GPLL0 div branch source
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| D | qcom,qcm2290-gpucc.yaml | 30 - description: GPLL0 main branch source
31 - description: GPLL0 div branch source
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| D | qcom,qcm2290-dispcc.yaml | 26 - description: GPLL0 source from GCC
27 - description: GPLL0 div source from GCC
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| D | qcom,sm8450-gpucc.yaml | 40 - description: GPLL0 main branch source
41 - description: GPLL0 div branch source
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| D | qcom,sdm845-dispcc.yaml | 28 - description: GPLL0 source from GCC
29 - description: GPLL0 div source from GCC
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| D | qcom,gpucc.yaml | 47 - description: GPLL0 main branch source
48 - description: GPLL0 div branch source
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| /linux-6.14.4/Documentation/devicetree/bindings/interconnect/ |
| D | qcom,osm-l3.yaml | 67 #define GPLL0 165
74 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
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| /linux-6.14.4/drivers/clk/qcom/ |
| D | gcc-sc7180.c | 35 static struct clk_alpha_pll gpll0 = { variable
42 .name = "gpll0",
68 &gpll0.clkr.hw,
81 &gpll0.clkr.hw,
168 { .hw = &gpll0.clkr.hw },
174 { .hw = &gpll0.clkr.hw },
187 { .hw = &gpll0.clkr.hw },
202 { .hw = &gpll0.clkr.hw },
215 { .hw = &gpll0.clkr.hw },
227 { .hw = &gpll0.clkr.hw },
[all …]
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| D | gcc-sm7150.c | 41 static struct clk_alpha_pll gpll0 = { variable
48 .name = "gpll0",
76 &gpll0.clkr.hw,
89 &gpll0.clkr.hw,
138 { .hw = &gpll0.clkr.hw },
143 { .hw = &gpll0.clkr.hw },
156 { .hw = &gpll0.clkr.hw },
168 { .hw = &gpll0.clkr.hw },
173 { .hw = &gpll0.clkr.hw },
203 { .hw = &gpll0.clkr.hw },
[all …]
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| D | gcc-qcm2290.c | 57 static struct clk_alpha_pll gpll0 = { variable
64 .name = "gpll0",
88 .parent_hws = (const struct clk_hw *[]){ &gpll0.clkr.hw },
416 { .hw = &gpll0.clkr.hw },
429 { .hw = &gpll0.clkr.hw },
443 { .hw = &gpll0.clkr.hw },
459 { .hw = &gpll0.clkr.hw },
477 { .hw = &gpll0.clkr.hw },
494 { .hw = &gpll0.clkr.hw },
512 { .hw = &gpll0.clkr.hw },
[all …]
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| D | gcc-qcs615.c | 44 static struct clk_alpha_pll gpll0 = { variable
51 .name = "gpll0",
61 /* Fixed divider clock of GPLL0 instead of PLL normal postdiv */
68 .hw = &gpll0.clkr.hw,
226 { .hw = &gpll0.clkr.hw },
232 { .hw = &gpll0.clkr.hw },
233 { .hw = &gpll0.clkr.hw },
245 { .hw = &gpll0.clkr.hw },
259 { .hw = &gpll0.clkr.hw },
292 { .hw = &gpll0.clkr.hw },
[all …]
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| D | gcc-sm6115.c | 57 static struct clk_alpha_pll gpll0 = { variable
66 .name = "gpll0",
90 .parent_hws = (const struct clk_hw *[]){ &gpll0.clkr.hw },
110 .parent_hws = (const struct clk_hw *[]){ &gpll0.clkr.hw },
475 { .hw = &gpll0.clkr.hw },
488 { .hw = &gpll0.clkr.hw },
502 { .hw = &gpll0.clkr.hw },
517 { .hw = &gpll0.clkr.hw },
532 { .hw = &gpll0.clkr.hw },
548 { .hw = &gpll0.clkr.hw },
[all …]
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| D | gcc-sm6375.c | 61 static struct clk_alpha_pll gpll0 = { variable
68 .name = "gpll0",
93 &gpll0.clkr.hw,
115 &gpll0.clkr.hw,
447 { .hw = &gpll0.clkr.hw },
460 { .hw = &gpll0.clkr.hw },
474 { .hw = &gpll0.clkr.hw },
481 { .hw = &gpll0.clkr.hw },
497 { .hw = &gpll0.clkr.hw },
515 { .hw = &gpll0.clkr.hw },
[all …]
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| D | gcc-mdm9607.c | 54 static struct clk_alpha_pll_postdiv gpll0 = { variable
59 .name = "gpll0",
73 { .hw = &gpll0.clkr.hw },
114 { .hw = &gpll0.clkr.hw },
157 { .hw = &gpll0.clkr.hw },
170 { .hw = &gpll0.clkr.hw },
232 { .hw = &gpll0.clkr.hw },
1477 [GPLL0] = &gpll0.clkr,
1604 /* Vote for GPLL0 to turn on. Needed by acpuclock. */ in gcc_mdm9607_probe()
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| D | gcc-sdx55.c | 36 static struct clk_alpha_pll gpll0 = { variable
45 .name = "gpll0",
73 &gpll0.clkr.hw,
143 { .hw = &gpll0.clkr.hw },
149 { .hw = &gpll0.clkr.hw },
163 { .hw = &gpll0.clkr.hw },
178 { .hw = &gpll0.clkr.hw },
202 { .hw = &gpll0.clkr.hw },
1556 [GPLL0] = &gpll0.clkr,
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| D | gcc-sm6350.c | 34 static struct clk_alpha_pll gpll0 = { variable
41 .name = "gpll0",
66 &gpll0.clkr.hw,
88 &gpll0.clkr.hw,
160 { .hw = &gpll0.clkr.hw },
201 { .hw = &gpll0.clkr.hw },
260 &gpll0.clkr.hw,
274 &gpll0.clkr.hw,
1163 &gpll0.clkr.hw,
1277 &gpll0.clkr.hw,
[all …]
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| D | gcc-ipq9574.c | 97 static struct clk_alpha_pll_postdiv gpll0 = { variable
102 .name = "gpll0",
186 { .hw = &gpll0.clkr.hw },
198 { .hw = &gpll0.clkr.hw },
208 { .hw = &gpll0.clkr.hw },
220 { .hw = &gpll0.clkr.hw },
222 { .hw = &gpll0.clkr.hw },
234 { .hw = &gpll0.clkr.hw },
248 { .hw = &gpll0.clkr.hw },
260 { .hw = &gpll0.clkr.hw },
[all …]
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| D | mmcc-msm8996.c | 53 { .fw_name = "gpll0", .name = "gpll0" },
355 { .fw_name = "gpll0", .name = "gpll0" },
381 { .fw_name = "gpll0", .name = "gpll0" },
397 { .fw_name = "gpll0", .name = "gpll0" },
413 { .fw_name = "gpll0", .name = "gpll0" },
429 { .fw_name = "gpll0", .name = "gpll0" },
445 { .fw_name = "gpll0", .name = "gpll0" },
464 { .fw_name = "gpll0", .name = "gpll0" },
483 { .fw_name = "gpll0", .name = "gpll0" },
503 { .fw_name = "gpll0", .name = "gpll0" },
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| D | gcc-msm8953.c | 69 static struct clk_alpha_pll_postdiv gpll0 = { variable
73 .name = "gpll0",
243 { .hw = &gpll0.clkr.hw },
255 { .hw = &gpll0.clkr.hw },
678 { .hw = &gpll0.clkr.hw },
748 { .hw = &gpll0.clkr.hw },
783 { .hw = &gpll0.clkr.hw },
849 { .hw = &gpll0.clkr.hw },
912 { .hw = &gpll0.clkr.hw },
1019 { .hw = &gpll0.clkr.hw },
[all …]
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| /linux-6.14.4/Documentation/devicetree/bindings/remoteproc/ |
| D | qcom,msm8996-mss-pil.yaml | 220 - description: GCC MSS GPLL0 clock
255 - description: GCC MSS GPLL0 clock
292 - description: GCC MSS GPLL0 clock
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| /linux-6.14.4/Documentation/devicetree/bindings/mailbox/ |
| D | qcom,apcs-kpss-global.yaml | 160 - description: GCC GPLL0 clock source
165 - const: gpll0
|