Lines Matching full:gpll0
44 static struct clk_alpha_pll gpll0 = { variable
51 .name = "gpll0",
61 /* Fixed divider clock of GPLL0 instead of PLL normal postdiv */
68 .hw = &gpll0.clkr.hw,
226 { .hw = &gpll0.clkr.hw },
232 { .hw = &gpll0.clkr.hw },
233 { .hw = &gpll0.clkr.hw },
245 { .hw = &gpll0.clkr.hw },
259 { .hw = &gpll0.clkr.hw },
292 { .hw = &gpll0.clkr.hw },
307 { .hw = &gpll0.clkr.hw },
321 { .hw = &gpll0.clkr.hw },
336 { .hw = &gpll0.clkr.hw },
350 { .hw = &gpll0.clkr.hw },
1426 &gpll0.clkr.hw,
2894 [GPLL0] = &gpll0.clkr,
2989 * Disable the GPLL0 active input to MM blocks and GPU in gcc_qcs615_probe()