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/nrf52832-nimble/packages/NimBLE-latest/apps/ext_advertiser/src/
H A Dpatterns.h21 0x00, 0x02, 0x00, 0x04, 0x00, 0x06, 0x00, 0x08, 0x00, 0x0a,
22 0x00, 0x0c, 0x00, 0x0e, 0x00, 0x10, 0x00, 0x12, 0x00, 0x14,
23 0x00, 0x16, 0x00, 0x18, 0x00, 0x1a, 0x00, 0x1c, 0x00, 0x1e,
24 0x00, 0x20, 0x00, 0x22, 0x00, 0x24, 0x00, 0x26, 0x00, 0x28,
25 0x00, 0x2a, 0x00, 0x2c, 0x00, 0x2e, 0x00, 0x30, 0x00, 0x32,
26 0x00, 0x34, 0x00, 0x36, 0x00, 0x38, 0x00, 0x3a, 0x00, 0x3c,
27 0x00, 0x3e, 0x00, 0x40, 0x00, 0x42, 0x00, 0x44, 0x00, 0x46,
28 0x00, 0x48, 0x00, 0x4a, 0x00, 0x4c, 0x00, 0x4e, 0x00, 0x50,
29 0x00, 0x52, 0x00, 0x54, 0x00, 0x56, 0x00, 0x58, 0x00, 0x5a,
30 0x00, 0x5c, 0x00, 0x5e, 0x00, 0x60, 0x00, 0x62, 0x00, 0x64,
[all …]
/nrf52832-nimble/rt-thread/components/net/freemodbus/modbus/rtu/
H A Dmbcrc.c35 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
36 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
37 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
38 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
39 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
40 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
41 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
42 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
43 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
44 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
[all …]
/nrf52832-nimble/rt-thread/components/drivers/usb/usbdevice/class/
H A Dhid.c42 USAGE_PAGE(1), 0x01,
43 USAGE(1), 0x06,
44 COLLECTION(1), 0x01,
47 USAGE_PAGE(1), 0x07,
48 USAGE_MINIMUM(1), 0xE0,
49 USAGE_MAXIMUM(1), 0xE7,
50 LOGICAL_MINIMUM(1), 0x00,
51 LOGICAL_MAXIMUM(1), 0x01,
52 REPORT_SIZE(1), 0x01,
53 REPORT_COUNT(1), 0x08,
[all …]
H A Dcdc.h15 #define USB_CDC_BUFSIZE 0x40
17 #define USB_CDC_CLASS_COMM 0x02
18 #define USB_CDC_CLASS_DATA 0x0A
20 #define USB_CDC_SUBCLASS_NONE 0x00
21 #define USB_CDC_SUBCLASS_DLCM 0x01
22 #define USB_CDC_SUBCLASS_ACM 0x02
23 #define USB_CDC_SUBCLASS_TCM 0x03
24 #define USB_CDC_SUBCLASS_MCCM 0x04
25 #define USB_CDC_SUBCLASS_CCM 0x05
26 #define USB_CDC_SUBCLASS_ETH 0x06
[all …]
H A Dhid.h18 #define HID_DESCRIPTOR_TYPE 0x21
19 #define HID_DESCRIPTOR_SIZE 0x09
20 #define HID_OFF_HID_DESC 0x12
22 #define USB_HID_SUBCLASS_BOOT 0x01
23 #define USB_HID_SUBCLASS_NOBOOT 0x00
25 #define USB_HID_PROTOCOL_NONE 0x00
26 #define USB_HID_PROTOCOL_KEYBOARD 0x01
27 #define USB_HID_PROTOCOL_MOUSE 0x02
30 #define USB_HID_REQ_GET_REPORT 0x01
31 #define USB_HID_REQ_GET_IDLE 0x02
[all …]
/nrf52832-nimble/rt-thread/components/net/lwip-2.0.2/test/unit/dhcp/
H A Dtest_dhcp.c11 static const u8_t broadcast[6] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
13 static const u8_t magic_cookie[] = { 0x63, 0x82, 0x53, 0x63 };
16 0x00, 0x23, 0xc1, 0xde, 0xd0, 0x0d, /* To unit */
17 0x00, 0x0F, 0xEE, 0x30, 0xAB, 0x22, /* From Remote host */
18 0x08, 0x00, /* Protocol: IP */
19 …0x45, 0x10, 0x01, 0x48, 0x00, 0x00, 0x00, 0x00, 0x80, 0x11, 0x36, 0xcc, 0xc3, 0xaa, 0xbd, 0xab, 0x…
20 0x00, 0x43, 0x00, 0x44, 0x01, 0x34, 0x00, 0x00, /* UDP header */
22 0x02, /* Type == Boot reply */
23 0x01, 0x06, /* Hw Ethernet, 6 bytes addrlen */
24 0x00, /* 0 hops */
[all …]
/nrf52832-nimble/rt-thread/components/net/lwip-2.1.0/test/unit/dhcp/
H A Dtest_dhcp.c11 static const u8_t broadcast[6] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
13 static const u8_t magic_cookie[] = { 0x63, 0x82, 0x53, 0x63 };
16 0x00, 0x23, 0xc1, 0xde, 0xd0, 0x0d, /* To unit */
17 0x00, 0x0F, 0xEE, 0x30, 0xAB, 0x22, /* From Remote host */
18 0x08, 0x00, /* Protocol: IP */
19 …0x45, 0x10, 0x01, 0x48, 0x00, 0x00, 0x00, 0x00, 0x80, 0x11, 0x36, 0xcc, 0xc3, 0xaa, 0xbd, 0xab, 0x…
20 0x00, 0x43, 0x00, 0x44, 0x01, 0x34, 0x00, 0x00, /* UDP header */
22 0x02, /* Type == Boot reply */
23 0x01, 0x06, /* Hw Ethernet, 6 bytes addrlen */
24 0x00, /* 0 hops */
[all …]
/nrf52832-nimble/rt-thread/components/drivers/spi/
H A Denc28j60.h21 // - Register address (bits 0-4)
24 #define ADDR_MASK 0x1F
25 #define BANK_MASK 0x60
26 #define SPRD_MASK 0x80
28 #define EIE 0x1B
29 #define EIR 0x1C
30 #define ESTAT 0x1D
31 #define ECON2 0x1E
32 #define ECON1 0x1F
33 // Bank 0 registers
[all …]
/nrf52832-nimble/packages/NimBLE-latest/nimble/host/include/host/
H A Dble_sm.h30 #define BLE_SM_ERR_PASSKEY 0x01
31 #define BLE_SM_ERR_OOB 0x02
32 #define BLE_SM_ERR_AUTHREQ 0x03
33 #define BLE_SM_ERR_CONFIRM_MISMATCH 0x04
34 #define BLE_SM_ERR_PAIR_NOT_SUPP 0x05
35 #define BLE_SM_ERR_ENC_KEY_SZ 0x06
36 #define BLE_SM_ERR_CMD_NOT_SUPP 0x07
37 #define BLE_SM_ERR_UNSPECIFIED 0x08
38 #define BLE_SM_ERR_REPEATED 0x09
39 #define BLE_SM_ERR_INVAL 0x0a
[all …]
H A Dble_hs_hci.h41 * map[0] & 0x01 --> Channel 0.
42 * map[0] & 0x02 --> Channel 1.
44 * map[1] & 0x01 --> Channel 8.
57 * @return 0 on success;
69 * map[0] & 0x01 --> Channel 0.
70 * map[0] & 0x02 --> Channel 1.
72 * map[1] & 0x01 --> Channel 8.
82 * @return 0 on success;
/nrf52832-nimble/packages/NimBLE-latest/apps/blemesh_models_example_2/src/
H A Ddevice_composition.h11 #define CID_RUNTIME 0x05C3
13 #define STATE_OFF 0x00
14 #define STATE_ON 0x01
15 #define STATE_DEFAULT 0x01
16 #define STATE_RESTORE 0x02
19 #define LIGHTNESS_MIN 0x0001
20 #define LIGHTNESS_MAX 0xFFFF
21 #define TEMP_MIN 0x0320
22 #define TEMP_MAX 0x4E20
25 #define RANGE_SUCCESSFULLY_UPDATED 0x00
[all …]
/nrf52832-nimble/rt-thread/components/dfs/include/
H A Ddfs_poll.h19 #define POLLIN (0x01)
20 #define POLLRDNORM (0x01)
21 #define POLLRDBAND (0x01)
22 #define POLLPRI (0x01)
24 #define POLLOUT (0x02)
25 #define POLLWRNORM (0x02)
26 #define POLLWRBAND (0x02)
28 #define POLLERR (0x04)
29 #define POLLHUP (0x08)
30 #define POLLNVAL (0x10)
/nrf52832-nimble/packages/NimBLE-latest/nimble/host/mesh/src/
H A Dcrypto.c25 #define NET_MIC_LEN(pdu) (((pdu)[1] & 0x80) ? 8 : 4)
49 return 0; in bt_mesh_aes_cmac()
58 if (err < 0) { in bt_mesh_k1()
88 pad = 0x01; in bt_mesh_k2()
90 sg[0].data = NULL; in bt_mesh_k2()
91 sg[0].len = 0; in bt_mesh_k2()
102 net_id[0] = out[15] & 0x7f; in bt_mesh_k2()
104 sg[0].data = out; in bt_mesh_k2()
105 sg[0].len = sizeof(out); in bt_mesh_k2()
106 pad = 0x02; in bt_mesh_k2()
[all …]
/nrf52832-nimble/packages/NimBLE-latest/nimble/host/test/src/
H A Dble_sm_lgcy_test.c51 0xe1, 0xfc, 0xda, 0xf4, 0xb7, 0x6c, in TEST_CASE()
54 0x33, 0x22, 0x11, 0x00, 0x45, 0x0a, in TEST_CASE()
57 .io_cap = 0x04, in TEST_CASE()
58 .oob_data_flag = 0x00, in TEST_CASE()
59 .authreq = 0x05, in TEST_CASE()
60 .max_enc_key_size = 0x10, in TEST_CASE()
61 .init_key_dist = 0x07, in TEST_CASE()
62 .resp_key_dist = 0x07, in TEST_CASE()
65 .io_cap = 0x03, in TEST_CASE()
66 .oob_data_flag = 0x00, in TEST_CASE()
[all …]
H A Dble_sm_sc_test.c40 * Initiator address type: 0
41 * Responder address type: 0
51 0xca, 0x61, 0xa0, 0x67, 0x94, 0xe0, in TEST_CASE()
54 0x33, 0x22, 0x11, 0x00, 0x45, 0x0a, in TEST_CASE()
57 .io_cap = 0x03, in TEST_CASE()
58 .oob_data_flag = 0x00, in TEST_CASE()
59 .authreq = 0x09, in TEST_CASE()
60 .max_enc_key_size = 0x10, in TEST_CASE()
61 .init_key_dist = 0x0d, in TEST_CASE()
62 .resp_key_dist = 0x0f, in TEST_CASE()
[all …]
H A Dble_sm_test.c39 uint8_t u[32] = { 0xe6, 0x9d, 0x35, 0x0e, 0x48, 0x01, 0x03, 0xcc, in TEST_CASE()
40 0xdb, 0xfd, 0xf4, 0xac, 0x11, 0x91, 0xf4, 0xef, in TEST_CASE()
41 0xb9, 0xa5, 0xf9, 0xe9, 0xa7, 0x83, 0x2c, 0x5e, in TEST_CASE()
42 0x2c, 0xbe, 0x97, 0xf2, 0xd2, 0x03, 0xb0, 0x20 }; in TEST_CASE()
43 uint8_t v[32] = { 0xfd, 0xc5, 0x7f, 0xf4, 0x49, 0xdd, 0x4f, 0x6b, in TEST_CASE()
44 0xfb, 0x7c, 0x9d, 0xf1, 0xc2, 0x9a, 0xcb, 0x59, in TEST_CASE()
45 0x2a, 0xe7, 0xd4, 0xee, 0xfb, 0xfc, 0x0a, 0x90, in TEST_CASE()
46 0x9a, 0xbb, 0xf6, 0x32, 0x3d, 0x8b, 0x18, 0x55 }; in TEST_CASE()
47 uint8_t x[16] = { 0xab, 0xae, 0x2b, 0x71, 0xec, 0xb2, 0xff, 0xff, in TEST_CASE()
48 0x3e, 0x73, 0x77, 0xd1, 0x54, 0x84, 0xcb, 0xd5 }; in TEST_CASE()
[all …]
/nrf52832-nimble/rt-thread/components/drivers/include/drivers/
H A Dpin.h29 #define PIN_LOW 0x00
30 #define PIN_HIGH 0x01
32 #define PIN_MODE_OUTPUT 0x00
33 #define PIN_MODE_INPUT 0x01
34 #define PIN_MODE_INPUT_PULLUP 0x02
35 #define PIN_MODE_INPUT_PULLDOWN 0x03
36 #define PIN_MODE_OUTPUT_OD 0x04
38 #define PIN_IRQ_MODE_RISING 0x00
39 #define PIN_IRQ_MODE_FALLING 0x01
40 #define PIN_IRQ_MODE_RISING_FALLING 0x02
[all …]
H A Dsdio.h27 #define SDIO_REG_CCCR_CCCR_REV 0x00
29 #define SDIO_CCCR_REV_1_00 0 /* CCCR/FBR Version 1.00 */
34 #define SDIO_SDIO_REV_1_00 0 /* SDIO Spec Version 1.00 */
39 #define SDIO_REG_CCCR_SD_REV 0x01
41 #define SDIO_SD_REV_1_01 0 /* SD Physical Spec Version 1.01 */
45 #define SDIO_REG_CCCR_IO_EN 0x02
46 #define SDIO_REG_CCCR_IO_RDY 0x03
48 #define SDIO_REG_CCCR_INT_EN 0x04 /* Function/Master Interrupt Enable */
49 #define SDIO_REG_CCCR_INT_PEND 0x05 /* Function Interrupt Pending */
51 #define SDIO_REG_CCCR_IO_ABORT 0x06 /* function abort/card reset */
[all …]
H A Dusb_common.h22 #define RT_DEBUG_USB 0x00
23 #define USB_DYNAMIC 0x00
25 #define USB_CLASS_DEVICE 0x00
26 #define USB_CLASS_AUDIO 0x01
27 #define USB_CLASS_CDC 0x02
28 #define USB_CLASS_HID 0x03
29 #define USB_CLASS_PHYSICAL 0x05
30 #define USB_CLASS_IMAGE 0x06
31 #define USB_CLASS_PRINTER 0x07
32 #define USB_CLASS_MASS_STORAGE 0x08
[all …]
H A Dserial.h38 #define STOP_BITS_1 0
46 #define PARITY_NONE 0
51 #define BIT_ORDER_LSB 0
54 #define NRZ_NORMAL 0 /* Non Return to Zero : normal mode */
61 #define RT_SERIAL_EVENT_RX_IND 0x01 /* Rx indication */
62 #define RT_SERIAL_EVENT_TX_DONE 0x02 /* Tx complete */
63 #define RT_SERIAL_EVENT_RX_DMADONE 0x03 /* Rx DMA transfer done */
64 #define RT_SERIAL_EVENT_TX_DMADONE 0x04 /* Tx DMA transfer done */
65 #define RT_SERIAL_EVENT_RX_TIMEOUT 0x05 /* Rx timeout */
67 #define RT_SERIAL_DMA_RX 0x01
[all …]
H A Dhwtimer.h22 HWTIMER_CTRL_FREQ_SET = 0x01, /* set the count frequency */
31 HWTIMER_MODE_ONESHOT = 0x01,
42 #define HWTIMER_CNTMODE_UP 0x01 /* increment count mode */
43 #define HWTIMER_CNTMODE_DW 0x02 /* decreasing count mode */
/nrf52832-nimble/rt-thread/libcpu/arm/realview-a8-vmm/
H A Dpmu.h18 ARM_PMU_EVENT_PMNC_SW_INCR = 0x00,
19 ARM_PMU_EVENT_L1_ICACHE_REFILL = 0x01,
20 ARM_PMU_EVENT_ITLB_REFILL = 0x02,
21 ARM_PMU_EVENT_L1_DCACHE_REFILL = 0x03,
22 ARM_PMU_EVENT_L1_DCACHE_ACCESS = 0x04,
23 ARM_PMU_EVENT_DTLB_REFILL = 0x05,
24 ARM_PMU_EVENT_MEM_READ = 0x06,
25 ARM_PMU_EVENT_MEM_WRITE = 0x07,
26 ARM_PMU_EVENT_INSTR_EXECUTED = 0x08,
27 ARM_PMU_EVENT_EXC_TAKEN = 0x09,
[all …]
/nrf52832-nimble/rt-thread/libcpu/arm/cortex-a/
H A Dpmu.h18 ARM_PMU_EVENT_PMNC_SW_INCR = 0x00,
19 ARM_PMU_EVENT_L1_ICACHE_REFILL = 0x01,
20 ARM_PMU_EVENT_ITLB_REFILL = 0x02,
21 ARM_PMU_EVENT_L1_DCACHE_REFILL = 0x03,
22 ARM_PMU_EVENT_L1_DCACHE_ACCESS = 0x04,
23 ARM_PMU_EVENT_DTLB_REFILL = 0x05,
24 ARM_PMU_EVENT_MEM_READ = 0x06,
25 ARM_PMU_EVENT_MEM_WRITE = 0x07,
26 ARM_PMU_EVENT_INSTR_EXECUTED = 0x08,
27 ARM_PMU_EVENT_EXC_TAKEN = 0x09,
[all …]
/nrf52832-nimble/rt-thread/libcpu/ppc/ppc405/
H A Dserial.c7 #define UART0_BASE 0xef600300
8 #define UART1_BASE 0xef600400
9 #define UCR0_MASK 0x0000007f
10 #define UCR1_MASK 0x00007f00
11 #define UCR0_UDIV_POS 0
15 #define UART_RBR 0x00
16 #define UART_THR 0x00
17 #define UART_IER 0x01
18 #define UART_IIR 0x02
19 #define UART_FCR 0x02
[all …]
/nrf52832-nimble/rt-thread/components/lwp/arch/arm/cortex-m4/
H A Dlwp_rvds.S36 ORR R2, R2, #0x03 ; use PSP, user-thread mode.
44 ORR R1, R1, #0x01
59 TST LR, #0x4
96 BIC R3, R3, #0x01
97 ORR R3, R3, #0x02
100 POP {LR} ; 0xFFFFFFED
101 ORR LR, LR, #0x10
124 ORR R2, R2, #0x03
128 ORR R1, R1, #0x01 ; only Thumb-mode.

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