History log of /XiangShan/src/main/scala/xiangshan/backend/issue/OthersEntry.scala (Results 1 – 25 of 43)
Revision Date Author Comments
# 99ce5576 20-Feb-2025 cz4e <[email protected]>

style(Bundles): rewrite bundles with new style (#4274)


# 9e12e8ed 08-Feb-2025 cz4e <[email protected]>

style(Bundles): move bundles to Bundles.scala (#4247)


# e311c278 15-Oct-2024 sinsanction <[email protected]>

fix(IssueQueue, BusyTable): refactor wakeup and cancel, and remove redundant logic


# c0beb497 09-Aug-2024 xiaofeibao <[email protected]>

IssueQueue: only trans valid but not issued entry for fix ldCancel timing


# 56db494f 24-Jul-2024 xiaofeibao-xjtu <[email protected]>

IssueQueue: remove RegEnable for fix timing (#3275)


# 60f0c5ae 26-Apr-2024 xiaofeibao <[email protected]>

Backend: add FpScheduler


# 4243aa09 08-Mar-2024 sinceforYy <[email protected]>

IssueQueue: add clock gating


# 3e7f92e5 07-Mar-2024 sinceforYy <[email protected]>

Backend: remove useless comment


# 41dbbdfd 04-Mar-2024 sinceforYy <[email protected]>

Backend: add enable signal to RegNext


# e07131b2 01-Mar-2024 sinsanction <[email protected]>

IssueQueue: remove vecStd, refactor iq params, remove unused mem blocked signals


# 99944b79 27-Feb-2024 sinsanction <[email protected]>

IssueQueue, Entries: refactor vector mem Entries


# 28607074 26-Dec-2023 sinsanction <[email protected]>

IssueQueue: add Simple to Complex transfer policy & support all Complex/Simple entry config


# df26db8a 21-Dec-2023 sinsanction <[email protected]>

IssueQueue: support Complex/Simple Entry


# 397c0f33 21-Dec-2023 sinsanction <[email protected]>

EnqEntry, OthersEntry: both use entryUpdate for easier transfer later


# 0dfdb52a 20-Dec-2023 zhanglyGit <[email protected]>

Backend: fix performance bug of ld wakeup


# aa2bcc31 19-Dec-2023 zhanglyGit <[email protected]>

Backend: refactor Entries


# 8321ef33 13-Dec-2023 sinsanction <[email protected]>

Entries: optimize transfer policy


# 2aaa83c0 08-Dec-2023 xiaofeibao-xjtu <[email protected]>

backend: WBArbiter support two out at same time, fast wakeup remove valid


# 543f3ac7 06-Dec-2023 sinsanction <[email protected]>

IssueQueue: use Vec[Bool] to store FuType for less reg & wire usage


# d20f567f 01-Dec-2023 zhanglyGit <[email protected]>

Backend: optimize some implement


# 79b2c95b 30-Nov-2023 zhanglyGit <[email protected]>

Backend: fix lat>0 cancel error


# 1f35da39 29-Nov-2023 xiaofeibao-xjtu <[email protected]>

backend: change vfSchdParams, add PipelineConnect name


# acf41503 29-Nov-2023 sinsanction <[email protected]>

EnqEntry, OthersEntry: reduce srcWakeUpL1ExuOH width


# 7cbafe1a 27-Nov-2023 zhanglyGit <[email protected]>

Backend: fix srcCancel and ExuOHOut timing


# 51de4363 22-Nov-2023 sinsanction <[email protected]>

IssueQueue: reduce entryReg width


12