fix(vset): simplify vl compute in vsetrvfwvf module (#4028)

fix(vlwakeup): fix vl write back wakeup from intExu or vfExu (#3643)

vset: select min value from oldVL and vlmax in vsetrvfwvf

Decode: let CSRR vl executed in Vsetu

vtype: add illegal check when modified reserved bits of vtype (#3170)

rv64v: fix vwsll's imm read and illegal vsew check (#3131)

vset: use flushPipe with blockBack for vsetvl instructions

vl: convert read vl instruction to a move instrcuction

* using vset module to move vl from vl register to int register

vset: fix old vl read for vsetvl and vsetvli instructions (#3058)

Exu: connect V0Wen VlWen

FuConfig: add writeV0Rf writeVlRf

vtype: add valid signal for vsetvl instruction when calculate output

rv64v: fix the logic of writing vtype for vsetvl instruction

Merge branch 'master' into vlsu-tmp-master

rv64v: add ignore oldvd judgement in issue queue
1. when the instruction depend on old vd, we cannot set the srctype to imm
2. when vl = 0, we cannot set the srctype to imm because the vd keep the ol

rv64v: add ignore oldvd judgement in issue queue
1. when the instruction depend on old vd, we cannot set the srctype to imm
2. when vl = 0, we cannot set the srctype to imm because the vd keep the old value
3. when vl = vlmax, we can set srctype to imm when vta is not se

show more ...

rv64v: fix the logic of writing vtype for vsetvl instruction (#2875)

fix merge error

Vset: fix two bugs

1. The decoding information of the vset instruction is wrong.
2. Function "connectNonPipedCtrlSingal" should only be used in non-piped fu not in VSET.

fu: add PipedFuncUnit and refactor piped function units

* all piped function units should extends PipedFuncUnit

fu: split io bundle into ctrl and data parts

backend: refactor vset and add rab support

backend,vector: rewrite vset uop and base module

* Add unit-test for vset base module

add vset support

Co-authored-by: zhanglyGit <[email protected]>
Co-authored-by: Xuan Hu <[email protected]>