| #
f533cba7 |
| 29-Jul-2024 |
HuSipeng <[email protected]> |
PcTargetMem: Fixed a bug that caused the backend to be unable to read the newest target (#3269)
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| #
44b06f8a |
| 12-Jul-2024 |
Xuan Hu <[email protected]> |
Backend,Frontend: pass flag of FtqPtr to TargetMem to avoid read out-of-date predict target (#3184)
* Hold newest predict target everytime it is updated by frontend.
* Don't use out-of-date predict
Backend,Frontend: pass flag of FtqPtr to TargetMem to avoid read out-of-date predict target (#3184)
* Hold newest predict target everytime it is updated by frontend.
* Don't use out-of-date predict value even if FtqIdx match.
show more ...
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| #
da0b4c9f |
| 09-Apr-2024 |
Haojin Tang <[email protected]> |
PcTargetMem: fix wrong update condition of needNewestTarget
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| #
f58472d9 |
| 08-Apr-2024 |
Haojin Tang <[email protected]> |
PcTargetMem: add valid condition for needNewestTarget
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| #
ce95ff3a |
| 11-Mar-2024 |
sinsanction <[email protected]> |
DataPath, PcTargetMem: move target PC reading to datapath og0, and refactor PcTargetMemIO
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| #
5f8b6c9e |
| 07-Mar-2024 |
sinceforYy <[email protected]> |
Backend: add clock gating to valid singal
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| #
9477429f |
| 07-Mar-2024 |
sinceforYy <[email protected]> |
Backend: add ren signal to SyncDataModuleTemplate
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| #
5f80df32 |
| 15-Dec-2023 |
xiaofeibao-xjtu <[email protected]> |
IQ: remove unused pc and ftqptr
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| #
6022c595 |
| 07-Dec-2023 |
sinceforYy <[email protected]> |
PcTargetMem: add enable to RegNext
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| #
3827c997 |
| 01-Nov-2023 |
sinceforYy <[email protected]> |
Backend: add en to RegNext
|
| #
1ca4a39d |
| 15-Oct-2023 |
Xuan Hu <[email protected]> |
backend: add shouldBeInlined = false
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| #
83ba63b3 |
| 11-Oct-2023 |
Xuan Hu <[email protected]> |
fix merge error
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| #
d8a24b06 |
| 20-Sep-2023 |
zhanglyGit <[email protected]> |
Backend: refactor jump targetMem in CtrlBlock
|