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12

/linux-6.14.4/drivers/soc/fsl/qe/
Dqe.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2006-2010 Freescale Semiconductor, Inc. All rights reserved.
11 * QUICC Engine (QE).
30 #include <soc/fsl/qe/immap_qe.h>
31 #include <soc/fsl/qe/qe.h>
50 static phys_addr_t qebase = -1;
54 struct device_node *qe; in qe_get_device_node() local
57 * Newer device trees have an "fsl,qe" compatible property for the QE in qe_get_device_node()
60 qe = of_find_compatible_node(NULL, NULL, "fsl,qe"); in qe_get_device_node()
61 if (qe) in qe_get_device_node()
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Dgpio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include <linux/gpio/legacy-of-mm-gpiochip.h>
23 #include <soc/fsl/qe/qe.h>
40 struct qe_pio_regs __iomem *regs = mm_gc->regs; in qe_gpio_save_regs()
42 qe_gc->cpdata = ioread32be(&regs->cpdata); in qe_gpio_save_regs()
43 qe_gc->saved_regs.cpdata = qe_gc->cpdata; in qe_gpio_save_regs()
44 qe_gc->saved_regs.cpdir1 = ioread32be(&regs->cpdir1); in qe_gpio_save_regs()
45 qe_gc->saved_regs.cpdir2 = ioread32be(&regs->cpdir2); in qe_gpio_save_regs()
46 qe_gc->saved_regs.cppar1 = ioread32be(&regs->cppar1); in qe_gpio_save_regs()
47 qe_gc->saved_regs.cppar2 = ioread32be(&regs->cppar2); in qe_gpio_save_regs()
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Dqmc.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <soc/fsl/qe/qmc.h>
12 #include <linux/dma-mapping.h>
13 #include <linux/firmware.h>
23 #include <soc/fsl/qe/ucc_slow.h>
24 #include <soc/fsl/qe/qe.h>
28 /* SCC general mode register low (32 bits) (GUMR_L in QE) */
36 /* SCC general mode register high (32 bits) (identical to GUMR_H in QE) */
45 /* SCC event register (16 bits) (identical to UCCE in QE) */
55 /* UCC Extended Mode Register (8 bits, QE only) */
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/linux-6.14.4/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
Dfsl,qe.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,qe.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale QUICC Engine module (QE)
10 - Frank Li <[email protected]>
13 This represents qe module that is installed on PowerQUICC II Pro.
20 the "root" qe node, using the common properties from there.
21 The description below applies to the qe of MPC8360 and
27 - const: fsl,qe
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Dfsl,qe-firmware.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,qe-firmware.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale QUICC Engine module Firmware Node
10 - Frank Li <[email protected]>
13 This node defines a firmware binary that is embedded in the device tree, for
14 the purpose of passing the firmware from bootloader to the kernel, or from
17 The firmware node itself contains the firmware binary contents, a compatible
18 property, and any firmware-specific properties. The node should be placed
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Dfsl,qe-ucc-qmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,qe-ucc-qmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PowerQUICC QE QUICC Multichannel Controller (QMC)
10 - Herve Codina <[email protected]>
19 - enum:
20 - fsl,mpc8321-ucc-qmc
21 - const: fsl,qe-ucc-qmc
25 - description: UCC (Unified communication controller) register base
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/linux-6.14.4/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/
Dfirmware.txt1 * Uploaded QE firmware
3 If a new firmware has been uploaded to the QE (usually by the
4 boot loader), then a 'firmware' child node should be added to the QE
5 node. This node provides information on the uploaded firmware that
9 - id: The string name of the firmware. This is taken from the 'id'
10 member of the qe_firmware structure of the uploaded firmware.
12 firmware they want is already present.
13 - extended-modes: The Extended Modes bitfield, taken from the
14 firmware binary. It is a 64-bit number represented
15 as an array of two 32-bit numbers.
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/linux-6.14.4/include/soc/fsl/qe/
Dqe.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
9 * QUICC Engine (QE) external definitions and structure.
21 #include <soc/fsl/qe/immap_qe.h>
28 #define QE_NUM_OF_SNUM 256 /* There are 256 serial number in QE */
87 /* Export QE common operations */
112 return -ENOSYS; in cpm_muram_alloc()
118 return -ENOSYS; in devm_cpm_muram_alloc()
128 return -ENOSYS; in cpm_muram_alloc_fixed()
135 return -ENOSYS; in devm_cpm_muram_alloc_fixed()
145 return -ENOSYS; in cpm_muram_offset()
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/linux-6.14.4/drivers/scsi/bfa/
Dbfa_fcpim.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
4 * Copyright (c) 2014- QLogic Corporation.
8 * Linux driver for QLogic BR-series Fibre Channel Host Bus Adapter.
22 (((_fcpim)->itnim_arr + ((_tag) & ((_fcpim)->num_itnims - 1))))
25 list_add_tail(&(__itnim)->qe, &(__itnim)->fcpim->itnim_q)
27 WARN_ON(!bfa_q_is_on_q(&(__itnim)->fcpim->itnim_q, __itnim)); \
29 list_del(&(__itnim)->qe); \
30 WARN_ON(!list_empty(&(__itnim)->io_q)); \
31 WARN_ON(!list_empty(&(__itnim)->io_cleanup_q)); \
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Dbfa_svc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
4 * Copyright (c) 2014- QLogic Corporation.
8 * Linux driver for QLogic BR-series Fibre Channel Host Bus Adapter.
41 (bfa_ioc_is_disabled(&bfa->ioc) == BFA_TRUE))
47 if ((__rp)->bfa->fcs) \
48 bfa_cb_rport_offline((__rp)->rport_drv); \
50 bfa_cb_queue((__rp)->bfa, &(__rp)->hcb_qe, \
56 if ((__rp)->bfa->fcs) \
57 bfa_cb_rport_online((__rp)->rport_drv); \
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Dbfa_svc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
4 * Copyright (c) 2014- QLogic Corporation.
8 * Linux driver for QLogic BR-series Fibre Channel Host Bus Adapter.
19 * Scatter-gather DMA related defines
27 #define BFA_SGPG_ROUNDUP(_l) (((_l) + (sizeof(struct bfi_sgpg_s) - 1)) \
28 & ~(sizeof(struct bfi_sgpg_s) - 1))
31 struct list_head qe; /* queue sg page element */ member
40 struct list_head qe; /* queue sg page element */ member
64 #define BFA_SGPG_MOD(__bfa) (&(__bfa)->modules.sgpg_mod)
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Dbfa_core.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
4 * Copyright (c) 2014- QLogic Corporation.
8 * Linux driver for QLogic BR-series Fibre Channel Host Bus Adapter.
43 bfa_isr_unhandled, /* --------- */
44 bfa_isr_unhandled, /* --------- */
45 bfa_isr_unhandled, /* --------- */
46 bfa_isr_unhandled, /* --------- */
47 bfa_isr_unhandled, /* --------- */
48 bfa_isr_unhandled, /* --------- */
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Dbfa_ioc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
4 * Copyright (c) 2014- QLogic Corporation.
8 * Linux driver for QLogic BR-series Fibre Channel Host Bus Adapter.
21 (sizeof(struct bfa_trc_mod_s) - \
32 struct list_head qe; member
84 struct list_head qe; /* Queue of DMA elements */ member
94 struct list_head qe; /* Queue of KVA elements */ member
111 dm_ptr->mem_len = seg_sz; in bfa_mem_dma_setup()
113 list_add_tail(&dm_ptr->qe, &meminfo->dma_info.qe); in bfa_mem_dma_setup()
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Dbfa_fcpim.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
4 * Copyright (c) 2014- QLogic Corporation.
8 * Linux driver for QLogic BR-series Fibre Channel Host Bus Adapter.
26 struct list_head qe; /* queue element */ member
40 #define BFA_FCP_MOD(_hal) (&(_hal)->modules.fcp_mod)
41 #define BFA_MEM_FCP_KVA(__bfa) (&(BFA_FCP_MOD(__bfa)->kva_seg))
43 (&(_fcp)->iotag_arr[(_tag & BFA_IOIM_IOTAG_MASK)])
45 ((_fcp)->itn_arr + ((_tag) & ((_fcp)->num_itns - 1)))
64 (__itnim->ioprofile.iocomps[__index]++)
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Dbfa_fcs.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
4 * Copyright (c) 2014- QLogic Corporation.
8 * Linux driver for QLogic BR-series Fibre Channel Host Bus Adapter.
30 struct bfad_s *bfad = fcs->bfad; in bfa_fcs_exit_comp()
32 complete(&bfad->comp); in bfa_fcs_exit_comp()
41 bfa_sm_send_event(&fcs->fabric, BFA_FCS_FABRIC_SM_CREATE); in bfa_fcs_init()
50 * FCS update cfg - reset the pwwn/nwwn of fabric base logical port
51 * with values learned during bfa_init firmware GETATTR REQ.
56 struct bfa_fcs_fabric_s *fabric = &fcs->fabric; in bfa_fcs_update_cfg()
[all …]
/linux-6.14.4/Documentation/arch/powerpc/
Dqe_firmware.rst2 Freescale QUICC Engine Firmware Uploading
10 I - Software License for Firmware
12 II - Microcode Availability
14 III - Description and Terminology
16 IV - Microcode Programming Details
18 V - Firmware Structure Layout
20 VI - Sample Code for Creating Firmware Files
25 November 30, 2007: Rev 1.0 - Initial version
27 I - Software License for Firmware
30 Each firmware file comes with its own software license. For information on
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/linux-6.14.4/drivers/tty/serial/
Ducc_uart.c1 // SPDX-License-Identifier: GPL-2.0
12 * If Soft-UART support is needed but not already present, then this driver
13 * will request and upload the "Soft-UART" microcode upon probe. The
30 #include <linux/dma-mapping.h>
32 #include <soc/fsl/qe/ucc_slow.h>
34 #include <linux/firmware.h>
42 * The GUMR flag for Soft UART. This would normally be defined in qe.h,
43 * but Soft-UART is a hack and we want to keep everything related to it in
46 #define UCC_SLOW_GUMR_H_SUART 0x00004000 /* Soft-UART */
49 * soft_uart is 1 if we need to use Soft-UART mode
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/linux-6.14.4/drivers/net/ethernet/freescale/
Ducc_geth.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) Freescale Semicondutor, Inc. 2006-2009. All rights reserved.
12 * - Rearrange code and style fixes
22 #include <soc/fsl/qe/immap_qe.h>
23 #include <soc/fsl/qe/qe.h>
25 #include <soc/fsl/qe/ucc.h>
26 #include <soc/fsl/qe/ucc_fast.h>
28 #define DRV_DESC "QE UCC Gigabit Ethernet Controller"
41 u8 res0[0x100 - sizeof(struct ucc_fast)];
46 u32 hafdup; /* half-duplex reg. */
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/linux-6.14.4/arch/powerpc/platforms/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
35 bool "ePAPR para-virtualization support"
37 Enables ePAPR para-virtualization support for guests.
46 a hypervisor. This option is not user-selectable but should
50 bool "Support booting from Open Firmware or yaboot"
55 Support from booting from Open Firmware or yaboot using an
56 Open Firmware client interface. This enables the kernel to
57 communicate with open firmware to retrieve system information
63 bool "Device-tree based CPU feature discovery & setup"
69 binding if the firmware provides it. Currently only the skiboot
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/linux-6.14.4/arch/powerpc/boot/dts/fsl/
Dp1025twr.dtsi2 * P1025 TWR Device Tree Source stub (no addresses or top-level ranges)
44 #address-cells = <1>;
45 #size-cells = <1>;
46 compatible = "cfi-flash";
48 bank-width = <2>;
49 device-width = <1>;
53 /* 256KB for Vitesse 7385 Switch firmware */
55 label = "NOR Vitesse-7385 Firmware";
56 read-only;
79 /* 256KB for QE ucode firmware*/
[all …]
Dp1025rdb_36b.dts2 * P1025 RDB Device Tree Source (36-bit address map)
35 /include/ "p1021si-pre.dtsi"
86 qe: qe@fffe80000 { label
87 status = "disabled"; /* no firmware loaded */
93 /include/ "p1021si-post.dtsi"
Dp1021rdb-pc.dtsi2 * P1021 RDB Device Tree Source stub (no addresses or top-level ranges)
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
41 bank-width = <2>;
42 device-width = <1>;
46 /* 256KB for Vitesse 7385 Switch firmware */
48 label = "NOR Vitesse-7385 Firmware";
49 read-only;
72 /* 256KB for QE ucode firmware*/
[all …]
Dp1025rdb_32b.dts2 * P1025 RDB Device Tree Source (32-bit address map)
35 /include/ "p1021si-pre.dtsi"
86 qe: qe@ffe80000 { label
89 brg-frequency = <0>;
90 bus-frequency = <0>;
91 status = "disabled"; /* no firmware loaded */
96 rx-clock-name = "clk12";
97 tx-clock-name = "clk9";
98 pio-handle = <&pio1>;
99 phy-handle = <&qe_phy0>;
[all …]
Dmpc8569mds.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /include/ "mpc8569si-pre.dtsi"
13 #address-cells = <2>;
14 #size-cells = <2>;
15 interrupt-parent = <&mpic>;
40 #address-cells = <1>;
41 #size-cells = <1>;
42 compatible = "cfi-flash";
44 bank-width = <1>;
45 device-width = <1>;
[all …]
/linux-6.14.4/drivers/soc/fsl/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
9 source "drivers/soc/fsl/qe/Kconfig"
16 enabling, power-onreset(POR) configuration monitoring, alternate
44 firmware logs.
51 (Run Control and Power Management), which performs all device-level

12