Searched +full:mt8173 +full:- +full:power +full:- +full:controller (Results 1 – 25 of 47) sorted by relevance
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/linux-6.14.4/arch/arm64/boot/dts/mediatek/ |
D | mt8173.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <dt-bindings/clock/mt8173-clk.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/memory/mt8173-larb-port.h> 11 #include <dt-bindings/phy/phy.h> 12 #include <dt-bindings/power/mt8173-power.h> 13 #include <dt-bindings/reset/mt8173-resets.h> 14 #include <dt-bindings/gce/mt8173-gce.h> 15 #include <dt-bindings/thermal/thermal.h> [all …]
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D | mt6795.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/clock/mediatek,mt6795-clk.h> 12 #include <dt-bindings/gce/mediatek,mt6795-gce.h> 13 #include <dt-bindings/memory/mt6795-larb-port.h> 14 #include <dt-bindings/pinctrl/mt6795-pinfunc.h> 15 #include <dt-bindings/power/mt6795-power.h> 16 #include <dt-bindings/reset/mediatek,mt6795-resets.h> 20 interrupt-parent = <&sysirq>; [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/power/ |
D | mediatek,power-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/power/mediatek,power-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Mediatek Power Domains Controller 10 - MandyJH Liu <[email protected]> 11 - Matthias Brugger <[email protected]> 14 Mediatek processors include support for multiple power domains which can be 15 powered up/down by software based on different application scenes to save power. 17 IP cores belonging to a power domain should contain a 'power-domains' [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/display/mediatek/ |
D | mediatek,wdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <[email protected]> 11 - Philipp Zabel <[email protected]> 24 - enum: 25 - mediatek,mt8173-disp-wdma 26 - items: 27 - const: mediatek,mt6795-disp-wdma 28 - const: mediatek,mt8173-disp-wdma [all …]
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D | mediatek,ufoe.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <[email protected]> 11 - Philipp Zabel <[email protected]> 15 UFOe can cut the data rate for DSI port which may lead to reduce power 25 - enum: 26 - mediatek,mt8173-disp-ufoe 27 - items: 28 - const: mediatek,mt6795-disp-ufoe [all …]
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D | mediatek,ovl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <[email protected]> 11 - Philipp Zabel <[email protected]> 24 - enum: 25 - mediatek,mt2701-disp-ovl 26 - mediatek,mt8173-disp-ovl 27 - mediatek,mt8183-disp-ovl 28 - mediatek,mt8192-disp-ovl [all …]
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D | mediatek,color.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <[email protected]> 11 - Philipp Zabel <[email protected]> 25 - enum: 26 - mediatek,mt2701-disp-color 27 - mediatek,mt8167-disp-color 28 - mediatek,mt8173-disp-color 29 - mediatek,mt8195-mdp3-color [all …]
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D | mediatek,gamma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <[email protected]> 11 - Philipp Zabel <[email protected]> 24 - enum: 25 - mediatek,mt8173-disp-gamma 26 - mediatek,mt8183-disp-gamma 27 - mediatek,mt8195-disp-gamma 28 - items: [all …]
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D | mediatek,rdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <[email protected]> 11 - Philipp Zabel <[email protected]> 15 data into DMA. It provides real time data to the back-end panel 26 - enum: 27 - mediatek,mt2701-disp-rdma 28 - mediatek,mt8173-disp-rdma 29 - mediatek,mt8183-disp-rdma [all …]
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D | mediatek,merge.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <[email protected]> 11 - Philipp Zabel <[email protected]> 14 Mediatek display merge, namely MERGE, is used to merge two slice-per-line 15 inputs into one side-by-side output. 24 - enum: 25 - mediatek,mt8173-disp-merge 26 - mediatek,mt8195-disp-merge [all …]
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D | mediatek,aal.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <[email protected]> 11 - Philipp Zabel <[email protected]> 15 is responsible for backlight power saving and sunlight visibility improving. 24 - enum: 25 - mediatek,mt8173-disp-aal 26 - mediatek,mt8183-disp-aal 27 - mediatek,mt8195-mdp3-aal [all …]
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D | mediatek,split.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <[email protected]> 11 - Philipp Zabel <[email protected]> 24 - enum: 25 - mediatek,mt8173-disp-split 26 - mediatek,mt8195-mdp3-split 27 - items: 28 - const: mediatek,mt6795-disp-split [all …]
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D | mediatek,dpi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek DPI and DP_INTF Controller 10 - CK Hu <[email protected]> 11 - Jitao shi <[email protected]> 15 subsystem and provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a 21 - enum: 22 - mediatek,mt2701-dpi 23 - mediatek,mt7623-dpi [all …]
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D | mediatek,dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek DSI Controller 10 - Chun-Kuang Hu <[email protected]> 11 - Philipp Zabel <[email protected]> 12 - Jitao Shi <[email protected]> 16 drive up to 4-lane MIPI DSI output. Two DSIs can be synchronized for dual- 20 - $ref: /schemas/display/dsi-controller.yaml# 25 - enum: [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/media/ |
D | mediatek-mdp.txt | 5 Required properties (controller node): 6 - compatible: "mediatek,mt8173-mdp" 7 - mediatek,vpu: the node of video processor unit, see 8 Documentation/devicetree/bindings/media/mediatek-vpu.txt for details. 11 - compatible: Should be one of 12 "mediatek,mt8173-mdp-rdma" - read DMA 13 "mediatek,mt8173-mdp-rsz" - resizer 14 "mediatek,mt8173-mdp-wdma" - write DMA 15 "mediatek,mt8173-mdp-wrot" - write DMA with rotation 16 - reg: Physical base address and length of the function block register space [all …]
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D | mediatek,vcodec-decoder.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/mediatek,vcodec-decoder.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Yunfei Dong <[email protected]> 19 - mediatek,mt8173-vcodec-dec 20 - mediatek,mt8183-vcodec-dec 26 reg-names: 28 - const: misc 29 - const: ld [all …]
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D | mediatek,vcodec-encoder.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/mediatek,vcodec-encoder.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Yunfei Dong <[email protected]> 19 - items: 20 - enum: 21 - mediatek,mt8173-vcodec-enc-vp8 22 - mediatek,mt8173-vcodec-enc 23 - mediatek,mt8183-vcodec-enc [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/soc/mediatek/ |
D | mediatek,mutex.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <[email protected]> 11 - Philipp Zabel <[email protected]> 15 Start Of Frame (SOF) / End Of Frame (EOF) to each sub-modules on the display 27 - mediatek,mt2701-disp-mutex 28 - mediatek,mt2712-disp-mutex 29 - mediatek,mt6795-disp-mutex 30 - mediatek,mt8167-disp-mutex [all …]
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D | scpsys.txt | 4 The System Control Processor System (SCPSYS) has several power management 7 The System Power Manager (SPM) inside the SCPSYS is for the MTCMOS power 11 power/power-domain.yaml. It provides the power domains defined in 12 - include/dt-bindings/power/mt8173-power.h 13 - include/dt-bindings/power/mt6797-power.h 14 - include/dt-bindings/power/mt6765-power.h 15 - include/dt-bindings/power/mt2701-power.h 16 - include/dt-bindings/power/mt2712-power.h 17 - include/dt-bindings/power/mt7622-power.h 20 - compatible: Should be one of: [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/usb/ |
D | mediatek,mtk-xhci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Chunfeng Yun <[email protected]> 14 - $ref: usb-xhci.yaml 19 case 2: supports dual-role mode, and the host is based on xHCI driver. 25 - enum: 26 - mediatek,mt2701-xhci 27 - mediatek,mt2712-xhci [all …]
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D | mediatek,mtu3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: MediaTek USB3 DRD Controller 11 - Chunfeng Yun <[email protected]> 14 - $ref: usb-drd.yaml 17 The DRD controller has a glue layer IPPC (IP Port Control), and its host is 23 - enum: 24 - mediatek,mt2712-mtu3 25 - mediatek,mt8173-mtu3 [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/arm/mediatek/ |
D | mediatek,mmsys.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek mmsys controller 10 - Matthias Brugger <[email protected]> 13 The MediaTek mmsys system controller provides clock control, routing control, 18 pattern: "^syscon@[0-9a-f]+$" 22 - items: 23 - enum: 24 - mediatek,mt2701-mmsys [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/pwm/ |
D | mediatek,pwm-disp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pwm/mediatek,pwm-disp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek DISP_PWM Controller 10 - Jitao Shi <[email protected]> 13 - $ref: pwm.yaml# 18 - enum: 19 - mediatek,mt2701-disp-pwm 20 - mediatek,mt6595-disp-pwm [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/phy/ |
D | mediatek,tphy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: MediaTek T-PHY Controller 11 - Chunfeng Yun <[email protected]> 14 The T-PHY controller supports physical layer functionality for a number of 17 Layout differences of banks between T-PHY V1 (mt8173/mt2701) and 18 T-PHY V2 (mt2712) / V3 (mt8195) when works on USB mode: 19 ----------------------------------- 67 pattern: "^t-phy(@[0-9a-f]+)?$" [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/iommu/ |
D | mediatek,iommu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Yong Wu <[email protected]> 16 ARM Short-Descriptor translation table format for address translation. 24 +--------+ 26 gals0-rx gals1-rx (Global Async Local Sync rx) 29 gals0-tx gals1-tx (Global Async Local Sync tx) 31 +--------+ 35 +----------------+------- [all …]
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