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/linux-6.14.4/Documentation/devicetree/bindings/mmc/
Dmtk-sd.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mtk-sd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chaotian Jing <[email protected]>
11 - Wenbin Mei <[email protected]>
16 - enum:
17 - mediatek,mt2701-mmc
18 - mediatek,mt2712-mmc
19 - mediatek,mt6779-mmc
[all …]
/linux-6.14.4/arch/arm64/boot/dts/mediatek/
Dmt6795-sony-xperia-m5.dts1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
14 compatible = "sony,xperia-m5", "mediatek,mt6795";
15 chassis-type = "handset";
26 compatible = "led-backlight";
29 default-brightness-level = <300>;
32 led-controller-display {
33 compatible = "pwm-leds";
35 disp_led_pwm: led-0 {
[all …]
Dmt8173-evb.dts1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
13 chassis-type = "embedded";
14 compatible = "mediatek,mt8173-evb", "mediatek,mt8173";
31 compatible = "hdmi-connector";
37 remote-endpoint = <&hdmi0_out>;
43 compatible = "linux,extcon-usb-gpio";
44 id-gpios = <&pio 16 GPIO_ACTIVE_HIGH>;
47 usb_p1_vbus: regulator-usb-p1 {
[all …]
Dmt8173-elm.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/regulator/dlg,da9211-regulator.h>
9 #include <dt-bindings/gpio/gpio.h>
25 compatible = "pwm-backlight";
27 power-supply = <&bl_fixed_reg>;
28 enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&panel_backlight_en_pins>;
[all …]
Dmt8186-corsola.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
7 #include <dt-bindings/pinctrl/mt8186-pinfunc.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/input/gpio-keys.h>
11 #include <dt-bindings/regulator/mediatek,mt6397-regulator.h>
26 stdout-path = "serial0:115200n8";
35 backlight_lcd0: backlight-lcd0 {
36 compatible = "pwm-backlight";
[all …]
Dmt8195-cherry.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/spmi/spmi.h>
25 backlight_lcd0: backlight-lcd0 {
26 compatible = "pwm-backlight";
27 brightness-levels = <0 1023>;
28 default-brightness-level = <576>;
29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>;
30 num-interpolated-steps = <1023>;
32 power-supply = <&ppvar_sys>;
[all …]
Dmt8183-kukui.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
21 stdout-path = "serial0:115200n8";
25 compatible = "pwm-backlight";
27 power-supply = <&reg_vsys>;
28 enable-gpios = <&pio 176 0>;
29 brightness-levels = <0 1023>;
30 num-interpolated-steps = <1023>;
31 default-brightness-level = <576>;
[all …]
Dmt8192-asurada.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/spmi/spmi.h>
25 stdout-path = "serial0:115200n8";
33 backlight_lcd0: backlight-lcd0 {
34 compatible = "pwm-backlight";
36 power-supply = <&ppvar_sys>;
37 enable-gpios = <&pio 152 0>;
38 brightness-levels = <0 1023>;
[all …]
Dmt8390-genio-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Author: Chris Chen <chris-[email protected]>
9 * Louis-Alexis Eyraud <[email protected]>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/interrupt-controller/irq.h>
17 #include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h>
18 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
19 #include <dt-bindings/spmi/spmi.h>
20 #include <dt-bindings/usb/pd.h>
[all …]
/linux-6.14.4/drivers/mmc/host/
Dsdhci-esdhc-imx.c1 // SPDX-License-Identifier: GPL-2.0
5 * derived from the OF-version.
14 #include <linux/delay.h>
23 #include <linux/mmc/slot-gpio.h>
28 #include "sdhci-cqhci.h"
29 #include "sdhci-pltfm.h"
30 #include "sdhci-esdhc.h"
83 #define ESDHC_TUNE_CTRL_MAX ((1 << 7) - 1)
128 * There is an INT DMA ERR mismatch between eSDHC and STD SDHC SPEC:
130 * but bit28 is used as the INT DMA ERR in fsl eSDHC design.
[all …]
Dmtk-sd.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2015, 2022 MediaTek Inc.
10 #include <linux/delay.h>
11 #include <linux/dma-mapping.h>
33 #include <linux/mmc/slot-gpio.h>
41 /*--------------------------------------------------------------------------*/
43 /*--------------------------------------------------------------------------*/
50 /*--------------------------------------------------------------------------*/
52 /*--------------------------------------------------------------------------*/
90 /*--------------------------------------------------------------------------*/
[all …]
Dsdhci-xenon-phy.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Date: 2016-8-24
12 #include <linux/delay.h>
17 #include "sdhci-pltfm.h"
18 #include "sdhci-xenon.h"
203 static int xenon_alloc_emmc_phy(struct sdhci_host *host) in xenon_alloc_emmc_phy()
209 params = devm_kzalloc(mmc_dev(host->mmc), sizeof(*params), GFP_KERNEL); in xenon_alloc_emmc_phy()
211 return -ENOMEM; in xenon_alloc_emmc_phy()
213 priv->phy_params = params; in xenon_alloc_emmc_phy()
214 if (priv->phy_type == EMMC_5_0_PHY) in xenon_alloc_emmc_phy()
[all …]
Ddw_mmc-exynos.c1 // SPDX-License-Identifier: GPL-2.0-or-later
18 #include "dw_mmc-pltfm.h"
19 #include "dw_mmc-exynos.h"
21 /* Variations in Exynos specific dw-mshc controller */
52 .compatible = "samsung,exynos4210-dw-mshc",
55 .compatible = "samsung,exynos4412-dw-mshc",
58 .compatible = "samsung,exynos5250-dw-mshc",
61 .compatible = "samsung,exynos5420-dw-mshc",
64 .compatible = "samsung,exynos5420-dw-mshc-smu",
67 .compatible = "samsung,exynos7-dw-mshc",
[all …]
Dsdhci-of-dwcmshc.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/arm-smccc.h>
14 #include <linux/dma-mapping.h>
24 #include "sdhci-pltfm.h"
41 /* Tuning and auto-tuning fields in AT_CTRL_R control register */
51 #define AT_CTRL_PRE_CHANGE_DLY 0x1 /* 2-cycle latency */
53 #define AT_CTRL_POST_CHANGE_DLY 0x3 /* 4-cycle latency */
151 #define PHY_PAD_TXSLEW_CTRL_P 0x3 /* Slew control for P-Type pad TX */
153 #define PHY_PAD_TXSLEW_CTRL_N 0x3 /* Slew control for N-Type pad TX */
154 #define PHY_PAD_TXSLEW_CTRL_N_SG2042 0x2 /* Slew control for N-Type pad TX for SG2042 */
[all …]
Dsunxi-mmc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * (C) Copyright 2007-2011 Reuuimlla Technology Co., Ltd.
5 * (C) Copyright 2007-2011 Aaron Maoye <[email protected]>
6 * (C) Copyright 2013-2014 O2S GmbH <www.o2s.ch>
7 * (C) Copyright 2013-2014 David Lanzendörfer <[email protected]>
8 * (C) Copyright 2013-2014 Hans de Goede <[email protected]>
13 #include <linux/clk/sunxi-ng.h>
14 #include <linux/delay.h>
16 #include <linux/dma-mapping.h>
27 #include <linux/mmc/slot-gpio.h>
[all …]
Dsdhci-msm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/mmc/host/sdhci-msm.c - Qualcomm SDHCI Platform driver
5 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
9 #include <linux/delay.h>
23 #include "sdhci-cqhci.h"
24 #include "sdhci-pltfm.h"
123 #define INVALID_TUNING_PHASE -1
140 /* Max load for eMMC Vdd-io supply */
146 /* Max load for SD Vdd-io supply */
150 msm_host->var_ops->msm_readl_relaxed(host, offset)
[all …]
Drenesas_sdhi_core.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-19 Renesas Electronics Corporation
6 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
7 * Copyright (C) 2016-17 Horms Solutions, Simon Horman
13 * Copyright 2004-2005 Phil Blundell
14 * Copyright 2007-2008 OpenedHand Ltd.
22 #include <linux/delay.h>
27 #include <linux/mmc/slot-gpio.h>
30 #include <linux/pinctrl/pinctrl-state.h>
61 static void renesas_sdhi_sdbuf_width(struct tmio_mmc_host *host, int width) in renesas_sdhi_sdbuf_width()
[all …]
Dsdhci-xenon.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Date: 2016-8-24
15 #include <linux/delay.h>
22 #include <linux/dma-mapping.h>
24 #include "sdhci-pltfm.h"
25 #include "sdhci-xenon.h"
27 static int xenon_enable_internal_clk(struct sdhci_host *host) in xenon_enable_internal_clk()
44 dev_err(mmc_dev(host->mmc), "Internal clock never stabilised.\n"); in xenon_enable_internal_clk()
45 return -ETIMEDOUT; in xenon_enable_internal_clk()
53 /* Set SDCLK-off-while-idle */
[all …]
Dsdhci-of-esdhc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include <linux/delay.h>
22 #include <linux/dma-mapping.h>
26 #include "sdhci-pltfm.h"
27 #include "sdhci-esdhc.h"
35 const unsigned int sd_dflt_max_clk;
36 const unsigned int max_clk[MMC_TIMING_NUM];
71 { .compatible = "fsl,ls1021a-esdhc", .data = &ls1021a_esdhc_clk},
72 { .compatible = "fsl,ls1043a-esdhc", .data = &ls1043a_esdhc_clk},
73 { .compatible = "fsl,ls1046a-esdhc", .data = &ls1046a_esdhc_clk},
[all …]
Dsdhci.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/drivers/mmc/host/sdhci.h - Secure Digital Host Controller Interface driver
7 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
130 * VDD2 - UHS2 or PCIe/NVMe
208 #define SDHCI_INT_ALL_MASK ((unsigned int)-1)
233 #define SDHCI_CTRL_HS400 0x0005 /* Non-standard */
286 #define SDHCI_CAN_VDD2_180 0x10000000 /* UHS-2 1.8V VDD2 */
287 #define SDHCI_SUPPORT_HS400 0x80000000 /* Non-standard */
298 /* 4C-4F reserved for more max current */
306 /* 55-57 reserved */
[all …]
Dsdhci-tegra.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/delay.h>
9 #include <linux/dma-mapping.h>
20 #include <linux/mmc/slot-gpio.h>
32 #include "sdhci-cqhci.h"
33 #include "sdhci-pltfm.h"
188 static u16 tegra_sdhci_readw(struct sdhci_host *host, int reg) in tegra_sdhci_readw()
192 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_readw()
194 if (unlikely((soc_data->nvquirks & NVQUIRK_FORCE_SDHCI_SPEC_200) && in tegra_sdhci_readw()
200 return readw(host->ioaddr + reg); in tegra_sdhci_readw()
[all …]
/linux-6.14.4/include/linux/mmc/
Dhost.h1 /* SPDX-License-Identifier: GPL-2.0-only */
12 #include <linux/fault-inject.h>
18 #include <linux/dma-direction.h>
19 #include <linux/blk-crypto-profile.h>
23 unsigned int clock; /* clock rate */
25 unsigned int power_delay_ms; /* waiting for stable power */
171 int err);
175 int (*request_atomic)(struct mmc_host *host,
187 * ios->clock might be 0. For some controllers, setting 0Hz
197 * 1 for a read-only card
[all …]
/linux-6.14.4/arch/arm64/boot/dts/rockchip/
Drk3399-rock960.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/interrupt-controller/irq.h>
18 sdio_pwrseq: sdio-pwrseq {
19 compatible = "mmc-pwrseq-simple";
21 clock-names = "ext_clock";
22 pinctrl-names = "default";
23 pinctrl-0 = <&wifi_enable_h>;
24 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
27 vcc12v_dcin: regulator-vcc12v-dcin {
28 compatible = "regulator-fixed";
[all …]
Drk3399-rock-pi-4.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pwm/pwm.h>
19 stdout-path = "serial2:1500000n8";
22 clkin_gmac: external-gmac-clock {
23 compatible = "fixed-clock";
24 clock-frequency = <125000000>;
25 clock-output-names = "clkin_gmac";
26 #clock-cells = <0>;
[all …]
Drk3399-rock-4c-plus.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/leds/common.h>
10 #include "rk3399-t.dtsi"
14 compatible = "radxa,rock-4c-plus", "rockchip,rk3399";
23 stdout-path = "serial2:1500000n8";
26 clkin_gmac: external-gmac-clock {
27 compatible = "fixed-clock";
28 clock-frequency = <125000000>;
29 clock-output-names = "clkin_gmac";
[all …]

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