1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright (C) 2023 MediaTek Inc.
4 * Author: Chris Chen <[email protected]>
5 *         Pablo Sun <[email protected]>
6 *         Macpaul Lin <[email protected]>
7 *
8 * Copyright (C) 2025 Collabora Ltd.
9 *                    Louis-Alexis Eyraud <[email protected]>
10 *                    AngeloGioacchino Del Regno <[email protected]>
11 */
12
13#include "mt6359.dtsi"
14#include <dt-bindings/gpio/gpio.h>
15#include <dt-bindings/input/input.h>
16#include <dt-bindings/interrupt-controller/irq.h>
17#include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h>
18#include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
19#include <dt-bindings/spmi/spmi.h>
20#include <dt-bindings/usb/pd.h>
21
22/ {
23	aliases {
24		ethernet0 = &eth;
25		i2c0 = &i2c0;
26		i2c1 = &i2c1;
27		i2c2 = &i2c2;
28		i2c3 = &i2c3;
29		i2c4 = &i2c4;
30		i2c5 = &i2c5;
31		i2c6 = &i2c6;
32		mmc0 = &mmc0;
33		mmc1 = &mmc1;
34		serial0 = &uart0;
35	};
36
37	chosen {
38		stdout-path = "serial0:921600n8";
39	};
40
41	firmware {
42		optee {
43			compatible = "linaro,optee-tz";
44			method = "smc";
45		};
46	};
47	reserved-memory {
48		#address-cells = <2>;
49		#size-cells = <2>;
50		ranges;
51
52		/*
53		 * 12 MiB reserved for OP-TEE (BL32)
54		 * +-----------------------+ 0x43e0_0000
55		 * |      SHMEM 2MiB       |
56		 * +-----------------------+ 0x43c0_0000
57		 * |        | TA_RAM  8MiB |
58		 * + TZDRAM +--------------+ 0x4340_0000
59		 * |        | TEE_RAM 2MiB |
60		 * +-----------------------+ 0x4320_0000
61		 */
62		optee_reserved: optee@43200000 {
63			no-map;
64			reg = <0 0x43200000 0 0x00c00000>;
65		};
66
67		scp_mem: memory@50000000 {
68			compatible = "shared-dma-pool";
69			reg = <0 0x50000000 0 0x2900000>;
70			no-map;
71		};
72
73		/* 2 MiB reserved for ARM Trusted Firmware (BL31) */
74		bl31_secmon_reserved: memory@54600000 {
75			no-map;
76			reg = <0 0x54600000 0x0 0x200000>;
77		};
78
79		apu_mem: memory@55000000 {
80			compatible = "shared-dma-pool";
81			reg = <0 0x55000000 0 0x1400000>; /* 20 MB */
82		};
83
84		vpu_mem: memory@57000000 {
85			compatible = "shared-dma-pool";
86			reg = <0 0x57000000 0 0x1400000>; /* 20 MB */
87		};
88
89		adsp_mem: memory@60000000 {
90			compatible = "shared-dma-pool";
91			reg = <0 0x60000000 0 0xf00000>;
92			no-map;
93		};
94
95		afe_dma_mem: memory@60f00000 {
96			compatible = "shared-dma-pool";
97			reg = <0 0x60f00000 0 0x100000>;
98			no-map;
99		};
100
101		adsp_dma_mem: memory@61000000 {
102			compatible = "shared-dma-pool";
103			reg = <0 0x61000000 0 0x100000>;
104			no-map;
105		};
106	};
107
108	common_fixed_5v: regulator-0 {
109		compatible = "regulator-fixed";
110		regulator-name = "vdd_5v";
111		regulator-min-microvolt = <5000000>;
112		regulator-max-microvolt = <5000000>;
113		gpio = <&pio 10 GPIO_ACTIVE_HIGH>;
114		enable-active-high;
115		regulator-always-on;
116		vin-supply = <&reg_vsys>;
117	};
118
119	edp_panel_fixed_3v3: regulator-1 {
120		compatible = "regulator-fixed";
121		regulator-name = "vedp_3v3";
122		regulator-min-microvolt = <3300000>;
123		regulator-max-microvolt = <3300000>;
124		enable-active-high;
125		gpio = <&pio 15 GPIO_ACTIVE_HIGH>;
126		pinctrl-names = "default";
127		pinctrl-0 = <&edp_panel_3v3_en_pins>;
128		vin-supply = <&reg_vsys>;
129	};
130
131	gpio_fixed_3v3: regulator-2 {
132		compatible = "regulator-fixed";
133		regulator-name = "ext_3v3";
134		regulator-min-microvolt = <3300000>;
135		regulator-max-microvolt = <3300000>;
136		gpio = <&pio 9 GPIO_ACTIVE_HIGH>;
137		enable-active-high;
138		regulator-always-on;
139		vin-supply = <&reg_vsys>;
140	};
141
142	/* system wide 4.2V power rail from charger */
143	reg_vsys: regulator-vsys {
144		compatible = "regulator-fixed";
145		regulator-name = "vsys";
146		regulator-always-on;
147		regulator-boot-on;
148	};
149
150	/* used by mmc2 */
151	sdio_fixed_1v8: regulator-3 {
152		compatible = "regulator-fixed";
153		regulator-name = "vio18_conn";
154		regulator-min-microvolt = <1800000>;
155		regulator-max-microvolt = <1800000>;
156		enable-active-high;
157		regulator-always-on;
158	};
159
160	/* used by mmc2 */
161	sdio_fixed_3v3: regulator-4 {
162		compatible = "regulator-fixed";
163		regulator-name = "wifi_3v3";
164		regulator-min-microvolt = <3300000>;
165		regulator-max-microvolt = <3300000>;
166		gpio = <&pio 74 GPIO_ACTIVE_HIGH>;
167		enable-active-high;
168		regulator-always-on;
169		vin-supply = <&reg_vsys>;
170	};
171
172	touch0_fixed_3v3: regulator-5 {
173		compatible = "regulator-fixed";
174		regulator-name = "vio33_tp1";
175		regulator-min-microvolt = <3300000>;
176		regulator-max-microvolt = <3300000>;
177		gpio = <&pio 119 GPIO_ACTIVE_HIGH>;
178		enable-active-high;
179		vin-supply = <&reg_vsys>;
180	};
181
182	usb_hub_fixed_3v3: regulator-6 {
183		compatible = "regulator-fixed";
184		regulator-name = "vhub_3v3";
185		regulator-min-microvolt = <3300000>;
186		regulator-max-microvolt = <3300000>;
187		gpio = <&pio 112 GPIO_ACTIVE_HIGH>; /* HUB_3V3_EN */
188		startup-delay-us = <10000>;
189		enable-active-high;
190		vin-supply = <&reg_vsys>;
191	};
192
193	usb_p0_vbus: regulator-7 {
194		compatible = "regulator-fixed";
195		regulator-name = "vbus_p0";
196		regulator-min-microvolt = <5000000>;
197		regulator-max-microvolt = <5000000>;
198		gpio = <&pio 84 GPIO_ACTIVE_HIGH>;
199		enable-active-high;
200		vin-supply = <&reg_vsys>;
201	};
202
203	usb_p1_vbus: regulator-8 {
204		compatible = "regulator-fixed";
205		regulator-name = "vbus_p1";
206		regulator-min-microvolt = <5000000>;
207		regulator-max-microvolt = <5000000>;
208		gpio = <&pio 87 GPIO_ACTIVE_HIGH>;
209		enable-active-high;
210		vin-supply = <&reg_vsys>;
211	};
212
213	/* used by ssusb2 */
214	usb_p2_vbus: regulator-9 {
215		compatible = "regulator-fixed";
216		regulator-name = "vbus_p2";
217		regulator-min-microvolt = <5000000>;
218		regulator-max-microvolt = <5000000>;
219		enable-active-high;
220	};
221};
222
223&adsp {
224	memory-region = <&adsp_dma_mem>, <&adsp_mem>;
225	status = "okay";
226};
227
228&afe {
229	memory-region = <&afe_dma_mem>;
230	status = "okay";
231};
232
233&gpu {
234	mali-supply = <&mt6359_vproc2_buck_reg>;
235	status = "okay";
236};
237
238&i2c0 {
239	pinctrl-names = "default";
240	pinctrl-0 = <&i2c0_pins>;
241	clock-frequency = <400000>;
242	status = "okay";
243
244	touchscreen@5d {
245		compatible = "goodix,gt9271";
246		reg = <0x5d>;
247		interrupt-parent = <&pio>;
248		interrupts-extended = <&pio 6 IRQ_TYPE_EDGE_RISING>;
249		irq-gpios = <&pio 6 GPIO_ACTIVE_HIGH>;
250		reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
251		AVDD28-supply = <&touch0_fixed_3v3>;
252		VDDIO-supply = <&mt6359_vio18_ldo_reg>;
253		pinctrl-names = "default";
254		pinctrl-0 = <&touch_pins>;
255	};
256};
257
258&i2c1 {
259	pinctrl-names = "default";
260	pinctrl-0 = <&i2c1_pins>;
261	clock-frequency = <400000>;
262	status = "okay";
263};
264
265&i2c2 {
266	pinctrl-names = "default";
267	pinctrl-0 = <&i2c2_pins>;
268	clock-frequency = <400000>;
269	status = "okay";
270};
271
272&i2c3 {
273	pinctrl-names = "default";
274	pinctrl-0 = <&i2c3_pins>;
275	clock-frequency = <400000>;
276	status = "okay";
277};
278
279&i2c4 {
280	pinctrl-names = "default";
281	pinctrl-0 = <&i2c4_pins>;
282	clock-frequency = <1000000>;
283	status = "okay";
284};
285
286&i2c5 {
287	pinctrl-names = "default";
288	pinctrl-0 = <&i2c5_pins>;
289	clock-frequency = <400000>;
290	status = "okay";
291};
292
293&i2c6 {
294	pinctrl-names = "default";
295	pinctrl-0 = <&i2c6_pins>;
296	clock-frequency = <400000>;
297	status = "okay";
298};
299
300&mfg0 {
301	domain-supply = <&mt6359_vproc2_buck_reg>;
302};
303
304&mfg1 {
305	domain-supply = <&mt6359_vsram_others_ldo_reg>;
306};
307
308&mmc0 {
309	status = "okay";
310	pinctrl-names = "default", "state_uhs";
311	pinctrl-0 = <&mmc0_default_pins>;
312	pinctrl-1 = <&mmc0_uhs_pins>;
313	bus-width = <8>;
314	max-frequency = <200000000>;
315	cap-mmc-highspeed;
316	mmc-hs200-1_8v;
317	mmc-hs400-1_8v;
318	supports-cqe;
319	cap-mmc-hw-reset;
320	no-sdio;
321	no-sd;
322	hs400-ds-delay = <0x1481b>;
323	vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
324	vqmmc-supply = <&mt6359_vufs_ldo_reg>;
325	non-removable;
326};
327
328&mmc1 {
329	status = "okay";
330	pinctrl-names = "default", "state_uhs";
331	pinctrl-0 = <&mmc1_default_pins>;
332	pinctrl-1 = <&mmc1_uhs_pins>;
333	bus-width = <4>;
334	max-frequency = <200000000>;
335	cap-sd-highspeed;
336	sd-uhs-sdr50;
337	sd-uhs-sdr104;
338	no-mmc;
339	no-sdio;
340	cd-gpios = <&pio 2 GPIO_ACTIVE_LOW>;
341	vmmc-supply = <&mt6359_vpa_buck_reg>;
342	vqmmc-supply = <&mt6359_vsim1_ldo_reg>;
343};
344
345&mt6359_vbbck_ldo_reg {
346	regulator-always-on;
347};
348
349&mt6359_vcn18_ldo_reg {
350	regulator-name = "vcn18_pmu";
351	regulator-always-on;
352};
353
354&mt6359_vcn33_2_bt_ldo_reg {
355	regulator-name = "vcn33_2_pmu";
356	regulator-always-on;
357};
358
359&mt6359_vcore_buck_reg {
360	regulator-name = "dvdd_proc_l";
361	regulator-always-on;
362};
363
364&mt6359_vgpu11_buck_reg {
365	regulator-name = "dvdd_core";
366	regulator-always-on;
367};
368
369&mt6359_vpa_buck_reg {
370	regulator-name = "vpa_pmu";
371	regulator-max-microvolt = <3100000>;
372};
373
374&mt6359_vproc2_buck_reg {
375	/* The name "vgpu" is required by mtk-regulator-coupler */
376	regulator-name = "vgpu";
377	regulator-min-microvolt = <550000>;
378	regulator-max-microvolt = <800000>;
379	regulator-coupled-with = <&mt6359_vsram_others_ldo_reg>;
380	regulator-coupled-max-spread = <6250>;
381};
382
383&mt6359_vpu_buck_reg {
384	regulator-name = "dvdd_adsp";
385	regulator-always-on;
386};
387
388&mt6359_vrf12_ldo_reg {
389	regulator-name = "va12_abb2_pmu";
390	regulator-always-on;
391};
392
393&mt6359_vsim1_ldo_reg {
394	regulator-name = "vsim1_pmu";
395	regulator-enable-ramp-delay = <480>;
396};
397
398&mt6359_vsram_others_ldo_reg {
399	/* The name "vsram_gpu" is required by mtk-regulator-coupler */
400	regulator-name = "vsram_gpu";
401	regulator-min-microvolt = <750000>;
402	regulator-max-microvolt = <800000>;
403	regulator-coupled-with = <&mt6359_vproc2_buck_reg>;
404	regulator-coupled-max-spread = <6250>;
405};
406
407&mt6359_vufs_ldo_reg {
408	regulator-name = "vufs18_pmu";
409	regulator-always-on;
410};
411
412&mt6359codec {
413	mediatek,mic-type-0 = <1>; /* ACC */
414	mediatek,mic-type-1 = <3>; /* DCC */
415};
416
417&pcie {
418	pinctrl-names = "default";
419	pinctrl-0 = <&pcie_pins_default>;
420	status = "okay";
421};
422
423&pciephy {
424	status = "okay";
425};
426
427&pio {
428	audio_default_pins: audio-default-pins {
429		pins-cmd-dat {
430			pinmux = <PINMUX_GPIO101__FUNC_O_AUD_CLK_MOSI>,
431				 <PINMUX_GPIO102__FUNC_O_AUD_SYNC_MOSI>,
432				 <PINMUX_GPIO103__FUNC_O_AUD_DAT_MOSI0>,
433				 <PINMUX_GPIO104__FUNC_O_AUD_DAT_MOSI1>,
434				 <PINMUX_GPIO105__FUNC_I0_AUD_DAT_MISO0>,
435				 <PINMUX_GPIO106__FUNC_I0_AUD_DAT_MISO1>,
436				 <PINMUX_GPIO107__FUNC_B0_I2SIN_MCK>,
437				 <PINMUX_GPIO108__FUNC_B0_I2SIN_BCK>,
438				 <PINMUX_GPIO109__FUNC_B0_I2SIN_WS>,
439				 <PINMUX_GPIO110__FUNC_I0_I2SIN_D0>,
440				 <PINMUX_GPIO114__FUNC_O_I2SO2_MCK>,
441				 <PINMUX_GPIO115__FUNC_B0_I2SO2_BCK>,
442				 <PINMUX_GPIO116__FUNC_B0_I2SO2_WS>,
443				 <PINMUX_GPIO117__FUNC_O_I2SO2_D0>,
444				 <PINMUX_GPIO118__FUNC_O_I2SO2_D1>,
445				 <PINMUX_GPIO121__FUNC_B0_PCM_CLK>,
446				 <PINMUX_GPIO122__FUNC_B0_PCM_SYNC>,
447				 <PINMUX_GPIO124__FUNC_I0_PCM_DI>,
448				 <PINMUX_GPIO125__FUNC_O_DMIC1_CLK>,
449				 <PINMUX_GPIO126__FUNC_I0_DMIC1_DAT>,
450				 <PINMUX_GPIO128__FUNC_O_DMIC2_CLK>,
451				 <PINMUX_GPIO129__FUNC_I0_DMIC2_DAT>;
452		};
453	};
454
455	dptx_pins: dptx-pins {
456		pins-cmd-dat {
457			pinmux = <PINMUX_GPIO46__FUNC_I0_DP_TX_HPD>;
458			bias-pull-up;
459		};
460	};
461
462	edp_panel_3v3_en_pins: edp-panel-3v3-en-pins {
463		pins1 {
464			pinmux = <PINMUX_GPIO15__FUNC_B_GPIO15>;
465			output-high;
466		};
467	};
468
469	eth_default_pins: eth-default-pins {
470		pins-cc {
471			pinmux = <PINMUX_GPIO139__FUNC_B0_GBE_TXC>,
472				 <PINMUX_GPIO140__FUNC_I0_GBE_RXC>,
473				 <PINMUX_GPIO141__FUNC_I0_GBE_RXDV>,
474				 <PINMUX_GPIO142__FUNC_O_GBE_TXEN>;
475			drive-strength = <8>;
476		};
477
478		pins-mdio {
479			pinmux = <PINMUX_GPIO143__FUNC_O_GBE_MDC>,
480				 <PINMUX_GPIO144__FUNC_B1_GBE_MDIO>;
481			drive-strength = <8>;
482			input-enable;
483		};
484
485		pins-power {
486			pinmux = <PINMUX_GPIO145__FUNC_B_GPIO145>,
487				 <PINMUX_GPIO146__FUNC_B_GPIO146>;
488			output-high;
489		};
490
491		pins-rxd {
492			pinmux = <PINMUX_GPIO135__FUNC_I0_GBE_RXD3>,
493				 <PINMUX_GPIO136__FUNC_I0_GBE_RXD2>,
494				 <PINMUX_GPIO137__FUNC_I0_GBE_RXD1>,
495				 <PINMUX_GPIO138__FUNC_I0_GBE_RXD0>;
496			drive-strength = <8>;
497		};
498
499		pins-txd {
500			pinmux = <PINMUX_GPIO131__FUNC_O_GBE_TXD3>,
501				 <PINMUX_GPIO132__FUNC_O_GBE_TXD2>,
502				 <PINMUX_GPIO133__FUNC_O_GBE_TXD1>,
503				 <PINMUX_GPIO134__FUNC_O_GBE_TXD0>;
504			drive-strength = <8>;
505		};
506	};
507
508	eth_sleep_pins: eth-sleep-pins {
509		pins-cc {
510			pinmux = <PINMUX_GPIO139__FUNC_B_GPIO139>,
511				 <PINMUX_GPIO140__FUNC_B_GPIO140>,
512				 <PINMUX_GPIO141__FUNC_B_GPIO141>,
513				 <PINMUX_GPIO142__FUNC_B_GPIO142>;
514		};
515
516		pins-mdio {
517			pinmux = <PINMUX_GPIO143__FUNC_B_GPIO143>,
518				 <PINMUX_GPIO144__FUNC_B_GPIO144>;
519			input-disable;
520			bias-disable;
521		};
522
523		pins-rxd {
524			pinmux = <PINMUX_GPIO135__FUNC_B_GPIO135>,
525				 <PINMUX_GPIO136__FUNC_B_GPIO136>,
526				 <PINMUX_GPIO137__FUNC_B_GPIO137>,
527				 <PINMUX_GPIO138__FUNC_B_GPIO138>;
528		};
529
530		pins-txd {
531			pinmux = <PINMUX_GPIO131__FUNC_B_GPIO131>,
532				 <PINMUX_GPIO132__FUNC_B_GPIO132>,
533				 <PINMUX_GPIO133__FUNC_B_GPIO133>,
534				 <PINMUX_GPIO134__FUNC_B_GPIO134>;
535		};
536	};
537
538	i2c0_pins: i2c0-pins {
539		pins {
540			pinmux = <PINMUX_GPIO56__FUNC_B1_SDA0>,
541				 <PINMUX_GPIO55__FUNC_B1_SCL0>;
542			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
543			drive-strength-microamp = <1000>;
544		};
545	};
546
547	i2c1_pins: i2c1-pins {
548		pins {
549			pinmux = <PINMUX_GPIO58__FUNC_B1_SDA1>,
550				 <PINMUX_GPIO57__FUNC_B1_SCL1>;
551			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
552			drive-strength-microamp = <1000>;
553		};
554	};
555
556	i2c2_pins: i2c2-pins {
557		pins {
558			pinmux = <PINMUX_GPIO60__FUNC_B1_SDA2>,
559				 <PINMUX_GPIO59__FUNC_B1_SCL2>;
560			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
561			drive-strength-microamp = <1000>;
562		};
563	};
564
565	i2c3_pins: i2c3-pins {
566		pins {
567			pinmux = <PINMUX_GPIO62__FUNC_B1_SDA3>,
568				 <PINMUX_GPIO61__FUNC_B1_SCL3>;
569			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
570			drive-strength-microamp = <1000>;
571		};
572	};
573
574	i2c4_pins: i2c4-pins {
575		pins {
576			pinmux = <PINMUX_GPIO64__FUNC_B1_SDA4>,
577				 <PINMUX_GPIO63__FUNC_B1_SCL4>;
578			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
579			drive-strength-microamp = <1000>;
580		};
581	};
582
583	i2c5_pins: i2c5-pins {
584		pins {
585			pinmux = <PINMUX_GPIO66__FUNC_B1_SDA5>,
586				 <PINMUX_GPIO65__FUNC_B1_SCL5>;
587			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
588			drive-strength-microamp = <1000>;
589		};
590	};
591
592	i2c6_pins: i2c6-pins {
593		pins {
594			pinmux = <PINMUX_GPIO68__FUNC_B1_SDA6>,
595				 <PINMUX_GPIO67__FUNC_B1_SCL6>;
596			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
597			drive-strength-microamp = <1000>;
598		};
599	};
600
601	gpio_key_pins: gpio-key-pins {
602		pins {
603			pinmux = <PINMUX_GPIO42__FUNC_B1_KPCOL0>,
604				 <PINMUX_GPIO43__FUNC_B1_KPCOL1>,
605				 <PINMUX_GPIO44__FUNC_B1_KPROW0>;
606		};
607	};
608
609	mmc0_default_pins: mmc0-default-pins {
610		pins-clk {
611			pinmux = <PINMUX_GPIO157__FUNC_B1_MSDC0_CLK>;
612			drive-strength = <6>;
613			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
614		};
615
616		pins-cmd-dat {
617			pinmux = <PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0>,
618				 <PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1>,
619				 <PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2>,
620				 <PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3>,
621				 <PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4>,
622				 <PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5>,
623				 <PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6>,
624				 <PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7>,
625				 <PINMUX_GPIO156__FUNC_B1_MSDC0_CMD>;
626			input-enable;
627			drive-strength = <6>;
628			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
629		};
630
631		pins-rst {
632			pinmux = <PINMUX_GPIO155__FUNC_O_MSDC0_RSTB>;
633			drive-strength = <6>;
634			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
635		};
636	};
637
638	mmc0_uhs_pins: mmc0-uhs-pins {
639		pins-clk {
640			pinmux = <PINMUX_GPIO157__FUNC_B1_MSDC0_CLK>;
641			drive-strength = <8>;
642			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
643		};
644
645		pins-cmd-dat {
646			pinmux = <PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0>,
647				 <PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1>,
648				 <PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2>,
649				 <PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3>,
650				 <PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4>,
651				 <PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5>,
652				 <PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6>,
653				 <PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7>,
654				 <PINMUX_GPIO156__FUNC_B1_MSDC0_CMD>;
655			input-enable;
656			drive-strength = <8>;
657			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
658		};
659
660		pins-ds {
661			pinmux = <PINMUX_GPIO162__FUNC_B0_MSDC0_DSL>;
662			drive-strength = <8>;
663			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
664		};
665
666		pins-rst {
667			pinmux = <PINMUX_GPIO155__FUNC_O_MSDC0_RSTB>;
668			drive-strength = <8>;
669			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
670		};
671	};
672
673	mmc1_default_pins: mmc1-default-pins {
674		pins-clk {
675			pinmux = <PINMUX_GPIO164__FUNC_B1_MSDC1_CLK>;
676			drive-strength = <6>;
677			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
678		};
679
680		pins-cmd-dat {
681			pinmux = <PINMUX_GPIO163__FUNC_B1_MSDC1_CMD>,
682				 <PINMUX_GPIO165__FUNC_B1_MSDC1_DAT0>,
683				 <PINMUX_GPIO166__FUNC_B1_MSDC1_DAT1>,
684				 <PINMUX_GPIO167__FUNC_B1_MSDC1_DAT2>,
685				 <PINMUX_GPIO168__FUNC_B1_MSDC1_DAT3>;
686			input-enable;
687			drive-strength = <6>;
688			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
689		};
690
691		pins-insert {
692			pinmux = <PINMUX_GPIO2__FUNC_B_GPIO2>;
693			bias-pull-up;
694		};
695	};
696
697	mmc1_uhs_pins: mmc1-uhs-pins {
698		pins-clk {
699			pinmux = <PINMUX_GPIO164__FUNC_B1_MSDC1_CLK>;
700			drive-strength = <6>;
701			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
702		};
703
704		pins-cmd-dat {
705			pinmux = <PINMUX_GPIO163__FUNC_B1_MSDC1_CMD>,
706				 <PINMUX_GPIO165__FUNC_B1_MSDC1_DAT0>,
707				 <PINMUX_GPIO166__FUNC_B1_MSDC1_DAT1>,
708				 <PINMUX_GPIO167__FUNC_B1_MSDC1_DAT2>,
709				 <PINMUX_GPIO168__FUNC_B1_MSDC1_DAT3>;
710			input-enable;
711			drive-strength = <6>;
712			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
713		};
714	};
715
716	mmc2_default_pins: mmc2-default-pins {
717		pins-clk {
718			pinmux = <PINMUX_GPIO170__FUNC_B1_MSDC2_CLK>;
719			drive-strength = <4>;
720			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
721		};
722
723		pins-cmd-dat {
724			pinmux = <PINMUX_GPIO169__FUNC_B1_MSDC2_CMD>,
725				 <PINMUX_GPIO171__FUNC_B1_MSDC2_DAT0>,
726				 <PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1>,
727				 <PINMUX_GPIO173__FUNC_B1_MSDC2_DAT2>,
728				 <PINMUX_GPIO174__FUNC_B1_MSDC2_DAT3>;
729			input-enable;
730			drive-strength = <6>;
731			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
732		};
733
734		pins-pcm {
735			pinmux = <PINMUX_GPIO123__FUNC_O_PCM_DO>;
736		};
737	};
738
739	mmc2_uhs_pins: mmc2-uhs-pins {
740		pins-clk {
741			pinmux = <PINMUX_GPIO170__FUNC_B1_MSDC2_CLK>;
742			drive-strength = <4>;
743			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
744		};
745
746		pins-cmd-dat {
747			pinmux = <PINMUX_GPIO169__FUNC_B1_MSDC2_CMD>,
748				 <PINMUX_GPIO171__FUNC_B1_MSDC2_DAT0>,
749				 <PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1>,
750				 <PINMUX_GPIO173__FUNC_B1_MSDC2_DAT2>,
751				 <PINMUX_GPIO174__FUNC_B1_MSDC2_DAT3>;
752			input-enable;
753			drive-strength = <6>;
754			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
755		};
756	};
757
758	mmc2_eint_pins: mmc2-eint-pins {
759		pins-dat1 {
760			pinmux = <PINMUX_GPIO172__FUNC_B_GPIO172>;
761			input-enable;
762			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
763		};
764	};
765
766	mmc2_dat1_pins: mmc2-dat1-pins {
767		pins-dat1 {
768			pinmux = <PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1>;
769			input-enable;
770			drive-strength = <6>;
771			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
772		};
773	};
774
775	panel_default_pins: panel-default-pins {
776		pins-dcdc {
777			pinmux = <PINMUX_GPIO45__FUNC_B_GPIO45>;
778			output-low;
779		};
780
781		pins-en {
782			pinmux = <PINMUX_GPIO111__FUNC_B_GPIO111>;
783			output-low;
784		};
785
786		pins-rst {
787			pinmux = <PINMUX_GPIO25__FUNC_B_GPIO25>;
788			output-high;
789		};
790	};
791
792	pcie_pins_default: pcie-default {
793		mux {
794			pinmux = <PINMUX_GPIO47__FUNC_I1_WAKEN>,
795				 <PINMUX_GPIO48__FUNC_O_PERSTN>,
796				 <PINMUX_GPIO49__FUNC_B1_CLKREQN>;
797			bias-pull-up;
798		};
799	};
800
801	rt1715_int_pins: rt1715-int-pins {
802		pins_cmd0_dat {
803			pinmux = <PINMUX_GPIO12__FUNC_B_GPIO12>;
804			bias-pull-up;
805			input-enable;
806		};
807	};
808
809	spi0_pins: spi0-pins {
810		pins-spi {
811			pinmux = <PINMUX_GPIO69__FUNC_O_SPIM0_CSB>,
812				<PINMUX_GPIO70__FUNC_O_SPIM0_CLK>,
813				<PINMUX_GPIO71__FUNC_B0_SPIM0_MOSI>,
814				<PINMUX_GPIO72__FUNC_B0_SPIM0_MISO>;
815			bias-disable;
816		};
817	};
818
819	spi1_pins: spi1-pins {
820		pins-spi {
821			pinmux = <PINMUX_GPIO75__FUNC_O_SPIM1_CSB>,
822				<PINMUX_GPIO76__FUNC_O_SPIM1_CLK>,
823				<PINMUX_GPIO77__FUNC_B0_SPIM1_MOSI>,
824				<PINMUX_GPIO78__FUNC_B0_SPIM1_MISO>;
825			bias-disable;
826		};
827	};
828
829	spi2_pins: spi2-pins {
830		pins-spi {
831			pinmux = <PINMUX_GPIO79__FUNC_O_SPIM2_CSB>,
832				<PINMUX_GPIO80__FUNC_O_SPIM2_CLK>,
833				<PINMUX_GPIO81__FUNC_B0_SPIM2_MOSI>,
834				<PINMUX_GPIO82__FUNC_B0_SPIM2_MISO>;
835			bias-disable;
836		};
837	};
838
839	touch_pins: touch-pins {
840		pins-irq {
841			pinmux = <PINMUX_GPIO6__FUNC_B_GPIO6>;
842			input-enable;
843			bias-disable;
844		};
845
846		pins-reset {
847			pinmux = <PINMUX_GPIO5__FUNC_B_GPIO5>;
848			output-high;
849		};
850	};
851
852	uart0_pins: uart0-pins {
853		pins {
854			pinmux = <PINMUX_GPIO31__FUNC_O_UTXD0>,
855				 <PINMUX_GPIO32__FUNC_I1_URXD0>;
856			bias-pull-up;
857		};
858	};
859
860	uart1_pins: uart1-pins {
861		pins {
862			pinmux = <PINMUX_GPIO33__FUNC_O_UTXD1>,
863				 <PINMUX_GPIO34__FUNC_I1_URXD1>;
864			bias-pull-up;
865		};
866	};
867
868	uart2_pins: uart2-pins {
869		pins {
870			pinmux = <PINMUX_GPIO35__FUNC_O_UTXD2>,
871				 <PINMUX_GPIO36__FUNC_I1_URXD2>;
872			bias-pull-up;
873		};
874	};
875
876	usb_default_pins: usb-default-pins {
877		pins-iddig {
878			pinmux = <PINMUX_GPIO83__FUNC_B_GPIO83>;
879			input-enable;
880			bias-pull-up;
881		};
882
883		pins-valid {
884			pinmux = <PINMUX_GPIO85__FUNC_I0_VBUSVALID>;
885			input-enable;
886		};
887
888		pins-vbus {
889			pinmux = <PINMUX_GPIO84__FUNC_O_USB_DRVVBUS>;
890			output-high;
891		};
892
893	};
894
895	usb1_default_pins: usb1-default-pins {
896		pins-valid {
897			pinmux = <PINMUX_GPIO88__FUNC_I0_VBUSVALID_1P>;
898			input-enable;
899		};
900
901		pins-usb-hub-3v3-en {
902			pinmux = <PINMUX_GPIO112__FUNC_B_GPIO112>;
903			output-high;
904		};
905	};
906
907	wifi_pwrseq_pins: wifi-pwrseq-pins {
908		pins-wifi-enable {
909			pinmux = <PINMUX_GPIO127__FUNC_B_GPIO127>;
910			output-low;
911		};
912	};
913};
914
915&eth {
916	phy-mode ="rgmii-id";
917	phy-handle = <&ethernet_phy0>;
918	pinctrl-names = "default", "sleep";
919	pinctrl-0 = <&eth_default_pins>;
920	pinctrl-1 = <&eth_sleep_pins>;
921	mediatek,mac-wol;
922	snps,reset-gpio = <&pio 147 GPIO_ACTIVE_HIGH>;
923	snps,reset-delays-us = <0 10000 10000>;
924	status = "okay";
925};
926
927&eth_mdio {
928	ethernet_phy0: ethernet-phy@1 {
929		compatible = "ethernet-phy-id001c.c916";
930		reg = <0x1>;
931	};
932};
933
934&pmic {
935	interrupt-parent = <&pio>;
936	interrupts = <222 IRQ_TYPE_LEVEL_HIGH>;
937
938	mt6359keys: keys {
939		compatible = "mediatek,mt6359-keys";
940		mediatek,long-press-mode = <1>;
941		power-off-time-sec = <0>;
942
943		power-key {
944			linux,keycodes = <KEY_POWER>;
945			wakeup-source;
946		};
947	};
948};
949
950&scp {
951	memory-region = <&scp_mem>;
952	status = "okay";
953};
954
955&sound {
956	compatible = "mediatek,mt8390-mt6359-evk", "mediatek,mt8188-mt6359-evb";
957	model = "mt8390-evk";
958	pinctrl-names = "default";
959	pinctrl-0 = <&audio_default_pins>;
960	audio-routing =
961		"Headphone", "Headphone L",
962		"Headphone", "Headphone R";
963	mediatek,adsp = <&adsp>;
964	status = "okay";
965
966	dai-link-0 {
967		link-name = "DL_SRC_BE";
968
969		codec {
970			sound-dai = <&pmic 0>;
971		};
972	};
973};
974
975&spi2 {
976	pinctrl-0 = <&spi2_pins>;
977	pinctrl-names = "default";
978	mediatek,pad-select = <0>;
979	#address-cells = <1>;
980	#size-cells = <0>;
981	status = "okay";
982};
983
984&uart0 {
985	pinctrl-0 = <&uart0_pins>;
986	pinctrl-names = "default";
987	status = "okay";
988};
989
990&uart1 {
991	pinctrl-0 = <&uart1_pins>;
992	pinctrl-names = "default";
993	status = "okay";
994};
995
996&uart2 {
997	pinctrl-0 = <&uart2_pins>;
998	pinctrl-names = "default";
999	status = "okay";
1000};
1001
1002&u3phy0 {
1003	status = "okay";
1004};
1005
1006&u3phy1 {
1007	status = "okay";
1008};
1009
1010&u3phy2 {
1011	status = "okay";
1012};
1013
1014&xhci0 {
1015	status = "okay";
1016	vusb33-supply = <&mt6359_vusb_ldo_reg>;
1017};
1018
1019&xhci1 {
1020	status = "okay";
1021	vusb33-supply = <&mt6359_vusb_ldo_reg>;
1022	#address-cells = <1>;
1023	#size-cells = <0>;
1024
1025	hub_2_0: hub@1 {
1026		compatible = "usb451,8025";
1027		reg = <1>;
1028		peer-hub = <&hub_3_0>;
1029		reset-gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
1030		vdd-supply = <&usb_hub_fixed_3v3>;
1031	};
1032
1033	hub_3_0: hub@2 {
1034		compatible = "usb451,8027";
1035		reg = <2>;
1036		peer-hub = <&hub_2_0>;
1037		reset-gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
1038		vdd-supply = <&usb_hub_fixed_3v3>;
1039	};
1040};
1041
1042&xhci2 {
1043	status = "okay";
1044	vusb33-supply = <&mt6359_vusb_ldo_reg>;
1045	vbus-supply = <&sdio_fixed_3v3>; /* wifi_3v3 */
1046};
1047