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/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dipq8074.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-ipq8074.h>
10 #address-cells = <2>;
11 #size-cells = <2>;
13 model = "Qualcomm Technologies, Inc. IPQ8074";
14 compatible = "qcom,ipq8074";
15 interrupt-parent = <&intc>;
19 compatible = "fixed-clock";
20 clock-frequency = <32768>;
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Dipq6018.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,gcc-ipq6018.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq6018.h>
11 #include <dt-bindings/clock/qcom,apss-ipq.h>
12 #include <dt-bindings/thermal/thermal.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&intc>;
20 sleep_clk: sleep-clk {
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Dipq9574.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
6 * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
9 #include <dt-bindings/clock/qcom,apss-ipq.h>
10 #include <dt-bindings/clock/qcom,ipq-cmn-pll.h>
11 #include <dt-bindings/clock/qcom,ipq9574-gcc.h>
12 #include <dt-bindings/interconnect/qcom,ipq9574.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/reset/qcom,ipq9574-gcc.h>
15 #include <dt-bindings/thermal/thermal.h>
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/linux-6.14.4/Documentation/devicetree/bindings/clock/
Dqcom,gcc-ipq8074.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8074.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller on IPQ8074
10 - Stephen Boyd <[email protected]>
11 - Taniya Das <[email protected]>
15 domains on IPQ8074.
17 See also:: include/dt-bindings/clock/qcom,gcc-ipq8074.h
20 - $ref: qcom,gcc.yaml#
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/linux-6.14.4/Documentation/devicetree/bindings/phy/
Dqcom,ipq8074-qmp-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,ipq8074-qmp-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QMP PHY controller (PCIe, IPQ8074)
10 - Vinod Koul <[email protected]>
19 - enum:
20 - qcom,ipq6018-qmp-pcie-phy
21 - qcom,ipq8074-qmp-gen3-pcie-phy
22 - qcom,ipq8074-qmp-pcie-phy
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Dqcom,sc8280xp-qmp-usb3-uni-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <[email protected]>
19 - qcom,ipq5424-qmp-usb3-phy
20 - qcom,ipq6018-qmp-usb3-phy
21 - qcom,ipq8074-qmp-usb3-phy
22 - qcom,ipq9574-qmp-usb3-phy
23 - qcom,msm8996-qmp-usb3-phy
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Dqcom,qusb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Wesley Cheng <[email protected]>
19 - items:
20 - enum:
21 - qcom,ipq5424-qusb2-phy
22 - qcom,ipq6018-qusb2-phy
23 - qcom,ipq8074-qusb2-phy
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/linux-6.14.4/Documentation/devicetree/bindings/pci/
Dqcom,pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <[email protected]>
11 - Manivannan Sadhasivam <[email protected]>
20 - enum:
21 - qcom,pcie-apq8064
22 - qcom,pcie-apq8084
23 - qcom,pcie-ipq4019
24 - qcom,pcie-ipq6018
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/linux-6.14.4/Documentation/devicetree/bindings/crypto/
Dqcom-qce.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/crypto/qcom-qce.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <[email protected]>
11 - Konrad Dybcio <[email protected]>
20 - const: qcom,crypto-v5.1
24 - const: qcom,crypto-v5.4
28 - items:
29 - enum:
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/linux-6.14.4/Documentation/devicetree/bindings/mtd/
Dqcom,nandc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <[email protected]>
15 - qcom,ipq806x-nand
16 - qcom,ipq4019-nand
17 - qcom,ipq6018-nand
18 - qcom,ipq8074-nand
19 - qcom,sdx55-nand
26 - description: Core Clock
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/linux-6.14.4/Documentation/devicetree/bindings/usb/
Dqcom,dwc3.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wesley Cheng <[email protected]>
15 - enum:
16 - qcom,ipq4019-dwc3
17 - qcom,ipq5018-dwc3
18 - qcom,ipq5332-dwc3
19 - qcom,ipq5424-dwc3
20 - qcom,ipq6018-dwc3
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/linux-6.14.4/Documentation/devicetree/bindings/nvmem/
Dqcom,qfprom.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <[email protected]>
13 - $ref: nvmem.yaml#
14 - $ref: nvmem-deprecated-cells.yaml#
19 - enum:
20 - qcom,apq8064-qfprom
21 - qcom,apq8084-qfprom
22 - qcom,ipq5332-qfprom
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/linux-6.14.4/Documentation/devicetree/bindings/mailbox/
Dqcom,apcs-kpss-global.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/qcom,apcs-kpss-global.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Jassi Brar <[email protected]>
19 - items:
20 - enum:
21 - qcom,ipq5018-apcs-apps-global
22 - qcom,ipq5332-apcs-apps-global
23 - qcom,ipq5424-apcs-apps-global
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/linux-6.14.4/Documentation/devicetree/bindings/firmware/
Dqcom,scm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Bjorn Andersson <[email protected]>
17 - Robert Marko <[email protected]>
18 - Guru Das Srinagesh <[email protected]>
23 - enum:
24 - qcom,scm-apq8064
25 - qcom,scm-apq8084
26 - qcom,scm-ipq4019
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/linux-6.14.4/drivers/clk/qcom/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o
4 clk-qcom-y += common.o
5 clk-qcom-y += clk-regmap.o
6 clk-qcom-y += clk-alpha-pll.o
7 clk-qcom-y += clk-pll.o
8 clk-qcom-y += clk-rcg.o
9 clk-qcom-y += clk-rcg2.o
10 clk-qcom-y += clk-branch.o
11 clk-qcom-y += clk-regmap-divider.o
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
206 CMN PLL consumes the AHB/SYS clocks from GCC and supplies
207 the output clocks to the networking hardware and GCC blocks.
268 tristate "IPQ8074 Global Clock Controller"
271 Support for global clock controller on ipq8074 devices.
274 of ipq8074.
1287 Say Y if you want to toggle LPASS-adjacent resets within
1386 tristate "High-Frequency PLL (HFPLL) Clock Controller"
1388 Support for the high-frequency PLLs present on Qualcomm devices.
1395 Support for the Krait ACC and GCC clock controllers. Say Y
Dgcc-ipq8074.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/qcom,gcc-ipq8074.h>
17 #include "clk-regmap.h"
18 #include "clk-pll.h"
19 #include "clk-rcg.h"
20 #include "clk-branch.h"
21 #include "clk-alpha-pll.h"
22 #include "clk-regmap-divider.h"
23 #include "clk-regmap-mux.h"
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/linux-6.14.4/Documentation/devicetree/bindings/mmc/
Dsdhci-msm.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SDHCI controller (sdhci-msm)
10 - Bjorn Andersson <[email protected]>
11 - Konrad Dybcio <[email protected]>
20 - enum:
21 - qcom,sdhci-msm-v4
23 - items:
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/linux-6.14.4/drivers/mailbox/
Dqcom-apcs-ipc-mailbox.c1 // SPDX-License-Identifier: GPL-2.0-only
33 .offset = 8, .clk_name = "qcom,apss-ipq6018-clk"
37 .offset = 8, .clk_name = "qcom-apcs-msm8916-clk"
45 .offset = 16, .clk_name = "qcom-apcs-msm8996-clk"
53 .offset = 0x1008, .clk_name = "qcom-sdx55-acps-clk"
66 struct qcom_apcs_ipc *apcs = container_of(chan->mbox, in qcom_apcs_ipc_send_data()
68 unsigned long idx = (unsigned long)chan->con_priv; in qcom_apcs_ipc_send_data()
70 return regmap_write(apcs->regmap, apcs->offset, BIT(idx)); in qcom_apcs_ipc_send_data()
86 apcs = devm_kzalloc(&pdev->dev, sizeof(*apcs), GFP_KERNEL); in qcom_apcs_ipc_probe()
88 return -ENOMEM; in qcom_apcs_ipc_probe()
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/linux-6.14.4/drivers/remoteproc/
Dqcom_q6v5_wcss.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2016-2018 Linaro Ltd.
5 * Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
162 val = readl(wcss->reg_base + Q6SS_RESET_REG); in q6v5_wcss_reset()
164 writel(val, wcss->reg_base + Q6SS_RESET_REG); in q6v5_wcss_reset()
167 val = readl(wcss->reg_base + Q6SS_XO_CBCR); in q6v5_wcss_reset()
169 writel(val, wcss->reg_base + Q6SS_XO_CBCR); in q6v5_wcss_reset()
172 ret = readl_poll_timeout(wcss->reg_base + Q6SS_XO_CBCR, in q6v5_wcss_reset()
176 dev_err(wcss->dev, in q6v5_wcss_reset()
181 val = readl(wcss->reg_base + Q6SS_PWR_CTL_REG); in q6v5_wcss_reset()
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/linux-6.14.4/drivers/phy/qualcomm/
Dphy-qcom-qmp-usb.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
22 #include "phy-qcom-qmp-common.h"
24 #include "phy-qcom-qmp.h"
25 #include "phy-qcom-qmp-pcs-misc-v3.h"
26 #include "phy-qcom-qmp-pcs-misc-v4.h"
27 #include "phy-qcom-qmp-pcs-usb-v4.h"
28 #include "phy-qcom-qmp-pcs-usb-v5.h"
29 #include "phy-qcom-qmp-pcs-usb-v6.h"
30 #include "phy-qcom-qmp-pcs-usb-v7.h"
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Dphy-qcom-qmp-pcie.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
25 #include <dt-bindings/phy/phy-qcom-qmp.h>
27 #include "phy-qcom-qmp-common.h"
29 #include "phy-qcom-qmp.h"
30 #include "phy-qcom-qmp-pcs-misc-v3.h"
31 #include "phy-qcom-qmp-pcs-pcie-v4.h"
32 #include "phy-qcom-qmp-pcs-pcie-v4_20.h"
33 #include "phy-qcom-qmp-pcs-pcie-v5.h"
34 #include "phy-qcom-qmp-pcs-pcie-v5_20.h"
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/linux-6.14.4/drivers/thermal/qcom/
Dtsens.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/nvmem-consumer.h>
26 * struct tsens_irq_data - IRQ status and temperature violations
81 if (priv->num_sensors > MAX_SENSORS) in tsens_read_calibration()
82 return -EINVAL; in tsens_read_calibration()
88 ret = nvmem_cell_read_variable_le_u32(priv->dev, name, &mode); in tsens_read_calibration()
89 if (ret == -ENOENT) in tsens_read_calibration()
90 dev_warn(priv->dev, "Please migrate to separate nvmem cells for calibration data\n"); in tsens_read_calibration()
94 dev_dbg(priv->dev, "calibration mode is %d\n", mode); in tsens_read_calibration()
100 ret = nvmem_cell_read_variable_le_u32(priv->dev, name, &base1); in tsens_read_calibration()
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