1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pci/qcom,pcie.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm PCI express root complex 8 9maintainers: 10 - Bjorn Andersson <[email protected]> 11 - Manivannan Sadhasivam <[email protected]> 12 13description: | 14 Qualcomm PCIe root complex controller is based on the Synopsys DesignWare 15 PCIe IP. 16 17properties: 18 compatible: 19 oneOf: 20 - enum: 21 - qcom,pcie-apq8064 22 - qcom,pcie-apq8084 23 - qcom,pcie-ipq4019 24 - qcom,pcie-ipq6018 25 - qcom,pcie-ipq8064 26 - qcom,pcie-ipq8064-v2 27 - qcom,pcie-ipq8074 28 - qcom,pcie-ipq8074-gen3 29 - qcom,pcie-ipq9574 30 - qcom,pcie-msm8996 31 - qcom,pcie-qcs404 32 - qcom,pcie-sdm845 33 - qcom,pcie-sdx55 34 - items: 35 - enum: 36 - qcom,pcie-ipq5424 37 - const: qcom,pcie-ipq9574 38 - items: 39 - const: qcom,pcie-msm8998 40 - const: qcom,pcie-msm8996 41 42 reg: 43 minItems: 4 44 maxItems: 6 45 46 reg-names: 47 minItems: 4 48 maxItems: 6 49 50 interrupts: 51 minItems: 1 52 maxItems: 8 53 54 interrupt-names: 55 minItems: 1 56 maxItems: 8 57 58 iommu-map: 59 minItems: 1 60 maxItems: 16 61 62 # Common definitions for clocks, clock-names and reset. 63 # Platform constraints are described later. 64 clocks: 65 minItems: 3 66 maxItems: 13 67 68 clock-names: 69 minItems: 3 70 maxItems: 13 71 72 dma-coherent: true 73 74 interconnects: 75 maxItems: 2 76 77 interconnect-names: 78 items: 79 - const: pcie-mem 80 - const: cpu-pcie 81 82 resets: 83 minItems: 1 84 maxItems: 12 85 86 reset-names: 87 minItems: 1 88 maxItems: 12 89 90 vdda-supply: 91 description: A phandle to the core analog power supply 92 93 vdda_phy-supply: 94 description: A phandle to the core analog power supply for PHY 95 96 vdda_refclk-supply: 97 description: A phandle to the core analog power supply for IC which generates reference clock 98 99 vddpe-3v3-supply: 100 description: A phandle to the PCIe endpoint power supply 101 102 phys: 103 maxItems: 1 104 105 phy-names: 106 items: 107 - const: pciephy 108 109 power-domains: 110 maxItems: 1 111 112 perst-gpios: 113 description: GPIO controlled connection to PERST# signal 114 maxItems: 1 115 116 required-opps: 117 maxItems: 1 118 119 wake-gpios: 120 description: GPIO controlled connection to WAKE# signal 121 maxItems: 1 122 123required: 124 - compatible 125 - reg 126 - reg-names 127 - interrupt-map-mask 128 - interrupt-map 129 - clocks 130 - clock-names 131 132anyOf: 133 - required: 134 - interrupts 135 - interrupt-names 136 - "#interrupt-cells" 137 - required: 138 - msi-map 139 140allOf: 141 - $ref: /schemas/pci/pci-host-bridge.yaml# 142 - if: 143 properties: 144 compatible: 145 contains: 146 enum: 147 - qcom,pcie-apq8064 148 - qcom,pcie-ipq4019 149 - qcom,pcie-ipq8064 150 - qcom,pcie-ipq8064v2 151 - qcom,pcie-ipq8074 152 - qcom,pcie-qcs404 153 then: 154 properties: 155 reg: 156 minItems: 4 157 maxItems: 4 158 reg-names: 159 items: 160 - const: dbi # DesignWare PCIe registers 161 - const: elbi # External local bus interface registers 162 - const: parf # Qualcomm specific registers 163 - const: config # PCIe configuration space 164 165 - if: 166 properties: 167 compatible: 168 contains: 169 enum: 170 - qcom,pcie-ipq6018 171 - qcom,pcie-ipq8074-gen3 172 - qcom,pcie-ipq9574 173 then: 174 properties: 175 reg: 176 minItems: 5 177 maxItems: 5 178 reg-names: 179 items: 180 - const: dbi # DesignWare PCIe registers 181 - const: elbi # External local bus interface registers 182 - const: atu # ATU address space 183 - const: parf # Qualcomm specific registers 184 - const: config # PCIe configuration space 185 186 - if: 187 properties: 188 compatible: 189 contains: 190 enum: 191 - qcom,pcie-apq8084 192 - qcom,pcie-msm8996 193 - qcom,pcie-sdm845 194 then: 195 properties: 196 reg: 197 minItems: 4 198 maxItems: 5 199 reg-names: 200 minItems: 4 201 items: 202 - const: parf # Qualcomm specific registers 203 - const: dbi # DesignWare PCIe registers 204 - const: elbi # External local bus interface registers 205 - const: config # PCIe configuration space 206 - const: mhi # MHI registers 207 208 - if: 209 properties: 210 compatible: 211 contains: 212 enum: 213 - qcom,pcie-sdx55 214 then: 215 properties: 216 reg: 217 minItems: 5 218 maxItems: 6 219 reg-names: 220 minItems: 5 221 items: 222 - const: parf # Qualcomm specific registers 223 - const: dbi # DesignWare PCIe registers 224 - const: elbi # External local bus interface registers 225 - const: atu # ATU address space 226 - const: config # PCIe configuration space 227 - const: mhi # MHI registers 228 229 - if: 230 properties: 231 compatible: 232 contains: 233 enum: 234 - qcom,pcie-apq8064 235 - qcom,pcie-ipq8064 236 - qcom,pcie-ipq8064v2 237 then: 238 properties: 239 clocks: 240 minItems: 3 241 maxItems: 5 242 clock-names: 243 minItems: 3 244 items: 245 - const: core # Clocks the pcie hw block 246 - const: iface # Configuration AHB clock 247 - const: phy # Clocks the pcie PHY block 248 - const: aux # Clocks the pcie AUX block, not on apq8064 249 - const: ref # Clocks the pcie ref block, not on apq8064 250 resets: 251 minItems: 5 252 maxItems: 6 253 reset-names: 254 minItems: 5 255 items: 256 - const: axi # AXI reset 257 - const: ahb # AHB reset 258 - const: por # POR reset 259 - const: pci # PCI reset 260 - const: phy # PHY reset 261 - const: ext # EXT reset, not on apq8064 262 required: 263 - vdda-supply 264 - vdda_phy-supply 265 - vdda_refclk-supply 266 267 - if: 268 properties: 269 compatible: 270 contains: 271 enum: 272 - qcom,pcie-apq8084 273 then: 274 properties: 275 clocks: 276 minItems: 4 277 maxItems: 4 278 clock-names: 279 items: 280 - const: iface # Configuration AHB clock 281 - const: master_bus # Master AXI clock 282 - const: slave_bus # Slave AXI clock 283 - const: aux # Auxiliary (AUX) clock 284 resets: 285 maxItems: 1 286 reset-names: 287 items: 288 - const: core # Core reset 289 290 - if: 291 properties: 292 compatible: 293 contains: 294 enum: 295 - qcom,pcie-ipq4019 296 then: 297 properties: 298 clocks: 299 minItems: 3 300 maxItems: 3 301 clock-names: 302 items: 303 - const: aux # Auxiliary (AUX) clock 304 - const: master_bus # Master AXI clock 305 - const: slave_bus # Slave AXI clock 306 resets: 307 minItems: 12 308 maxItems: 12 309 reset-names: 310 items: 311 - const: axi_m # AXI master reset 312 - const: axi_s # AXI slave reset 313 - const: pipe # PIPE reset 314 - const: axi_m_vmid # VMID reset 315 - const: axi_s_xpu # XPU reset 316 - const: parf # PARF reset 317 - const: phy # PHY reset 318 - const: axi_m_sticky # AXI sticky reset 319 - const: pipe_sticky # PIPE sticky reset 320 - const: pwr # PWR reset 321 - const: ahb # AHB reset 322 - const: phy_ahb # PHY AHB reset 323 324 - if: 325 properties: 326 compatible: 327 contains: 328 enum: 329 - qcom,pcie-msm8996 330 then: 331 properties: 332 clocks: 333 minItems: 5 334 maxItems: 5 335 clock-names: 336 items: 337 - const: pipe # Pipe Clock driving internal logic 338 - const: aux # Auxiliary (AUX) clock 339 - const: cfg # Configuration clock 340 - const: bus_master # Master AXI clock 341 - const: bus_slave # Slave AXI clock 342 resets: false 343 reset-names: false 344 345 - if: 346 properties: 347 compatible: 348 contains: 349 enum: 350 - qcom,pcie-ipq8074 351 then: 352 properties: 353 clocks: 354 minItems: 5 355 maxItems: 5 356 clock-names: 357 items: 358 - const: iface # PCIe to SysNOC BIU clock 359 - const: axi_m # AXI Master clock 360 - const: axi_s # AXI Slave clock 361 - const: ahb # AHB clock 362 - const: aux # Auxiliary clock 363 resets: 364 minItems: 7 365 maxItems: 7 366 reset-names: 367 items: 368 - const: pipe # PIPE reset 369 - const: sleep # Sleep reset 370 - const: sticky # Core Sticky reset 371 - const: axi_m # AXI Master reset 372 - const: axi_s # AXI Slave reset 373 - const: ahb # AHB Reset 374 - const: axi_m_sticky # AXI Master Sticky reset 375 376 - if: 377 properties: 378 compatible: 379 contains: 380 enum: 381 - qcom,pcie-ipq6018 382 - qcom,pcie-ipq8074-gen3 383 then: 384 properties: 385 clocks: 386 minItems: 5 387 maxItems: 5 388 clock-names: 389 items: 390 - const: iface # PCIe to SysNOC BIU clock 391 - const: axi_m # AXI Master clock 392 - const: axi_s # AXI Slave clock 393 - const: axi_bridge # AXI bridge clock 394 - const: rchng 395 resets: 396 minItems: 8 397 maxItems: 8 398 reset-names: 399 items: 400 - const: pipe # PIPE reset 401 - const: sleep # Sleep reset 402 - const: sticky # Core Sticky reset 403 - const: axi_m # AXI Master reset 404 - const: axi_s # AXI Slave reset 405 - const: ahb # AHB Reset 406 - const: axi_m_sticky # AXI Master Sticky reset 407 - const: axi_s_sticky # AXI Slave Sticky reset 408 409 - if: 410 properties: 411 compatible: 412 contains: 413 enum: 414 - qcom,pcie-ipq9574 415 then: 416 properties: 417 clocks: 418 minItems: 6 419 maxItems: 6 420 clock-names: 421 items: 422 - const: axi_m # AXI Master clock 423 - const: axi_s # AXI Slave clock 424 - const: axi_bridge 425 - const: rchng 426 - const: ahb 427 - const: aux 428 429 resets: 430 minItems: 8 431 maxItems: 8 432 reset-names: 433 items: 434 - const: pipe # PIPE reset 435 - const: sticky # Core Sticky reset 436 - const: axi_s_sticky # AXI Slave Sticky reset 437 - const: axi_s # AXI Slave reset 438 - const: axi_m_sticky # AXI Master Sticky reset 439 - const: axi_m # AXI Master reset 440 - const: aux # AUX Reset 441 - const: ahb # AHB Reset 442 443 interrupts: 444 minItems: 8 445 interrupt-names: 446 items: 447 - const: msi0 448 - const: msi1 449 - const: msi2 450 - const: msi3 451 - const: msi4 452 - const: msi5 453 - const: msi6 454 - const: msi7 455 456 - if: 457 properties: 458 compatible: 459 contains: 460 enum: 461 - qcom,pcie-qcs404 462 then: 463 properties: 464 clocks: 465 minItems: 4 466 maxItems: 4 467 clock-names: 468 items: 469 - const: iface # AHB clock 470 - const: aux # Auxiliary clock 471 - const: master_bus # AXI Master clock 472 - const: slave_bus # AXI Slave clock 473 resets: 474 minItems: 6 475 maxItems: 6 476 reset-names: 477 items: 478 - const: axi_m # AXI Master reset 479 - const: axi_s # AXI Slave reset 480 - const: axi_m_sticky # AXI Master Sticky reset 481 - const: pipe_sticky # PIPE sticky reset 482 - const: pwr # PWR reset 483 - const: ahb # AHB reset 484 485 - if: 486 properties: 487 compatible: 488 contains: 489 enum: 490 - qcom,pcie-sdm845 491 then: 492 oneOf: 493 # Unfortunately the "optional" ref clock is used in the middle of the list 494 - properties: 495 clocks: 496 minItems: 8 497 maxItems: 8 498 clock-names: 499 items: 500 - const: pipe # PIPE clock 501 - const: aux # Auxiliary clock 502 - const: cfg # Configuration clock 503 - const: bus_master # Master AXI clock 504 - const: bus_slave # Slave AXI clock 505 - const: slave_q2a # Slave Q2A clock 506 - const: ref # REFERENCE clock 507 - const: tbu # PCIe TBU clock 508 - properties: 509 clocks: 510 minItems: 7 511 maxItems: 7 512 clock-names: 513 items: 514 - const: pipe # PIPE clock 515 - const: aux # Auxiliary clock 516 - const: cfg # Configuration clock 517 - const: bus_master # Master AXI clock 518 - const: bus_slave # Slave AXI clock 519 - const: slave_q2a # Slave Q2A clock 520 - const: tbu # PCIe TBU clock 521 properties: 522 resets: 523 maxItems: 1 524 reset-names: 525 items: 526 - const: pci # PCIe core reset 527 528 - if: 529 properties: 530 compatible: 531 contains: 532 enum: 533 - qcom,pcie-sdx55 534 then: 535 properties: 536 clocks: 537 minItems: 7 538 maxItems: 7 539 clock-names: 540 items: 541 - const: pipe # PIPE clock 542 - const: aux # Auxiliary clock 543 - const: cfg # Configuration clock 544 - const: bus_master # Master AXI clock 545 - const: bus_slave # Slave AXI clock 546 - const: slave_q2a # Slave Q2A clock 547 - const: sleep # PCIe Sleep clock 548 resets: 549 maxItems: 1 550 reset-names: 551 items: 552 - const: pci # PCIe core reset 553 554 - if: 555 not: 556 properties: 557 compatible: 558 contains: 559 enum: 560 - qcom,pcie-apq8064 561 - qcom,pcie-ipq4019 562 - qcom,pcie-ipq8064 563 - qcom,pcie-ipq8064v2 564 - qcom,pcie-ipq8074 565 - qcom,pcie-ipq8074-gen3 566 - qcom,pcie-ipq9574 567 - qcom,pcie-qcs404 568 then: 569 required: 570 - power-domains 571 572 - if: 573 not: 574 properties: 575 compatible: 576 contains: 577 enum: 578 - qcom,pcie-msm8996 579 then: 580 required: 581 - resets 582 - reset-names 583 584 - if: 585 properties: 586 compatible: 587 contains: 588 enum: 589 - qcom,pcie-msm8996 590 - qcom,pcie-sdm845 591 then: 592 oneOf: 593 - properties: 594 interrupts: 595 maxItems: 1 596 interrupt-names: 597 items: 598 - const: msi 599 - properties: 600 interrupts: 601 minItems: 8 602 interrupt-names: 603 items: 604 - const: msi0 605 - const: msi1 606 - const: msi2 607 - const: msi3 608 - const: msi4 609 - const: msi5 610 - const: msi6 611 - const: msi7 612 613 - if: 614 properties: 615 compatible: 616 contains: 617 enum: 618 - qcom,pcie-apq8064 619 - qcom,pcie-apq8084 620 - qcom,pcie-ipq4019 621 - qcom,pcie-ipq6018 622 - qcom,pcie-ipq8064 623 - qcom,pcie-ipq8064-v2 624 - qcom,pcie-ipq8074 625 - qcom,pcie-ipq8074-gen3 626 - qcom,pcie-qcs404 627 then: 628 properties: 629 interrupts: 630 maxItems: 1 631 interrupt-names: 632 items: 633 - const: msi 634 635unevaluatedProperties: false 636 637examples: 638 - | 639 #include <dt-bindings/interrupt-controller/arm-gic.h> 640 pcie@1b500000 { 641 compatible = "qcom,pcie-ipq8064"; 642 reg = <0x1b500000 0x1000>, 643 <0x1b502000 0x80>, 644 <0x1b600000 0x100>, 645 <0x0ff00000 0x100000>; 646 reg-names = "dbi", "elbi", "parf", "config"; 647 device_type = "pci"; 648 linux,pci-domain = <0>; 649 bus-range = <0x00 0xff>; 650 num-lanes = <1>; 651 #address-cells = <3>; 652 #size-cells = <2>; 653 ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>, 654 <0x82000000 0 0 0x08000000 0 0x07e00000>; 655 interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; 656 interrupt-names = "msi"; 657 #interrupt-cells = <1>; 658 interrupt-map-mask = <0 0 0 0x7>; 659 interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, 660 <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>, 661 <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>, 662 <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; 663 clocks = <&gcc 41>, 664 <&gcc 43>, 665 <&gcc 44>, 666 <&gcc 42>, 667 <&gcc 248>; 668 clock-names = "core", "iface", "phy", "aux", "ref"; 669 resets = <&gcc 27>, 670 <&gcc 26>, 671 <&gcc 25>, 672 <&gcc 24>, 673 <&gcc 23>, 674 <&gcc 22>; 675 reset-names = "axi", "ahb", "por", "pci", "phy", "ext"; 676 pinctrl-0 = <&pcie_pins_default>; 677 pinctrl-names = "default"; 678 vdda-supply = <&pm8921_s3>; 679 vdda_phy-supply = <&pm8921_lvs6>; 680 vdda_refclk-supply = <&ext_3p3v>; 681 }; 682 - | 683 #include <dt-bindings/interrupt-controller/arm-gic.h> 684 #include <dt-bindings/gpio/gpio.h> 685 pcie@fc520000 { 686 compatible = "qcom,pcie-apq8084"; 687 reg = <0xfc520000 0x2000>, 688 <0xff000000 0x1000>, 689 <0xff001000 0x1000>, 690 <0xff002000 0x2000>; 691 reg-names = "parf", "dbi", "elbi", "config"; 692 device_type = "pci"; 693 linux,pci-domain = <0>; 694 bus-range = <0x00 0xff>; 695 num-lanes = <1>; 696 #address-cells = <3>; 697 #size-cells = <2>; 698 ranges = <0x81000000 0 0 0xff200000 0 0x00100000>, 699 <0x82000000 0 0x00300000 0xff300000 0 0x00d00000>; 700 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 701 interrupt-names = "msi"; 702 #interrupt-cells = <1>; 703 interrupt-map-mask = <0 0 0 0x7>; 704 interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>, 705 <0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>, 706 <0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>, 707 <0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>; 708 clocks = <&gcc 324>, 709 <&gcc 325>, 710 <&gcc 327>, 711 <&gcc 323>; 712 clock-names = "iface", "master_bus", "slave_bus", "aux"; 713 resets = <&gcc 81>; 714 reset-names = "core"; 715 power-domains = <&gcc 1>; 716 vdda-supply = <&pma8084_l3>; 717 phys = <&pciephy0>; 718 phy-names = "pciephy"; 719 perst-gpios = <&tlmm 70 GPIO_ACTIVE_LOW>; 720 pinctrl-0 = <&pcie0_pins_default>; 721 pinctrl-names = "default"; 722 }; 723... 724