1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/crypto/qcom-qce.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm crypto engine driver 8 9maintainers: 10 - Bjorn Andersson <[email protected]> 11 - Konrad Dybcio <[email protected]> 12 13description: 14 This document defines the binding for the QCE crypto 15 controller found on Qualcomm parts. 16 17properties: 18 compatible: 19 oneOf: 20 - const: qcom,crypto-v5.1 21 deprecated: true 22 description: Kept only for ABI backward compatibility 23 24 - const: qcom,crypto-v5.4 25 deprecated: true 26 description: Kept only for ABI backward compatibility 27 28 - items: 29 - enum: 30 - qcom,ipq4019-qce 31 - qcom,sm8150-qce 32 - const: qcom,qce 33 34 - items: 35 - enum: 36 - qcom,ipq6018-qce 37 - qcom,ipq8074-qce 38 - qcom,ipq9574-qce 39 - qcom,msm8996-qce 40 - qcom,qcm2290-qce 41 - qcom,sdm845-qce 42 - qcom,sm6115-qce 43 - const: qcom,ipq4019-qce 44 - const: qcom,qce 45 46 - items: 47 - enum: 48 - qcom,qcs8300-qce 49 - qcom,sa8775p-qce 50 - qcom,sc7280-qce 51 - qcom,sm6350-qce 52 - qcom,sm8250-qce 53 - qcom,sm8350-qce 54 - qcom,sm8450-qce 55 - qcom,sm8550-qce 56 - qcom,sm8650-qce 57 - qcom,sm8750-qce 58 - const: qcom,sm8150-qce 59 - const: qcom,qce 60 61 reg: 62 maxItems: 1 63 64 clocks: 65 minItems: 1 66 maxItems: 3 67 68 clock-names: 69 minItems: 1 70 maxItems: 3 71 72 iommus: 73 minItems: 1 74 maxItems: 8 75 description: 76 phandle to apps_smmu node with sid mask. 77 78 interconnects: 79 maxItems: 1 80 description: 81 Interconnect path between qce crypto and main memory. 82 83 interconnect-names: 84 const: memory 85 86 dmas: 87 items: 88 - description: DMA specifiers for rx dma channel. 89 - description: DMA specifiers for tx dma channel. 90 91 dma-names: 92 items: 93 - const: rx 94 - const: tx 95 96allOf: 97 - if: 98 properties: 99 compatible: 100 contains: 101 enum: 102 - qcom,crypto-v5.1 103 - qcom,crypto-v5.4 104 - qcom,ipq6018-qce 105 - qcom,ipq8074-qce 106 - qcom,ipq9574-qce 107 - qcom,msm8996-qce 108 - qcom,sdm845-qce 109 then: 110 properties: 111 clocks: 112 maxItems: 3 113 clock-names: 114 items: 115 - const: iface 116 - const: bus 117 - const: core 118 required: 119 - clocks 120 - clock-names 121 122 - if: 123 properties: 124 compatible: 125 contains: 126 enum: 127 - qcom,qcm2290-qce 128 - qcom,sm6115-qce 129 then: 130 properties: 131 clocks: 132 maxItems: 1 133 clock-names: 134 items: 135 - const: core 136 required: 137 - clocks 138 - clock-names 139 140 - if: 141 properties: 142 compatible: 143 contains: 144 enum: 145 - qcom,sm8150-qce 146 then: 147 properties: 148 clocks: false 149 clock-names: false 150 151required: 152 - compatible 153 - reg 154 - dmas 155 - dma-names 156 157additionalProperties: false 158 159examples: 160 - | 161 #include <dt-bindings/clock/qcom,gcc-apq8084.h> 162 crypto-engine@fd45a000 { 163 compatible = "qcom,ipq6018-qce", "qcom,ipq4019-qce", "qcom,qce"; 164 reg = <0xfd45a000 0x6000>; 165 clocks = <&gcc GCC_CE2_AHB_CLK>, 166 <&gcc GCC_CE2_AXI_CLK>, 167 <&gcc GCC_CE2_CLK>; 168 clock-names = "iface", "bus", "core"; 169 dmas = <&cryptobam 2>, <&cryptobam 3>; 170 dma-names = "rx", "tx"; 171 iommus = <&apps_smmu 0x584 0x0011>, 172 <&apps_smmu 0x586 0x0011>, 173 <&apps_smmu 0x594 0x0011>, 174 <&apps_smmu 0x596 0x0011>; 175 }; 176