| /linux-6.14.4/Documentation/devicetree/bindings/x86/ |
| D | ce4100.txt | 2 ---------------------------
5 format: <vendor>,<chip>-<device>.
10 The CPU nodes
11 -------------
14 #address-cells = <1>;
15 #size-cells = <0>;
17 cpu@0 {
18 device_type = "cpu";
23 cpu@2 {
24 device_type = "cpu";
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| /linux-6.14.4/arch/mips/loongson2ef/common/ |
| D | pci.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <linux/pci.h>
8 #include <pci.h>
12 .name = "pci memory space",
19 .name = "pci io space",
36 * local to PCI mapping for CPU accessing PCI space in setup_pcimap()
37 * CPU address space [256M,448M] is window for accessing pci space in setup_pcimap()
38 * we set pcimap_lo[0,1,2] to map it to pci space[0M,64M], [320M,448M] in setup_pcimap()
49 * PCI-DMA to local mapping: [2G,2G+256M] -> [0M,256M] in setup_pcimap()
51 LOONGSON_PCIBASE0 = 0x80000000ul; /* base: 2G -> mmap: 0M */ in setup_pcimap()
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| /linux-6.14.4/arch/x86/hyperv/ |
| D | irqdomain.c | 1 // SPDX-License-Identifier: GPL-2.0
4 * Irqdomain for Linux to run as the root partition on Microsoft Hypervisor.
11 #include <linux/pci.h>
16 int cpu, int vector, struct hv_interrupt_entry *entry) in hv_map_interrupt() argument
30 intr_desc = &input->interrupt_descriptor; in hv_map_interrupt()
32 input->partition_id = hv_current_partition_id; in hv_map_interrupt()
33 input->device_id = device_id.as_uint64; in hv_map_interrupt()
34 intr_desc->interrupt_type = HV_X64_INTERRUPT_TYPE_FIXED; in hv_map_interrupt()
35 intr_desc->vector_count = 1; in hv_map_interrupt()
36 intr_desc->target.vector = vector; in hv_map_interrupt()
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| /linux-6.14.4/drivers/net/ethernet/mellanox/mlxsw/ |
| D | pci_hw.h | 1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
74 MLXSW_ITEM32(pci, wqe, c, 0x00, 31, 1);
79 * For Ethernet EMAD (Direct Route and non Direct Route) -
81 * For InfiniBand CTL - must be set if packet destination is local device
86 MLXSW_ITEM32(pci, wqe, lp, 0x00, 30, 1);
91 MLXSW_ITEM32(pci, wqe, type, 0x00, 23, 4);
94 * Size of i-th scatter/gather entry, 0 if entry is unused.
96 MLXSW_ITEM16_INDEXED(pci, wqe, byte_count, 0x02, 0, 14, 0x02, 0x00, false);
99 * Physical address of i-th scatter/gather entry.
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| /linux-6.14.4/arch/mips/include/asm/mach-loongson2ef/ |
| D | pci.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
18 * we use address window2 to map cpu address space to pci space
19 * window2: cpu [1G, 2G] -> pci [1G, 2G]
20 * why not use window 0 & 1? because they are used by cpu when booting.
21 * window0: cpu [0, 256M] -> ddr [0, 256M]
22 * window1: cpu [256M, 512M] -> pci [256M, 512M]
30 #define LOONGSON_PCI_MEM_END (0x80000000ul-1) /* 2G */
32 #define MMAP_CPUTOPCI_SIZE (LOONGSON_PCI_MEM_END - \
37 /* this pci memory space is mapped by pcimap in pci.c */
|
| /linux-6.14.4/Documentation/driver-api/ |
| D | edac.rst | 5 ----------------------------------------
7 There are several things to be aware of that aren't at all obvious, like
8 *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*,
21 typically 72 bits, in order to provide 64 bits + 8 bits of ECC data.
37 A memory controller channel, responsible to communicate with a group of
43 It is typically the highest hierarchy on a Fully-Buffered DIMM memory
47 some performance penalty. Also, it is generally not possible to point to
49 is calculated using two DIMMs instead of one. Due to that, it is capable
52 * Single-channel
55 only. E. g. if the data is 64 bits-wide, the data flows to the CPU using
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| D | device-io.rst | 10 Bus-Independent Device Accesses
20 and devices, allowing device drivers to be written independently of bus
26 Getting Access to the Device
27 ----------------------------
30 part of the CPU's address space is interpreted not as accesses to
31 memory, but as accesses to a device. Some architectures define devices
32 to be at a fixed address, but most have some method of discovering
33 devices. The PCI bus walk is a good example of such a scheme. This
34 document does not cover how to receive such an address, but assumes you
37 This address should not be used directly. Instead, to get an address
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| /linux-6.14.4/arch/sparc/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 bool "64-bit kernel" if "$(ARCH)" = "sparc"
10 Say yes to build a 64-bit kernel - formerly known as sparc64
11 Say no to build a 32-bit kernel - formerly known as sparc
18 select ARCH_MIGHT_HAVE_PC_PARPORT if SPARC64 && PCI
43 select PCI_SYSCALL if PCI
107 select PCI_DOMAINS if PCI
155 bool "Symmetric multi-processing support"
157 This enables support for systems with more than one CPU. If you have
158 a system with only one CPU, say N. If you have a system with more
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| /linux-6.14.4/Documentation/PCI/ |
| D | pci.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 How To Write Linux PCI Drivers
7 :Authors: - Martin Mares <[email protected]>
8 - Grant Grundler <grundler@parisc-linux.org>
10 The world of PCI is vast and full of (mostly unpleasant) surprises.
11 Since each CPU architecture implements different chip-sets and PCI devices
12 have different requirements (erm, "features"), the result is the PCI support
14 tries to introduce all potential driver authors to Linux APIs for
15 PCI device drivers.
18 by Jonathan Corbet, Alessandro Rubini, and Greg Kroah-Hartman.
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| /linux-6.14.4/arch/mips/txx9/rbtx4927/ |
| D | setup.c | 7 * Copyright 2001-2002 MontaVista Software Inc.
9 * Copyright (C) 1996, 97, 2001, 04 Ralf Baechle (ralf@linux-mips.org)
20 * Copyright (C) 2000-2001 Toshiba Corporation
31 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
35 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
42 * with this program; if not, write to the Free Software Foundation, Inc.,
57 #include <asm/txx9/pci.h>
64 int extarb = !(__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCIARB); in tx4927_pci_setup()
69 if (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66) in tx4927_pci_setup()
74 /* Reset PCI Bus */ in tx4927_pci_setup()
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| /linux-6.14.4/drivers/media/common/saa7146/ |
| D | saa7146_core.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 saa7146.o - driver for generic saa7146-based hardware
5 Copyright (C) 1998-2003 Michael Hunold <[email protected]>
11 #include <media/drv-intf/saa7146.h>
56 /* wait for registers to be programmed */ in saa7146_wait_for_debi_done_sleep()
64 dev->name, __func__); in saa7146_wait_for_debi_done_sleep()
65 return -ETIMEDOUT; in saa7146_wait_for_debi_done_sleep()
70 /* wait for transfer to complete */ in saa7146_wait_for_debi_done_sleep()
79 dev->name, __func__); in saa7146_wait_for_debi_done_sleep()
80 return -ETIMEDOUT; in saa7146_wait_for_debi_done_sleep()
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| /linux-6.14.4/drivers/virt/nitro_enclaves/ |
| D | ne_misc_dev.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
14 #include <linux/pci.h>
20 * struct ne_mem_region - Entry in the enclave user space memory regions list.
36 * struct ne_enclave - Per-enclave data used for enclave lifetime management.
39 * @eventq: Wait queue used for out-of-band event notifications
40 * triggered from the PCI device event handler to
42 * @has_event: Variable used to determine if the out-of-band event
51 * total number of CPU cores available on the
53 * @nr_threads_per_core: The number of threads that a full CPU core has.
56 * @slot_uid: Slot unique id mapped to the enclave.
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| /linux-6.14.4/Documentation/virt/hyperv/ |
| D | vpci.rst | 1 .. SPDX-License-Identifier: GPL-2.0
3 PCI pass-thru devices
5 In a Hyper-V guest VM, PCI pass-thru devices (also called
6 virtual PCI devices, or vPCI devices) are physical PCI devices
10 provides higher bandwidth access to the device with lower
12 hypervisor. The device should appear to the guest just as it
14 to the Linux device drivers for the device.
16 Hyper-V terminology for vPCI devices is "Discrete Device
17 Assignment" (DDA). Public documentation for Hyper-V DDA is
20 …tps://learn.microsoft.com/en-us/windows-server/virtualization/hyper-v/plan/plan-for-deploying-devi…
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| /linux-6.14.4/Documentation/virt/ |
| D | ne_overview.rst | 1 .. SPDX-License-Identifier: GPL-2.0
11 that allows customers to carve out isolated compute environments within EC2
24 carved out of the primary VM. Each enclave is mapped to a process running in the
29 1. An enclave abstraction process - a user space process running in the primary
30 VM guest that uses the provided ioctl interface of the NE driver to spawn an
33 There is a NE emulated PCI device exposed to the primary VM. The driver for this
34 new PCI device is included in the NE driver.
36 The ioctl logic is mapped to PCI device commands e.g. the NE_START_ENCLAVE ioctl
37 maps to an enclave start PCI command. The PCI device commands are then
42 2. The enclave itself - a VM running on the same host as the primary VM that
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|
| /linux-6.14.4/arch/x86/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
4 bool "64-bit kernel" if "$(ARCH)" = "x86"
7 Say yes to build a 64-bit kernel - formerly known as x86_64
8 Say no to build a 32-bit kernel - formerly known as i386
13 # Options that are inherently 32-bit kernel only:
27 # Options that are inherently 64-bit kernel only:
47 in order to test the non static function tracing in the
49 only need to keep it around for x86_64. No need to keep it
55 # ported to 32-bit as well. )
154 # Word-size accesses may read uninitialized data past the trailing \0
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| /linux-6.14.4/Documentation/arch/arm/ |
| D | ixp4xx.rst | 6 -------------------------------------------------------------------------
12 in industrial control and other areas due to low cost and power
17 integration such as an on-chip I2C controller.
19 For more information on the various versions of the CPU, see:
23 Intel also made the IXCP1100 CPU for sometime which is an IXP4xx
30 - Dual serial ports
31 - PCI interface
32 - Flash access (MTD/JFFS)
33 - I2C through GPIO on IXP42x
34 - GPIO for input/output/interrupts
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| /linux-6.14.4/drivers/edac/ |
| D | edac_pci.h | 10 * http://www.anime.net/~goemon/linux-ecc/
15 * Refactored for multi-source files:
18 * Please look at Documentation/driver-api/edac.rst for more info about
29 #include <linux/pci.h>
55 /* pointer to edac polling checking routine:
56 * If NOT NULL: points to polling check routine
62 struct device *dev; /* pointer to device structure */
66 const char *dev_name; /* pci/platform/etc... name */
68 void *pvt_info; /* pointer to 'private driver' info */
74 * cpu/cpu0/...
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| /linux-6.14.4/drivers/media/pci/saa7164/ |
| D | saa7164-buffer.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2010-2015 Steven Toth <[email protected]>
12 /* The PCI address space for buffer handling looks like this:
14 * +-u32 wide-------------+
16 * +-u64 wide------------------------------------+
18 * +----------------------+
19 * | CurrentBufferPtr + Pointer to current PCI buffer >-+
20 * +----------------------+ |
22 * +----------------------+ |
24 * +----------------------+ |
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| /linux-6.14.4/drivers/pci/endpoint/ |
| D | pci-epc-core.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * PCI Endpoint *Controller* (EPC) library
13 #include <linux/pci-epc.h>
14 #include <linux/pci-epf.h>
15 #include <linux/pci-ep-cfs.h>
36 * pci_epc_put() - release the PCI endpoint controller
46 module_put(epc->ops->owner); in pci_epc_put()
47 put_device(&epc->dev); in pci_epc_put()
52 * pci_epc_get() - get the PCI endpoint controller
55 * Invoke to get struct pci_epc * corresponding to the device name of the
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| /linux-6.14.4/arch/x86/include/asm/ |
| D | x86_init.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
14 * struct x86_init_mpparse - platform specific mpparse ops
16 * @find_mptable: Find MPTABLE early to reserve the memory region
28 * struct x86_init_resources - platform specific resource related ops
43 * struct x86_init_irqs - platform specific interrupt setup
44 * @pre_vector_init: init code to run before interrupt vectors
49 * @create_pci_msi_domain: Create the PCI/MSI interrupt domain
60 * struct x86_init_oem - oem platform specific customizing functions
70 * struct x86_init_paging - platform specific paging functions
71 * @pagetable_init: platform specific paging initialization call to setup
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| /linux-6.14.4/Documentation/arch/x86/i386/ |
| D | IO-APIC.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 IO-APIC
9 Most (all) Intel-MP compliant SMP boards have the so-called 'IO-APIC',
10 which is an enhanced interrupt controller. It enables us to route
11 hardware interrupts to multiple CPUs, or to CPU groups. Without an
12 IO-APIC, interrupts from hardware will be delivered only to the
13 CPU which boots the operating system (usually CPU#0).
16 multiple IO-APICs. Multiple IO-APICs are used in high-end servers to
20 usually worked around by the kernel. If your MP-compliant SMP board does
21 not boot Linux, then consult the linux-smp mailing list archives first.
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| /linux-6.14.4/drivers/cxl/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
4 depends on PCI
11 CXL is a bus that is electrically compatible with PCI Express, but
13 CXL.mem). The CXL.cache protocol allows devices to hold cachelines
14 locally, the CXL.mem protocol allows devices to be fully coherent
15 memory targets, the CXL.io protocol is equivalent to PCI Express.
16 Say 'y' to enable support for the configuration and management of
22 tristate "PCI manageability"
25 The CXL specification defines a "CXL memory device" sub-class in the
26 PCI "memory controller" base class of devices. Device's identified by
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| /linux-6.14.4/Documentation/networking/device_drivers/ethernet/chelsio/ |
| D | cxgb.rst | 1 .. SPDX-License-Identifier: GPL-2.0
35 Adaptive Interrupts (adaptive-rx)
36 ---------------------------------
39 coalescing parameters, allowing the driver to dynamically adapt the latency
40 settings to achieve the highest performance during various types of network
43 The interface used to control this feature is ethtool. Please see the
46 By default, adaptive-rx is disabled.
47 To enable adaptive-rx::
49 ethtool -C <interface> adaptive-rx on
51 To disable adaptive-rx, use ethtool::
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| /linux-6.14.4/arch/mips/pci/ |
| D | pci-rc32434.c | 3 * PCI initialization for IDT EB434 board
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
24 * with this program; if not, write to the Free Software Foundation, Inc.,
29 #include <linux/pci.h>
33 #include <asm/mach-rc32434/rc32434.h>
34 #include <asm/mach-rc32434/pci.h>
39 /* define an unsigned array for the PCI registers */
52 .name = "PCI MEM1",
61 .name = "PCI Mem2",
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| /linux-6.14.4/drivers/scsi/lpfc/ |
| D | lpfc_init.c | 4 * Copyright (C) 2017-2024 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
26 #include <linux/dma-mapping.h>
31 #include <linux/pci.h>
42 #include <linux/cpu.h>
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|