Lines Matching +full:cpu +full:- +full:to +full:- +full:pci
1 .. SPDX-License-Identifier: GPL-2.0
4 IO-APIC
9 Most (all) Intel-MP compliant SMP boards have the so-called 'IO-APIC',
10 which is an enhanced interrupt controller. It enables us to route
11 hardware interrupts to multiple CPUs, or to CPU groups. Without an
12 IO-APIC, interrupts from hardware will be delivered only to the
13 CPU which boots the operating system (usually CPU#0).
16 multiple IO-APICs. Multiple IO-APICs are used in high-end servers to
20 usually worked around by the kernel. If your MP-compliant SMP board does
21 not boot Linux, then consult the linux-smp mailing list archives first.
23 If your box boots fine with enabled IO-APIC IRQs, then your
28 0: 1360293 IO-APIC-edge timer
29 1: 4 IO-APIC-edge keyboard
30 2: 0 XT-PIC cascade
31 13: 1 XT-PIC fpu
32 14: 1448 IO-APIC-edge ide0
33 16: 28232 IO-APIC-level Intel EtherExpress Pro 10/100 Ethernet
34 17: 51304 IO-APIC-level eth0
40 none of those IRQ sources is performance-critical.
43 In the unlikely case that your board does not create a working mp-table,
44 you can use the pirq= boot parameter to 'hand-construct' IRQ entries. This
45 is non-trivial though and cannot be automated. One sample /etc/lilo.conf
50 The actual numbers depend on your system, on your PCI cards and on their
51 PCI slot position. Usually PCI slots are 'daisy chained' before they are
52 connected to the PCI chipset IRQ routing facility (the incoming PIRQ1-4
55 ,-. ,-. ,-. ,-. ,-.
56 PIRQ4 ----| |-. ,-| |-. ,-| |-. ,-| |--------| |
58 PIRQ3 ----|l|-. `/---|l|-. `/---|l|-. `/---|l|--------|l|
60 PIRQ2 ----|t|-./`----|t|-./`----|t|-./`----|t|--------|t|
62 PIRQ1 ----| |- `----| |- `----| |- `----| |--------| |
63 `-' `-' `-' `-' `-'
65 Every PCI card emits a PCI IRQ, which can be INTA, INTB, INTC or INTD::
67 ,-.
68 INTD--| |
70 INTC--|l|
72 INTB--|t|
74 INTA--| |
75 `-'
77 These INTA-D PCI IRQs are always 'local to the card', their real meaning
80 the PCI chipset. Most cards issue INTA, this creates optimal distribution
82 necessity, PCI IRQs can be shared at will, but it's a good for performance
83 to have non shared interrupts). Slot5 should be used for videocards, they
87 Slot2, then you'll have to specify this pirq= line::
91 the following script tries to figure out such a default pirq= line from
92 your PCI configuration::
94 echo -n pirq=; echo `scanpci | grep T_L | cut -c56-` | sed 's/ /,/g'
97 board does not do default daisy-chaining. (or the IO-APIC has the PIRQ pins
103 [value '0' is a generic 'placeholder', reserved for empty (or non-IRQ emitting)
106 Generally, it's always possible to find out the correct pirq= settings, just
108 'incorrect' pirq line will cause the booting process to hang, or a device
111 If you have 2 PCI buses, then you can use up to 8 pirq values, although such
112 boards tend to have a good configuration.
118 Use smart trial-and-error techniques to find out the correct pirq line ...
120 Good luck and mail to linux-[email protected] or
121 linux-[email protected] if you have any problems that are not covered