Lines Matching +full:cpu +full:- +full:to +full:- +full:pci
1 /* SPDX-License-Identifier: GPL-2.0 */
14 * struct x86_init_mpparse - platform specific mpparse ops
16 * @find_mptable: Find MPTABLE early to reserve the memory region
28 * struct x86_init_resources - platform specific resource related ops
43 * struct x86_init_irqs - platform specific interrupt setup
44 * @pre_vector_init: init code to run before interrupt vectors
49 * @create_pci_msi_domain: Create the PCI/MSI interrupt domain
60 * struct x86_init_oem - oem platform specific customizing functions
70 * struct x86_init_paging - platform specific paging functions
71 * @pagetable_init: platform specific paging initialization call to setup
81 * struct x86_init_timers - platform specific timer setup
82 * @setup_perpcu_clockev: set up the per cpu clock event device for the
83 * boot cpu
94 * struct x86_init_iommu - platform specific iommu setup
102 * struct x86_init_pci - platform specific pci init functions
103 * @arch_init: platform specific pci arch init call
104 * @init: platform specific pci subsystem init
105 * @init_irq: platform specific pci irq init
106 * @fixup_irqs: platform specific pci irq fixup
116 * struct x86_hyper_init - x86 hypervisor init functions
120 * @msi_ext_dest_id: MSI supports 15-bit APIC IDs
134 * struct x86_init_acpi - x86 ACPI init functions
146 * struct x86_guest - Functions used by misc guest incarnations like SEV, TDX, etc.
152 * @enc_kexec_begin Begin the two-step process of converting shared memory back
153 * to private. It stops the new conversions from being started
154 * and waits in-flight conversions to finish, if possible.
155 * @enc_kexec_finish Finish the two-step process of converting shared memory to
158 * It is called on only one CPU while the others are shut down
171 * struct x86_init_ops - functions for platform specific setup
182 struct x86_init_pci pci; member
188 * struct x86_cpuinit_ops - platform specific cpu hotplug setups
189 * @setup_percpu_clockev: set up the per cpu clock event device
190 * @early_percpu_clock_init: early init of the per cpu clock event device
204 * struct x86_legacy_devices - legacy x86 devices
207 * is known to never have a PNPBIOS.
209 * These are devices known to require LPC or ISA bus. The definition of legacy
210 * devices adheres to the ACPI 5.2.9.3 IA-PC Boot Architecture flag
212 * the LPC or ISA bus. User visible devices are devices that have end-user
227 * enum x86_legacy_i8042_state - i8042 keyboard controller state
232 * @X86_LEGACY_i8042_EXPECTED_PRESENT: the controller is likely to be
242 * struct x86_legacy_features - legacy x86 features
244 * @i8042: indicated if we expect the device to have i8042 controller
246 * @rtc: this device has a CMOS real-time clock present
248 * start of the 640k - 1M BIOS region. If false, the platform must
249 * ensure that its memory map correctly reserves sub-1MB regions as needed.
250 * @devices: legacy x86 devices, refer to struct x86_legacy_devices
263 * struct x86_hyper_runtime - x86 hypervisor specific runtime callbacks
265 * @pin_vcpu: pin current vcpu to specified physical
266 * cpu (run rarely)
267 * @sev_es_hcall_prepare: Load additional hypervisor-specific
269 * SEV-ES. Called from the #VC exception handler.
273 * VMMCALL under SEV-ES. Needs to return 'false'
281 void (*pin_vcpu)(int cpu);
288 * struct x86_platform_ops - platform specific runtime functions
289 * @calibrate_cpu: calibrate CPU
290 * @calibrate_tsc: calibrate TSC, if different from CPU
292 * @set_wallclock: set time back to HW clock
345 extern void x86_op_int_noop(int cpu);